OKI Semiconductor MSC23836AA-xxBS20/DS20 8,388,608-Word x 36-Bit DRAM MODULE : FAST PAGE MODE TYPE DESCRIPTION The OKI MSC23836AA-xxBS20/D$20 is a fully decoded 8,388,608-word x 36-bit CMOS Dy- namic Random Access Memory Module composed of sixteen 16-Mb DRAMs (4M x 4) and four 8-Mb DRAMs (4M x 2) in SOJ packages mounted with decoupling capacitors on a 72-pin glass epoxy single-inline package. This module is generally used for non-parity memory expansion applications such as fax machines, printers and personal computers. FEATURES - * 8-Meg x 36-bit organization * 72-Pin Socket Insertable Module MSC23836AA-xxBS20 : Gold tab MSC23836AA-xxDS20 : Solder tab * Single 5 V supply +10% tolerance * Access times : 60, 70, 80 ns Input : TIL compatible Output : TTL compatible, 3-state * Refresh : 2048 cycles /32 ms * CAS before RAS refresh, CAS before RAS hidden refresh, RAS-only refresh capability * Multi-bit test mode capability * Fast Page Mode capability PRODUCT FAMILY Family Access Time (Max.) Cycte Time Power Dissipation trac taa tcac (Min.} Operating (Max.)| Standby (Max.) MSC23836AA-60BS20/DS20 60ns | 30ns | 157s 110 ns 6875 mW 110 mW MSC23836A4-70B520/DS20 7Ons | 35ns | 20ns 130 ns 6325 mW (MOS level) MSC23836A4-80BS20/DS20 80ns | 40ns | 20ns 150 ns 5775 mW 209MSC23836AA-xxBS20/DS20 OKI Semiconductor PIN CONFIGURATION MSC23836AA-xxBS20/DS20 4 107.95 +0.2 _ 9.3 Max. 3.38 20.2 101.19 Typ. | | 3.181 | | 25.4 - SO] - YP] typt PD) 10.16 eat | 1 72) 3.7 Min, 2.03 Typ, 6. 2 Min. Jd 6.35 Typ. 127 184g | *1 The common size difference of the board width 12.5 mm of its height is specified as 0.2. The value above 12.5 mm is specified as 20.5. Pin No. |Pin Name| | Pin No. |Pin Name|| Pin No. |Pin Name] | Pin No. |Pin Name | Pin No. |Pin Name 1 Vss 16 Ad 31 A& 46 NC 61 BQ14 2 Dad 7 AS 32 Ag 47 WE 62 0O33 3 Data 18 AG 33 RAS3 48 NC 63 0Q15 4 oa1 19 A10 34 RAS2 49 Dag 64 pa34 5 0019 20 DQ4 35 DQ26 50 0027 65 DQi6 6 DBQ2 21 DQ22 36 DOs 51 0010 66 NC 7 DQ20 22 DOS 37 DQ17 52 D028 67 PD1 8 DQ3 23 D0Q23 38 DQ35 3 Bai 68 PD2 9 Dd21 24 DQ6 39 Vss 54 bQ29 69 PO3 10 Vee 25 DQ24 40 CASO 55 0012 70 PD4 11 NC 26 0Q7 41 CAS? 56 DQ30 71 NC 12 AQ 27 BQ25 42 CAS3 57 Da13 72 Vss 13 Al 28 A7 43 CAST 58 0031 14 A2 29 NC 44 RASO 59 Vec 15 A3 30 Vec 45 RAS 60 D032 Presence Detect Pins . . MSC23836AA MSC23836AA MSC23836AA Pin No. Pin Name -608820/DS20 | -70BS20/DS20 | -80BS20/DS20 67 PDt NC NC NC 68 PBa2 Vss Vss Vss 69 POS NC Vss NG 70 PD4 NC NC Vss 210OKI Semiconductor MSC23836AA-xxBS20/DS20 BLOCK DIAGRAM AQ A10 RASO Rag? CASO Case WE $41 A0-a10 DG F- DOO | 00 pg. arin Le $41 A0-atg OO | DOIE 00 pg. aig pps ae Foe, ]08 as TS |) | | td me 92 fom] 90s a ce * a ba }-oae1) 0g Se OE OE GE GE Vee Veg e J Vee Vss Veo Veg vl Veg Vss $+ A0-At0 oe pas an AD-A10 Le @-| A0-A10 ae a o AO - A10 7 oR 00 |-pas| og FAS RAS 5a L pope] oo = RAS CAS oot pov pa SAS CAS po t-pazs pa =&AS WE CE aE WE WE Ee OE WE Vec Veg Ib J Vec Vss Vec Vss Id oy Voc Vs @-{ ao-Atobo1 |- vas { 001 A0-a10 Le 4 A0-arpp07 + oa2zeJ nai a0- ato +4 RAS bO2 + poi7 p02 RAS 4H RAS a2 |- 0035-4 o02 RAS CAST CAST CASI CASI CAS2 CAS2 CAS2 CAS2 WE OE oe OCW WE iE cE OOUWE Veo Vg IG J Veo Vs Veco Vgg IG ol Veo Vs + A0-A10 Og Bor 7 BG Ad-A10 Le $-| A0-A10 DQ ; DQ27 DO an - aig #7 Ras 00 Toot DO RAS 4 $77 FAS D0 Does Od RAS CAS po Foo po MAS CAS pag L-pogoj po = SAS WE tE 3E WE WE og pe.CSE Voc Vsg ib Ul Vee Vss Vee Vss Pi Sl Vee Vss ag- aig 00 F DOIB| DA pp. aig LY ag -aio 0G ; DO31 04 go - arg | RAS 3a pais] pa ASA FAS 5G Coma] oo AS CAS po pore og) SAS SAS pa L-poze po = CAS WE og weOCOWE WE a E Vcc Veg IL J Veo Ves Veo Veg Ib vl Veo Vs WAST |_ ASA ASI CASS Vee 8 ; op + C20 211MSC23836AA-xxBS20/DS20 ORCI Semiconductor ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Parameter Symbol Rating Unit Voltage on Any Pin Relative to Veg | Vin, Vour -1.0 to 7.0 V Voltage Vcc Supply Relative to Vss Vec =-1.0 to 7.0 V Short Circuit Output Current los 50 mA Power Dissipation Pp 20 W Operating Temperature Topr _ Oto 70 C Storage Temperature Tstg ~40 to 125 *C Note: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Recommended Operating Conditions ( Ta = 0C to 70C) Parameter Symbol Min. Typ. Max. Unit Vee 45 .0 5.5 V Power Supply Voltage Vss 0 0 0 V Input High Voltage Vin 2.4 _ 6.5 V Input Low Voltage Vit -1.0 _ 0.8 V Capacitance (Ta = 25C, t= 1 MHz) Parameter Symbol Typ. Max. Unit Input Capacitance (AO - A10)} Cini _ 135 pF Input Capacitance (WE) Cing 155 pF Input Capacitance (RASO - RAS3) Cina _ 43 pF input Capacitance (CASO - CAS3) Cina _ 50 pF 0 Capacitance (DQO - DQ35) Coo _ 26 pF Note: Capacitance measured with Boonton Meter. 212OKI Semiconductor MSC23836AA-xxBS20/DS20 DC Characteristics (Voc = 5 V 210%, Ta = 0C to 70C) MSC2S836AA | MSC23836GAA | MSC23836AA Parameter Symbol! Condition -60B$20/0820 | -70BS20/DS20 | -80BS20/DS20 | Unit |Note Min. | Max.| Min. | Max.| Min. | Max. OVSViSB5V; Input Leakage Current iy | All other pins not | -200 | 200 | -200|) 200 | -200/ 200 | pA under test = OV Output Leakage Current| iyo | Pout disable -20 | 20 | -20) 20 | -20| 20 | yA OVSVoS55V Output High Voltage Vou | low =-5.0 mA 2.4 Vec 24 | Vec 24 Yoo 1 V Output Low Voltage Vor | lo. = 4.2 mA 0 0.4 0 0.4 0 0.4 V Average Power . Supply Current tecy | PAS: EAS eveling. |_| sys} | 4150] | 1050) ma} 1.2 tac = Min. (Operating) Power Supply | eee Vin _ 40 40 _ 40 | mA} 1 ce : Current (Standby) > Veo -0.2 V _ 20 ~ 20 _ 20 | mA: 1 Average Power RAS cycling, Supply Current Icca | CAS = Vin, _ 1250; | 1150} | 1050 | mAj 1,2 (RAS-only Refresh) tac = Min. Average Power RAS cycling, Supply Current lece | CAS before RAS, | 1250} | 1150] | 1050} mA] 1,2 (CAS before RAS Refresh) tac = Min. Average Power RAS = Vit, Supply Current lec? | CAS cycling, | 1150; | 1050; | 950 | mA/ 1,3 (Fast Page Mode) tpc = Min. Notes: 1. Specified values are obtained with the output open. 2. Address can be changed once or less while RAS=Vj,. 3. Address can be changed once or less while CAS=Vix. 213MSC23836AA-xxBS20/DS20 AC Characteristics (1/2) (Vcc = 5 V 10%, Ta = 0C to 70C) OKIE Semiconductor Note 4,2,3,9,16 MSC23836AA | MSC23836AA | MSC23836AA Parameter Symbol | -60BS20/DS20 | -708S20/D$20 | -808S20/DS20 | Unit) Note Min. | Max. | Min. | Max.| Min. | Max. Random Read or Write Cycle Time trac | 110 130 _ 150 _ ns Fast Page Mode Cycle Time tec 40 - 45 _ 50 _ ns Access Time from RAS trac | 60 _ 70 _- 80 | ns '4,5.6 Access Time from CAS teac | 15 20 20 ns | 4.5 Access Time from Column Address taa _ 30 _ 35 _ 40 ns | 4,6 Access Time from CAS Precharge tcpa | 35 _ 40 _ 45 ns 4 Output Low Impedance Time from CAS teiz 0 _ 0 _ 0 _ ns 4 Output Buffer Turn-off Delay Time - torr 0 16 0 20 0 20 ns 7 Transition Time tr 3 50 3 50 3 50 hg 3 Refresh Period trer _ 32 ~ 32 _ 32 ms RAS Precharge Time tap | 40 50 60 | ns RAS Pulse Width tras | 60 10K 70 10K 80 10K | ns RAS Pulse Width (Fast Page Mode) trasp; 60 | 100K | 70 | 100K | 80 | 100K | ns RAS Hold Time tasy | 15 | 20 | | 2 |] | os CAS Precharge Time top | 10 10 - 10 | ns CAS Pulse Width teas 15 10K 20 10K 20 10K ns CAS Hold Time tesH 60 _ 70 _ 80 _ ns CAS to RAS Precharge Time tenp | 10 10 _ 10 | os RAS to CAS Delay Time trcp | 20 45 20 50 20 GO | ns| RAS to Column Address Delay Time trap | 15 30 15 35 15 40 ns | 6 Row Address Set-up Time tasr 0 0 _ 0 _ ns Row Address Hold Time tray 10 _ 10 _ 10 _ ns Column Address Set-up Time tasc 0 _ 0 _ 0 _ ns Cotumn Address Hold Time {can 15 _ 15 _ 15 ~ ns Column Address Hold Time from RAS tan | 50 _ 55 _ 60 | ns Column Address to RAS Lead Time traL 30 _ 35 _ 40 _ ns 214OKI Semiconductor MSC23836AA-xxBS20/DS20 AG Characteristics (2/2) (Vcc =5 V 10%, Ta = 0C to 70C) Note 1.2.3.9,10 MSC2383eAA | MSG23836AA | MSC23836AA Parameter Symbol! -60B520/DS820 | -708$20/DS20 | -80BS20/DS20 |Unit | Note Min. | Max. | Min. | Max. | Min. | Max. Read Command Sat-up Time tacs 0 _ 0 0 ns Read Command Hold Time trcH 0 _ 0 0 _ ns 8 Read Command Hold Time referenced to RAS | tray 0 _ 0 _ 0 ns B Write Command Set-up Time twes 0 _ 0 _ 0 _ ns Write Command Hold Time tweon 10 _ 16 _ 15 ns Write Command Hold Time trom RAS twea | 45 | 55 _ 60 | ns Write Command Pulse Width twe 10 _ 16 _ 10 _ ns Write Command to RAS Lead Time taw. | 15 _ 20 20 | os Write Command to CAS Lead Time tow. | 15 | 20 _ 20 | | os Data-in Set-up Time tos 0 _ 0 _ 0 _ ns Data-in Hold Time tbH 15 _ 15 _ 15 _ ns Data-in Hold Time from RAS tonr | 50 | 55 60 | ns CAS Active Delay Time from RAS Precharge| tapc | 10 10 _ 10 | ns RAS to CAS Set-up Time (CAS before RAS)| tesa | 10 | 10 10 | | ns RAS to CAS Hold Time (CAS before RAS) | tcun | 20 | 20 20 {ns CAS Precharge Time (Refresh Counter Test) | tept 40 _ 40 _ 40 _ ns WE to RAS Precharge Time (CAS before RAS)| twar | 10 _ 10 10 | ns WE Hold Time trom RAS (CAS before RAS)| twry | 10 | 10 _ 1 | | ns RAS to WE Set-up Time (Test Mode) twrs | 10 10 10 | ns RAS to WE Hold Time (Test Mode) twrn | 20 _ 20 _ 20 j ns 215MSC23836AA-xxBS20/DS$20 Notes: 216 1. 10. OKI Semiconductor A start-up delay of 200 us is required after power-up followed by a minimum of eight initialization cycles (RAS-only refresh or CAS before RAS refresh) before proper device operation is achieved. When using the internal refresh counter, a minimum of eight CAS before RAS initialization cycles is required. AC mesurement assume ty = 5 ns. Vin (Min.) and Vj, (Max.) are reference levels for measuring input timing signals. Transition times are measured between Vj}; and Vj,. . Measured with a load circuit equivalent to 2 TTL loads and 100 pF. . Operation within the trcp (Max.) limit ensures that trac (Max.) can be met. tpcp (Max.) is specified as a reference point only. If tpcpis greater than the specified tpcp (Max.) limit, access time is controlled by tcac. -6. Operation within the tpap (Max.) limit ensures that trac (Max.) can be met. trap (Max.) is specified as a reference point only. If trap is greater than the specified trap (Max.) limit, access time is controlled by taa. torr (Max.) defines the time at which the output achieves an open circuit condition and is not referenced to output voltage levels. trcH OF tprH must be satisfied for a read cycle. The test mode is initiated by performing a WE and CAS before RAS refresh cycle. This mode is latched and remains in effect until the exit cycle is generated. The test mode specified in this data sheet is an 8-bit parallel test function. CA10, CAI and CAO are not used. In a read cycle, if all internal bits are equal, the DQ pin will indicate a high level. If any internal bits are not equal, the DQ pin will indicate a low level. The test mode is cleared and the memory device returned to its normal operating state by performing a RAS-only refresh cycle or a CAS before RAS refresh cycle. In a test mode read cycle, the access time parameters are delayed by 5 ns. The test mode parameters are obtained by adding 5 ns to the normal read cycle values. See ADDENDUM E for AC Timing Waveforms