DSP56F805/D
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• Consider all device loads as well as parasitic capacita nce due to PCB traces when calculating
capacit ance. This is espe cially cri tical in syste ms with highe r capacitive l oads that cou ld create higher
transient currents in the VDD and VSS circuits.
• Take special care to minim ize noise levels on the VREF, VDDA and VSSA pins .
• Designs that utilize the TRST pin for JTAG port or OnCE mod ule funct ionalit y (such as develo pment
or debuggi ng syste ms) shoul d allow a mea ns to as sert TRST whe never RESET is as serte d, as well as
a means to assert TRST independently of RESET. Designs that do not require debugging functionality ,
such as consumer products, should tie these pins together.
• Because the Flash memory is programmed through t he JT AG/OnCE por t, designers should provide an
interface to this port to allow in-circuit Flash programming.
Part 6 Ordering Information
Table 40 lists the pertinent information needed to place an order. Consult a Motorola Semiconductor sales
office or authorized distributor to determine availability and to order parts.
Table 40. DSP56F805 Ordering Information
Part Supply
Voltage Package Type Pin
Count Frequency
(MHz) Order Number
DSP56F805 3.0–3.6 V Low Profile Plastic Quad Flat Pack (LQFP) 144 80 DSP56F805FV80