LT6553
1
6553f
APPLICATIO S
U
DESCRIPTIO
U
FEATURES
TYPICAL APPLICATIO
U
152
5V
161
–5V
–5V
–
+14
370Ω370Ω
75Ω
+
–12
370Ω370Ω
75Ω
+
–10
9
5V
11
–5V
13
8
7
6
5
4
3
370Ω370Ω
75Ω
R
IN
G
IN
B
IN
75Ω
75Ω
75Ω
75Ω
75Ω
75Ω
LT6553
6553 TA01a
The LT
®
6553 is a high-speed triple video amplifier with an
internally fixed gain of 2. The individual amplifiers are
optimized for performance with a double terminated 75Ω
video load and feature a 2V
P–P
full signal bandwidth of
400MHz, making them ideal for driving very high-resolu-
tion video signals. Separate power supply pins for each
amplifier boost channel separation to 75dB, allowing the
LT6553 to excel in many high-speed applications.
While the performance of the LT6553 is optimized for dual
supply operation, it can also be used on a single supply as
small as 4.5V. Using dual 5V supplies, each amplifier
draws only 8mA. When disabled, the amplifiers draw less
than 100µA and the output pins become high impedance.
Furthermore, the amplifiers are capable of turning on in
less than 50ns, making them ideal for multiplexing and
portable applications.
The LT6553 is manufactured on Linear Technology’s
proprietary low voltage complementary bipolar process
and is available in the 16-lead SSOP package that fits in the
same PCB area as an SO-8 package.
■
RGB Amplifiers
■
Coaxial Cable Drivers
■
LCD Projectors
, LTC and LT are registered trademarks of Linear Technology Corporation.
■
650MHz –3dB Small Signal Bandwidth
■
400MHz –3dB 2V
P-P
Large Signal Bandwidth
■
150MHz ±0.1dB Bandwidth
■
High Slew Rate: 2500V/µs
■
Fixed Gain of 2 Requires No External Resistors
■
75dB Channel Separation at 10MHz
■
50dB Channel Separation at 100MHz
■
–82dBc 2nd Harmonic Distortion at 10MHz, 2V
P-P
■
–72dBc 3rd Harmonic Distortion at 10MHz, 2V
P-P
■
Low Supply Current: 8mA per Amplifier
■
6ns 0.1% Settling Time for 2V Step
■
TTL Compatible Enable I
SS
≤ 100µA when Disabled
■
Differential Gain of 0.022%, Differential
Phase of 0.006°
■
Wide Supply Range: ±2.25V (4.5V) to ±6V (12V)
■
Available in 16-Lead SSOP Package
650MHz Gain of 2
Triple Video Amplifier
Triple Video Line Driver
TIME (ns)
OUTPUT (V)
1.5
1.0
0.5
0
–0.5
–1.0
–1.5 4 8 12 16
6553 TA01b
2020 6 10 14 18
V
IN
= 1V
P–P
V
S
= ±5V
R
L
= 15OΩ
T
A
= 25°C
Large Signal Transient Response
LT6553
2
6553f
1
2
3
4
5
6
7
8
TOP VIEW
GN PACKAGE
16-LEAD PLASTIC SSOP
16
15
14
13
12
11
10
9
EN
DGND
INR
AGND
ING
AGND
INB
V
–
V
+
V
+
OUTR
V
–
OUTG
V
+
OUTB
V
–
G = +2
G = +2
G = +2
Total Supply Voltage (V
+
to V
–
) ............................ 13.2V
Input Current (Note 2) ........................................ ±10mA
Output Current (Continuous) ............................. ±70mA
EN to DGND Voltage (Note 2) ................................. 5.5V
Output Short-Circuit Duration (Note 3)............ Indefinite
Operating Temperature Range (Note 4) ... –40°C to 85°C
Specified Temperature Range (Note 5).... –40°C to 85°C
Storage Temperature Range .................. –65°C to 150°C
Junction Temperature........................................... 150°C
Lead Temperature (Soldering, 10 sec)..................300°C
ORDER PART
NUMBER
GN PART
MARKING
T
JMAX
= 150°C, θ
JA
= 135°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
6553
6553I
LT6553CGN
LT6553IGN
ABSOLUTE AXI U RATI GS
W
WW
U
PACKAGE/ORDER I FOR ATIO
UUW
(Note 1)
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = ±5V, RL = 150Ω, CL = 1.5pF, VEN = 0.4V, VAGND, VDGND = 0V.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
OS
Input Referred Offset Voltage V
IN
= 0V, V
OS
= V
OUT
/2 3 ±10 mV
●±20 mV
I
IN
Input Current ●–17 ±50 µA
R
IN
Input Resistance V
IN
= ±1V ●150 400 kΩ
C
IN
Input Capacitance f = 100kHz 1 pF
PSRR Power Supply Rejection Ratio V
S
(Total) = 4.5V to 12V (Note 6) ●56 62 dB
I
PSRR
Input Current Power Supply V
S
(Total) = 4.5V to 12V (Note 6) ●1±4µA/V
Rejection
A
V
ERR Gain Error V
OUT
= ±2V ●–1.2 ±5%
A
V
MATCH Gain Matching Any One Channel to Another ±1%
V
OUT
Maximum Output Voltage Swing ±3.25 ±3.5 V
●±3.1 V
I
S
Supply Current, Per Amplifier 8 11 mA
●14 mA
Supply Current, Disabled, Total V
EN
= 4V ●22 100 µA
V
EN
= Open ●0.5 100 µA
I
EN
Enable Pin Current V
EN
= 0.4V ●–200 –95 µA
V
EN
= V
+
●0.5 50 µA
I
SC
Output Short-Circuit Current R
L
= 0Ω, V
IN
= ±1V ●±50 ±105 mA
SR Slew Rate ±1V on ±2V Output Step (Note 9) 1700 2500 V/µs
–3dB BW Small Signal –3dB Bandwidth V
OUT
= 200mV
P-P
650 MHz
0.1dB BW Gain Flatness ±0.1dB Bandwidth V
OUT
= 200mV
P-P
150 MHz
LT6553
3
6553f
FPBW Full Power Bandwidth 2V V
OUT
= 2V
P-P
(Note 7) 270 400 MHz
FPBW Full Power Bandwidth 4V V
OUT
= 4V
P-P
(Note 7) 200 MHz
All-Hostile Crosstalk f = 10MHz, V
OUT
= 2V
P-P
–75 dB
f = 100MHz, V
OUT
= 2V
P-P
–50 dB
t
S
Settling Time 0.1% of V
FINAL
, V
STEP
= 2V 6 ns
t
R
,
t
F
Small-Signal Rise and Fall Time 10% to 90%, V
OUT
= 200mV
P-P
550 ps
dG Differential Gain (Note 8) 0.022 %
dP Differential Phase (Note 8) 0.006 Deg
HD2 2nd Harmonic Distortion f = 10MHz, V
OUT
= 2V
P-P
–82 dBc
HD3 3rd Harmonic Distortion f = 10MHz, V
OUT
= 2V
P-P
–72 dBc
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = ±5V, RL = 150Ω, CL = 1.5pF, VEN = 0.4V, VAGND, VDGND = 0V.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: This parameter is guaranteed to meet specified performance
through design and characterization. It is not production tested.
Note 3: As long as output current and junction temperature are kept below
the Absolute Maximum Ratings, no damage to the part will occur.
Depending on the supply voltage, a heat sink may be required.
Note 4: The LT6553C is guaranteed functional over the operating
temperature range of –40°C to 85°C.
Note 5: The LT6553C is guaranteed to meet specified performance from
0°C to 70°C. The LT6553C is designed, characterized and expected to
meet specified performance from –40°C and 85°C but is not tested or QA
sampled at these temperatures. The LT6553I is guaranteed to meet
specified performance from –40°C to 85°C.
Note 6: The two supply voltage settings for power supply rejection are
shifted from the typical ±V
S
points for ease of testing. The first
measurement is taken at V
+
= 3V, V
–
= –1.5V to provide the required 3V
headroom for the enable circuitry to function with EN, DGND, AGND and
all inputs connected to 0V. The second measurement is taken at V
+
= 8V,
V
–
= –4V.
Note 7: Full power bandwidth is calculated from the slew rate:
FPBW = SR/(π • V
P-P
)
Note 8: Differential gain and phase are measured using a Tektronix
TSG120YC/NTSC signal generator and a Tektronix 1780R video
measurement set. The resolution of this equipment is better than 0.05%
and 0.05°. Nine identical amplifier stages were cascaded giving an
effective resolution of better than 0.0056% and 0.0056%.
Note 9: Slew rate is 100% production tested on the G channel. Slew rate
of the R and B channels is guaranteed through design and
characterization.
LT6553
4
6553f
INPUT VOLTAGE (V)
–2.5
INPUT BIAS CURRENT (µA)
–20
0
1.5
6553 G05
–40
–60 –1.5 –0.5 0.5 2.5
20 V
S
= ±5V
T
A
= –55°C
T
A
= 25°C
T
A
= 125°C
EN PIN VOLTAGE (V)
0
EN PIN CURRENT (µA)
0
–20
–40
–60
–80
–100
–120
–140
6553 G06
25
134
V
S
= ±5V
V
DGND
= 0V
T
A
= –55°C
T
A
= 25°C
T
A
= 125°C
TEMPERATURE (°C)
–55
SUPPLY CURRENT (mA)
–15 25 45 125
6553 G01
–35 5 65 85 105
12
10
8
6
4
2
0
TOTAL SUPPLY VOLTAGE (V)
04
6553 G02
12356789101112
SUPPLY CURRENT (mA)
12
10
8
6
4
2
0
EN PIN VOLTAGE (V)
SUPPLY CURRENT (mA)
6553 G03
12
10
8
6
4
2
001.0 2.0 2.50.5 1.5 3.0 3.5 4.0
V
S
= ±5V
R
L
= ∞
V
IN
= 0V
V
S
= ±5V
V
DGND
= 0V
V
IN
= 0V
V
EN
= 0V
V
EN
= 0.4V
V
–
= –V
+
V
EN
, V
DGND
, V
IN
= 0V
T
A
= 25°CT
A
= –55°C
T
A
= 25°C
T
A
= 125°C
INPUT VOLTAGE (V)
–2.5 1.5
–1.5 –0.5 0.5 2.5
5
4
3
2
1
0
–1
–2
–3
–4
–5
OUTPUT VOLTAGE (V)
6553 G07
V
S
= ±5V
R
L
= 150ΩT
A
= 125°C
T
A
= 25°C
T
A
= –55°C
SOURCE CURRENT (mA)
0
OUTPUT VOLTAGE (V)
5
4
3
2
1
040
6553 G08
10 20 30 10050 60 70 80 90
V
S
= ±5V
V
IN
= 2V
T
A
= 125°C
T
A
= –55°C
T
A
= 25°C
040
10 20 30 10050 60 70 80 90
SINK CURRENT (mA)
OUTPUT VOLTAGE (V)
0
–1
–2
–3
–4
–5
6553 G09
V
S
= ±5V
V
IN
= –2V
T
A
= 125°C
T
A
= –55°C
T
A
= 25°C
TEMPERATURE (°C)
OFFSET VOLTAGE (mV)
6553 G04
10.0
7.5
5.0
2.5
0
–2.5
–5.0
–7.5
–10.0
V
S
= ±5V
V
IN
= 0V
–55 –15 25 45 125–35 5 65 85 105
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Output Voltage Swing vs ILOAD
(Output High) Output Voltage Swing vs ILOAD
(Output Low)
Input Bias Current vs
Input Voltage
Output Voltage vs Input Voltage
EN Pin Current vs EN Pin Voltage
Input Referred Offset Voltage vs
Temperature
Supply Current per Amplifier vs
Temperature Supply Current per Amplifier vs
Supply Voltage Supply Current per Amplifier vs
EN Pin Voltage
LT6553
5
6553f
6553 G11
6553 G10
FREQUENCY (kHz)
INPUT NOISE (nV/√Hz OR pA/√Hz)
0.001 0.01 1 10 1000.1
1000
100
10
1
6553 G12
FREQUENCY (MHz)
REJECTION RATIO (dB)
0.001 0.01 1 10 1000.1
FREQUENCY (MHz)
INPUT IMPEDANCE (kΩ)
0.01 0.1 10 100 10001
1000
100
10
1
0.1
70
60
50
40
30
20
10
0
VS = ±5V
TA = 25°C
FREQUENCY (MHz)
0.1
AMPLITUDE (dB)
10 1000
9
8
7
6
5
4
3
2
1
0
6553 G13
1 100
FREQUENCY (MHz)
0.1
AMPLITUDE (dB)
1000
6553 G14
110 100
0.5
0.4
0.3
0.2
0.1
0
– 0.1
– 0.2
– 0.3
– 0.4
– 0.5
FREQUENCY (MHz)
0.1
AMPLITUDE (dB)
0
–20
–40
–60
–80
– 100
– 120 1 10 100 1000
6553 G15
VS = ±5V
VOUT = 2VP-P
RL = 150Ω
TA = 25°C
ALL-
HOSTILE
WORST
ADJACENT
FREQUENCY (MHz)
AMPLITUDE (dB)
18
16
14
12
10
8
6
4
2
0
–2
–4
–6
6553 G16
FREQUENCY (MHz)
0.01
DISTORTION (dBc)
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
– 100
– 110
– 120 0.1 1 10
6553 G17 6553 G18
100
0.1 1 10 100 1000
VS = ±5V
VOUT = 2VP-P
RL = 150Ω
TA = 25°C
VS = ±5V
VOUT = 2VP-P
RL = 150Ω
TA = 25°C
in
–PSRR
FREQUENCY (MHz)
0.01
OUTPUT IMPEDANCE (Ω)
10
100
100
1
0.1 0.1 110 1000
1000
VS = ±5V
RL = 150Ω
TA = 25°C
DISABLED
VEN = 4V
ENABLED
VEN = 0.4V
+PSRR
CL = 10pF
CL = 4.7pF
CL = 0pF
±PSRR
VS = ±5V
RL = 150Ω
TA = 25°C
VS = ±5V
VOUT = 200mVP-P
RL = 150Ω
TA = 25°C
TYPICAL PART
G-CHANNEL
R-CHANNEL
B-CHANNEL
VOUT = 2VP-P
VOUT = 4VP-P
VOUT = 200mVP-P
HD3
HD2
VS = ±5V
TA = 25°CVS = ±5V
VIN = 0V
TA = 25°C
en
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Frequency Response vs Output
Amplitude Gain Flatness vs Frequency Crosstalk vs Frequency
Frequency Response with
Capacitive Loads Harmonic Distortion vs Frequency Output Impedance vs Frequency
Input Noise Spectral Density Input Impedance vs Frequency PSRR vs Frequency
LT6553
6
6553f
GAIN ERROR–INDIVIDUAL CHANNEL (%)
–3.0 0
45
40
35
30
25
20
15
10
5
0
6553 G23
–2.5 1.5–2.0 –1.5 –1.0 – 0.5 0.5 1.0 –3.0 0 2.0 3.0–2.0 –1.0 1.0
GAIN ERROR–BETWEEN CHANNELS (%)
PERCENT OF UNITS (%)
PERCENT OF UNITS (%)
35
30
25
20
15
10
5
0
6553 G24
TIME (ns)
OUTPUT (V)
0.15
0.10
0.05
0
–0.05
–0.10
–0.15 4 8 12 16
6553 G19
2020 6 10 14 18
V
IN
= 100mV
P–P
V
S
= ±5V
R
L
= 150Ω
T
A
= 25°C
V
S
= ±5V
V
OUT
= ±2V
R
L
= 150Ω
T
A
= 25°C
V
S
= ±5V
V
OUT
= ±2V
R
L
= 150Ω
T
A
= 25°C
TIME (ns)
OUTPUT (V)
4
2
0
–1
–3
3
1
–2
–4 4 8 12 16
6553 G21
2624222020 6 10 14 18
V
OUT
= 5V
P–P
V
S
= ±5V
R
L
= 150Ω
T
A
= 25°C
TIME (ns)
OUTPUT (V)
1.5
1.0
0.5
0
–0.5
–1.0
–1.5 4 8 12 16
6553 G22
2020 6 10 14 18
V
IN
= 1V
P–P
V
S
= ±5V
R
L
= 150Ω
T
A
= 25°C
TIME (ns)
OUTPUT (V)
0.9
0.7
0.5
0.3
0.2
0
0.8
0.6
0.4
0.1
–0.1 4 8 12 16
6553 G20
2020 6 10 14 18
V
OUT
= 700mV
P–P
V
S
= ±5V
R
L
= 150Ω
T
A
= 25°C
Large Signal Transient Response
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Gain Error Distribution Gain Error Matching Distribution
Small Signal Transient Response Large Signal Transient Response
Video Amplitude Transient
Response
LT6553
7
6553f
EN (Pin 1): Enable Control Pin. An internal pull-up resistor
of 46k defines the pin’s impedance and will turn the part off
if the pin is unconnected. When the pin is pulled low, the
part is enabled.
DGND (Pin 2): Digital Ground Reference for Enable Pin.
This pin is normally connected to ground.
INR (Pin 3): Red Channel Input. This pin has a nominal
impedance of 400kΩ and does not have any internal
termination resistor.
AGND (Pin 4): Analog Ground for 370Ω Gain Resistor of
Red Channel Amplifier.
ING (Pin 5): Green Channel Input. This pin has a nominal
impedance of 400kΩ and does not have any internal
termination resistor.
AGND (Pin 6): Analog Ground Shared for the 370Ω Gain
Resistors of both Green and Blue Channel Amplifiers.
Additional resistance at this pin will increase the crosstalk
between the green and blue channels.
INB (Pin 7): Blue Channel Input. This pin has a nominal
impedance of 400kΩ and does not have any internal
termination resistor.
V
–
(Pin 8): Negative Supply Voltage. V
–
pins are not
internally connected to each other, and must all be con-
nected externally. Proper supply bypassing is necessary
for best performance. See the Applications Information
section.
V
–
(Pin 9): Negative Supply Voltage for Blue Channel
Output Stage. V
–
pins are not internally connected to each
other, and must all be connected externally. Proper supply
bypassing is necessary for best performance. See the
Applications Information section.
OUTB (Pin 10): Blue Channel Output. It is twice the blue
channel input, and performs optimally with a 150Ω load (a
double terminated 75Ω cable).
V
+
(Pin 11): Positive Supply Voltage for Output Stages of
Amplifiers B and G. V
+
pins are not internally connected to
each other, and must all be connected externally. Proper
supply bypassing is necessary for best performance. See
the Applications Information section.
OUTG (Pin 12): Green Channel Output. It is twice the green
channel input, and performs optimally with a 150Ω load (a
double terminated 75Ω cable).
V
–
(Pin 13): Negative Supply Voltage for Output Stage of
Amplifiers G and R. V
+
pins are not internally connected to
each other, and must all be connected externally. Proper
supply bypassing is necessary for best performance. See
the Applications Information section.
OUTR (Pin 14): Red Channel Output. It is twice the red
channel input, and performs optimally with a 150Ω load (a
double terminated 75Ω cable).
V
+
(Pin 15): Positive Supply Voltage for Output Stage R.
V
+
pins are not internally connected to each other, and
must all be connected externally. Proper supply bypassing
is necessary for best performance. See the Applications
Information section.
V
+
(Pin 16): Positive Supply Voltage. V
+
pins are not
internally connected to each other, and must all be con-
nected externally. Proper supply bypassing is necessary
for best performance. See the Applications Information
section.
UU
U
PI FU CTIO S
LT6553
8
6553f
Power Supplies
The LT6553 is optimized for ±5V supplies but can be
operated on as little as ±2.25V or a single 4.5V supply and
as much as ±6V or a single 12V supply. Internally, each
supply is independent to improve channel isolation. Do
not leave any supply pins disconnected or the part may
not function correctly!
Enable/Shutdown
The LT6553 has a TTL compatible shutdown mode con-
trolled by the EN pin and referenced to the DGND pin. If the
amplifier will be enabled at all times, the EN pin can be
connected directly to DGND. If the enable function is
desired, either driving the pin above 2V or allowing the
internal 46k pull-up resistor to pull the EN pin to the top rail
will disable the amplifier. When disabled, the DC output
impedance will rise to approximately 700Ω through the
internal feedback and gain resistors. Supply current into
the amplifier in the disabled state will be primarily through
V
+
and approximately equal to (V
+
– V
EN
)/46k.
It is important that the two following constraints on the
DGND pin and the EN pin are always followed:
V
+
– V
DGND
≥ 3V
V
EN
– V
DGND
≤ 5.5V
Split supplies of ±3V to ±5.5V will satisfy these require-
ments with DGND connected to 0V.
In single supply applications above 5.5V, an additional
resistor may be needed from the EN pin to DGND if the pin
is ever allowed to float. For example, on a 12V single
supply, a 33k resistor would protect the pin from floating
too high while still allowing the internal pull-up resistor to
disable the part.
On dual ±2.25V supplies, connecting the EN and DGND
pins to V
–
is the easiest way of ensuring that V
+
– V
DGND
is more than 3V.
The DGND pin should not be pulled above the EN pin since
doing so will turn on an ESD protection diode. If the EN pin
voltage is forced a diode drop below the DGND pin, current
should be limited to 10mA or less.
The enable/disable times of the LT6553 are fast when
driven with a logic input. Turn on (from 50% EN input to
50% output) typically occurs in less than 50ns. Turn off is
slower, but is nonetheless below 300ns.
Input Considerations
The LT6553 input voltage range is from V
–
+ 1V to V
+
– 1V.
Therefore, on split supplies the LT6553 input range is
always larger than the output swing. On a single positive
supply, however, the input range limits the output low
swing to 2V (1V multiplied by the internal gain of 2).
The inputs can be driven beyond the point at which the
output clips so long as input currents are limited to below
±10mA. Continuing to drive the input beyond the output
limit can result in increased current drive and slightly
increased swing, but will also increase supply current and
may result in delays in transient response at larger levels
of overdrive.
Layout and Grounding
It is imperative that care is taken in PCB layout in order to
utilize the very high speed and very low crosstalk of the
LT6553. Separate power and ground planes are highly
recommended and trace lengths should be kept as short
as possible. If input or output traces must be run over a
distance of several centimeters, they should use a con-
trolled impedance with matching series and shunt resis-
tances (nominally 75Ω) to maintain signal fidelity.
Series termination resistors should be placed as close to
the output pins as possible to minimize output capaci-
tance. See the Typical Performance Characteristics sec-
tion for a plot of frequency response with various output
capacitors—only 10pF of parasitic output capacitance
causes 6dB of peaking in the frequency response!
Low ESL/ESR bypass capacitors should be placed as close
to the positive and negative supply pins as possible. One
4700pF ceramic capacitor is recommended for both V
+
and V
–
. Additional 470pF ceramic capacitors with minimal
trace length on each supply pin will further improve AC and
transient response as well as channel isolation. For high
current drive and large-signal transient applications, addi-
tional 1µF to 10µF tantalums should be added on each
supply. The smallest value capacitors should be placed
closest to the package.
APPLICATIO S I FOR ATIO
WUUU
LT6553
9
6553f
TYPICAL APPLICATIO
U
RGB Buffer Demo Board
The DC714 Demo Board illustrates optimal routing,
bypassing and termination using the LT6553 as an
RGB video buffer. The schematic is shown in Figure 1. All
inputs and outputs are routed to have a characteristic
impedance of 75Ω and 75Ω input shunt and output series
terminations are connected as close to the part as pos-
sible. For ideal operation, a 75Ω load termination should
be connected at the output. The LT6553’s gain of 2 will
compensate for the resulting divider between the series
and load termination resistors.
Figure 1. DC714 Demo Board Schematic
V–
V–
J4
BANANA JACK
10
11
12
13
14
15
16
R6
75Ω
R5
75Ω
R4
75Ω
R1
75Ω
R2
75Ω
R3
75Ω
Z = 75
Z = 75
Z = 75
Z = 75
C1
4700pF
9
INB
AGND
ING
AGND
INR
DGND
EN
V–
V+
V+
8
7
6
5
4
3
2
1
V–
OUTB
V+
OUTG
V–
OUTR
V+
V+
LT6553
6553 F01
C2
470pF C3
4700pF C4
10µF, 16V
1210
J2
BANANA
JACK
J9
5
1OUTR
4
3
2
C5
470pF
DUALSINGLE C6
1000pF C7
470pF C8
4700pF C9
10µF, 16V
1210
J10
5
J12
BNC
NOTE 5
BNC x3
5
1CAL
4
3
2
1OUTG
4
3
2
J11
5
1OUTB
4
3
2
J8
BNC
51
J3
BANANA
JACK
E3
AGND
E1
EN
E2
DGND
CAL
AGND
4
3
2
13
2
JP3
SUPPLY
ENABLE EXT
31 2
JP1
CONTROL
J5
51
INR 4
3
2
J6
5
BNC × 3
1
ING 4
3
2
J7
51
Z = 75
Z = 75
Z = 75
INB 4
3
2
AGND FLOAT
31 2
JP2
DGND
J1
50Ω BNC
EN
5432
1
APPLICATIO S I FOR ATIO
WUUU
If the AGND pins are not connected directly to a low
impedance ground plane, they must be carefully bypassed
to maintain minimal impedance over frequency. Pin 6 is a
shared connection of the gain resistors of both channel G
and channel B, and any resistance external to this node can
significantly decrease the isolation between those chan-
nels. Although crosstalk will be very dependent on the
board layout, a recommended starting point for bypass
capacitors would be 470pF as close as possible to each
AGND pin with one 4700pF capacitor in parallel.
To maintain the LT6553’s channel isolation, it is beneficial
to shield parallel input and output traces using a ground
plane or power supply traces. Vias between topside and
backside metal may be required to maintain a low
inductance ground near the part where numerous traces
converge.
ESD Protection
The LT6553 has reverse-biased ESD protection diodes on
all pins. If any pins are forced a diode drop above the
positive supply or a diode drop below the negative supply,
large currents may flow through these diodes. If the
current is kept below 10mA, no damage to the devices will
occur.
LT6553
10
6553f
A fourth signal trace is provided at the bottom of the
DC714 demo board with dimensions identical to the
combined input and output of the other channels. This
trace can be used for calibrating the effects of electrical
delay and impedance mismatching and is not necessary
in an end-user application. Several jumpers and addi-
tional connectors are also included to allow for testing of
the enable feature and single supply operation.
Single Supply RGB Buffer Demo Board
The DC743A Demo Board uses the LT6553 in a single
supply application with AC coupled inputs and outputs. It
is nearly identical to the DC714 RGB Buffer Demo Board
but has the additional components required for AC cou-
pling and setting a DC bias point at the input. A schematic
of a single channel is shown in Figure 2. AC performance
of the LT6553 in the single supply application as shown is
nearly identical to performance with dual supplies.
The 6.8k and 2.2k bias resistors at the input set up a
nominal DC voltage at the input that keeps a video signal
within the input and output common mode range of the
part. On a 9V single supply, the input would sit at 2.2V DC,
and the output would sit at 4.4V.
Due to the 220µF coupling cap at the output, the only
additional power dissipation due to the positive output
voltage is through the feedback and gain resistors. Since
those resistors are approximately 740Ω in series, the
additional quiescent current is only 6mA per channel.
RGB Video Selector/Cable Driver
A video multiplexer can be implemented using the EN pins
of parallel LT6553s as shown in Figure 3. In this applica-
tion, all outputs are connected together and one LT6553 is
switched on while the other is switched off. A fast inverter
provides a complementary signal to ensure that only one
set of R, G and B channels is buffered at any time. As
shown, the outputs are connected before the 75Ω series
termination resistors in order to reduce any DC attenua-
tion that may result from the non-infinite output imped-
ance of the disabled LT6553.
TYPICAL APPLICATIO S
U
Figure 2. Single Supply Configuration, One Channel Shown
+
7V TO 12V
80.6Ω
75Ω
75Ω
1/3 LT6553 OUTIN
6.8k
22µF* 220µF**
INPUT
2.2k
6553 F02
*
**
AVX 12066D226MAT
SANYO 6TPB220ML
AGND
LT6553
11
6553f
PACKAGE DESCRIPTIO
U
GN16 (SSOP) 0502
12
345678
.229 – .244
(5.817 – 6.198)
.150 – .157**
(3.810 – 3.988)
16 15 14 13
.189 – .196*
(4.801 – 4.978)
12 11 10 9
.016 – .050
(0.406 – 1.270)
.015 ± .004
(0.38 ± 0.10) × 45°
0° – 8° TYP
.007 – .0098
(0.178 – 0.249)
.053 – .068
(1.351 – 1.727)
.008 – .012
(0.203 – 0.305)
.004 – .0098
(0.102 – 0.249)
.0250
(0.635)
BSC
.009
(0.229)
REF
.254 MIN
RECOMMENDED SOLDER PAD LAYOUT
.150 – .165
.0250 TYP.0165 ±.0015
.045 ±.005
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
INCHES
(MILLIMETERS)
NOTE:
1. CONTROLLING DIMENSION: INCHES
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
GN Package
16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
V+
V+
AGND
OUT
V–
V+
EN
DGND
V–
V–
TO OTHER
AMPLIFIERS
BIAS
IN
46k
1k
370Ω
370Ω
150Ω
6553 SS
SI PLIFIED SCHE ATIC
WW
LT6553
12
6553f
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
LINEAR TECHNOLOGY CORPORATION 2004
LT/TP 0304 1K • PRINTED IN USA
RELATED PARTS
TYPICAL APPLICATIO
U
PART NUMBER DESCRIPTION COMMENTS
LT1259/LT1260 Dual/Triple 130MHz Current Feedback Amplifiers Shutdown, Operates to ±15V
LT1395/LT1396/LT1397 Single/Dual/Quad 400MHz Current Feedback Amplifiers 800V/µs Slew Rate
LT1398/LT1399 Dual/Triple 300MHz Current Feedback Amplifiers 0.1dB Gain Flatness to 150MHz, Shutdown
LT1675/LT1675-1 250MHz, Triple and Single RGB Multiplexer with 100MHz Pixel Switching, –3dB Bandwidth: 250MHz,
Current Feedback Amplifiers 1100V/µs Slew Rate
LT1809/LT1810 Single/Dual, 180MHz, Rail-to-Rail Input and 350V/µs Slew Rate, Shutdown,
Output Amplifiers Low Distortion –90dBc at 5MHz
LT6550/LT6551 3.3V Triple and Quad Video Buffers 110MHz Gain of 2 Buffers in MS Package
Figure 3. RGB Video Selector/Cable Driver
NOTE:
POWER SUPPLY BYPASS
CAPACITORS NOT SHOWN FOR CLARITY
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
LT6553
R
0
SEL
G
0
B
0
75Ω
16
3.3V
–3.3V
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
LT6553
NC7SZ14
R
1
G
1
B
1
R
G
B
75Ω
75Ω
75Ω
75Ω
75Ω
6553 F03
75Ω
75Ω
75Ω
×2
×2
×2
×2
×2
×2
