MC34PF3000A0EP - Freescale Semiconductor

Document Number: PF3000

Rev. 6.0, 8/2015

Freescale Semiconductor

Advance Information

* This document contains certain information on a new product.

Specifications and information herein are subject to change without notice.

Power Management Integrated

Circuit (PMIC) for i.MX 7 & i.MX 6SL/

SX/UL

The PF3000 is a Power Management Integrated Circuit (PMIC) designed

specifically for use with the Freescale i.MX 7 and i.MX 6SL/SX/UL application

processors. With up to four buck converters, six linear regulators, RTC supply,

and coin-cell charger, the PF3000 can provide power for a complete system,

including applications processors, memory, and system peripherals. This device

is powered by SMARTMOS technology.

Features:

• Four adjustable high efficiency buck regulators: 1.75 A, 1.5 A, 1.25 A, 1.0 A

• Selectable modes: PWM, PFM, APS

•5.0 V, 600 mA boost regulator with PFM or Auto mode

• Six adjustable general purpose linear regulators

• Input voltage range: 2.8 V to 4.5 V or 3.7 V to 5.5 V

• OTP (One Time Programmable) memory for device configuration

• Programmable start-up sequence and timing

• Selectable output voltage, frequency, soft start

•I

2C control

• Coin cell charger and always ON RTC supply

• DDR reference voltage

• -40 °C to +125 °C Operating Junction Temperature

Figure 1. PF3000 Simplified Application Diagram

POWER MANAGEMENT

PF3000

Applications:

• Tablets

• eReaders

• Wearables

• POS terminals

• Industrial control

• Medical monitoring

• Home automation

• Home security/energy management

EP SUFFIX

98ASA00719D

48 QFN 7.0 X 7.0

Camera

Audio

Codec

Cluster/HUD

External AMP

Microphones

Speakers

Front USB

POD

Rear USB

POD

Rear Seat

Infotaiment

Sensors

i.MX

I2CI2C

PF3000

Li CELL

Charger

COINCELL Main Supply

2.8 – 5.5 V

GPS

MIPI

uPCIe

Camera

VREFDDR

DDR Memory

SD-MMC/

NAND Mem.

SATA

HDD

WAM

GPS/MIPI

HDMI

LDVS Display

USB

Ethernet

CAN

SW3

0.90to 1.65V@1.5A

SW1A

0.7to1.425V,1.8V,3.3V@1.0 A

SW1B

0.70to 1.475V@1.75A

SW2

1.50to1.85V@1.25A

or2.5to 3.3V@1.25A

SWBST

5.00to 5.15V@0.6A

Switching regulators

VLDO2

0.80 to 1.55 V @250 mA

VLDO1

1.8 to 3.3 V @100 mA

VCC_SD

1.80 to 1.85 V @ 100 mA

or 2.85 to 3.3 V @ 100 mA

V33

2.85 - 3.3 V @ 350 mA

VLDO3

1.8 - 3.3 V @ 100 mA

VLDO4

1.8 - 3.3 V @ 350 mA

RESETBMCU

PWRON

SD_VSEL

STANDBY

Linear

regulators

Parallel control/GPIOS

INTB

Processor SOC

Processor

ARM Core

DDR MEMORY

INTERFACE

SATA - FLASH

NAND - NOR

Interfaces

Analog Integrated Circuit Device Data

2Freescale Semiconductor

PF3000

Table of Contents

1 Orderable Parts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 Internal Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4 Pin Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

4.1 Pinout Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

4.2 Pin Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5 General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

5.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

5.2 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

5.3 Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

5.4 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

6 Functional Description and Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

2.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

6 Functional Description and Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

6.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

6.2 Power Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

6.3 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

6.3.1 Control Logic & Interface Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

6.3.2 One-time-programmable Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

6.3.4 16 MHz and 32 kHz Clocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

6.3.5 Optional Front-end Input LDO Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

6.3.6 Internal Core Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

6.3.7 VREFDDR Voltage Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

6.3.8 Buck Regulators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

6.3.9 Boost Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

6.3.10 LDO Regulators Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

6.3.11 VSNVS LDO/Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

6.4 Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

6.5 Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

6.5.1 State Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54

6.5.2 State Machine Flow Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

6.5.3 Performance Characteristics Curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58

6.6 Control Interface I2C Block Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

6.6.1 I2C Device ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62

6.6.2 I2C Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62

6.6.3 Interrupt Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .63

6.6.4 Interrupt Bit Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .63

6.6.5 Specific Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68

6.6.6 Register Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .102

7 Typical Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110

7.1 Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110

8 Bill of Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111

9 Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114

9.1 Rating Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114

9.2 Estimation of Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114

10 Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115

10.1Packaging Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115

11 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118

Analog Integrated Circuit Device Data

Freescale Semiconductor 3

PF3000

ORDERABLE PARTS

1 Orderable Parts

The PF3000 is available with pre-programmed OTP memory configurations. The devices are identified using the program codes from

Ta b l e 1 . Details of the OTP programming for each device can be found in Table 42.

Table 1. Orderable Part Variations

Part Number Temperature (TA)Package Programming Options Qualification Tier Notes

MC32PF3000A0EP

-40 °C to 85 °C

48 QFN 7.0 mm x 7.0 mm

with exposed pad

0 - Not programmed

Consumer (1)

MC32PF3000A1EP 1 (i.MX 7 with DDR3L)

MC32PF3000A2EP 2 (i.MX 7 with LPDDR3)

MC32PF3000A3EP 3 (i.MX 6 Series with DDR3L)

MC32PF3000A4EP 4 (i.MX 6 Series with DDR3)

MC32PF3000A5EP 5 (i.MX 6 Series with LPDDR2)

MC32PF3000A6EP 6 (i.MX 6UL with LPDDR2)

MC32PF3000A7EP 7 (i.MX 6UL with DDR3L)

MC34PF3000A0EP

-40 °C to 105 °C

0 - Not programmed

Industrial (1)

MC34PF3000A1EP 1 (i.MX 7 with DDR3L)

MC34PF3000A2EP 2 (i.MX 7 with LPDDR3)

MC34PF3000A3EP 3 (i.MX 6 Series with DDR3L)

MC34PF3000A4EP 4 (i.MX 6 Series with DDR3)

MC34PF3000A5EP 5 (i.MX 6 Series with LPDDR2)

MC34PF3000A6EP 6 (i.MX 6UL with LPDDR2)

MC34PF3000A7EP 7 (i.MX 6UL with DDR3L)

Notes

1. For Tape and Reel, add an R2 suffix to the part number.

Analog Integrated Circuit Device Data

4Freescale Semiconductor

PF3000

GENERAL DESCRIPTION

2 General Description

The PF3000 is the Power Management Integrated Circuit (PMIC) designed primarily for use with Freescale’s i.MX 7 series of multi-media

application processors. It is also capable of providing full power solution to i.MX 6SL/SX/UL processors.

2.1 Features

This section summarizes the PF3000 features.

• Input voltage range to PMIC: 2.8 V to 4.5 V, or 3.7 V to 5.5 V (2)

• Buck regulators

• Configurable three to four channels

• SW1A/B, 2.75 A (single); 0.7 V to 1.425 V, 1.8 V, 3.3 V

•SW1A, 1.0 A (independent); 0.7 V to 1.425 V, 1.8 V, 3.3 V

• SW1B 1.75 A (independent); 0.7 V to 1.475 V

• SW2, 1.25 A; 1.50 V to 1.85 V or 2.50 V to 3.30 V

•SW3, 1.5 A; 0.90 V to 1.65 V

• Dynamic voltage scaling

• Modes: PWM, PFM, APS

• Programmable output voltage

• Programmable current limit

• Programmable soft start sequence

• Programmable PWM switching frequency

• Boost regulator

• SWBST, 5.0 to 5.15 V, 0.6 A, OTG support

• Modes: PFM and Auto

• OCP fault interrupt

•LDOs

• VCC_SD, 1.8 V to 1.85 V or 2.85 V to 3.30 V, 100 mA based on SD_VSEL

• V33, 2.85 V to 3.30 V, 350 mA

• VLDO1, 1.8 V to 3.3 V, 100 mA

• VLDO2, 0.80 V to 1.55 V, 250 mA

• VLDO3, 1.8 V to 3.3 V, 100 mA

• VLDO4, 1.8 V to 3.3 V, 350 mA

• Always ON RTC Regulator/Switch VSNVS 3.0 V, 1.0 mA

• DDR memory reference voltage, VREFDDR, 0.5 V to 0.9 V, 10 mA

• OTP (One time programmable) memory for device configuration, user-programmable start-up sequence and timing

• Battery backed memory including coin cell charger

•I

2C interface

• User programmable Standby, Sleep/LPSR, and Off modes

Notes

2. 2.8 V to 4.5 V when VIN is used at input. 3.7 V to 5.5 V when VPWR is used as input.

Analog Integrated Circuit Device Data

Freescale Semiconductor 5

PF3000

GENERAL DESCRIPTION

2.2 Functional Block Diagram

Figure 2. Functional Block Diagram

Logic and Control

Switching Regulators

SW1A

(0.7 V to 1.425 V,

1.8 V, 3.3 V, 1.0 A)

Linear Regulators

SW2

(1.50 V to 1.85 V, 1.25 A)

or (2.50 V to 3.30 V, 1.25 A)

SW3

(0.90 V to 1.65 V, 1.5 A)

Boost Regulator

(5.0 V to 5.15 V, 600 mA)

USB OTG Supply

VLDO1

(1.8 V to 3.3 V, 100 mA)

VLDO2

(0.80 V to 1.55 V, 250 mA)

VCC_SD

(1.80 V or 1.85 V, 100 mA)

or (2.85 V or 3.3 V, 100 mA)

V33

( 2.85 V to 3.30 V, 350 mA)

VLDO3

(1.8 V to 3.3 V, 100 mA)

VLDO4

(1.8 V to 3.3 V, 350 mA)

Bias & References

Parallel MCU Interface Regulator Control

VSNVS

(1.0 V to 3.0 V, 1.0 mA)

RTC supply with coin cell

charger

PF3000 Functional Internal Block Diagram

I2C Communication & Registers

Power Generation

Fault Detection and Protection

DDR Voltage Reference

Current Limit

VPWR Front End LDO Overvoltage Indicator

Internal Core Voltage Reference

Thermal

OTP Startup Configuration

Sequence and

Timing

OTP Prototyping

(Try before burn) Voltage

Phasing and

Frequency Selection

SW1B

(0.70 V to 1.475 V , 1.75 A)

Analog Integrated Circuit Device Data

6Freescale Semiconductor

PF3000

INTERNAL BLOCK DIAGRAM

3 Internal Block Diagram

Figure 3. PF3000 Simplified Internal Block Diagram

VIN

INTB

LICELL

SWBSTFB

SWBSTLX

O/P

Drive

SWBST

600 mA

Boost

PWRON

STANDBY

ICTEST

SCL

SDA

VDDIO

SW3

1.5A

Buck

VCOREDIG

VCOREREF

SD_VSEL

GNDREF

SW1AIN

SW1AFB

SW1ALX

SW1BLX

SW1A

Buck

VSNVS

Li Cell

Charger

RESETBMCU

SW2

1.25A

Buck

VLDO1

100 mA

VLDO1

VLDO1IN

VLDO2

250 mA

VLDO2

VCC_SD

1.8V/3.15V

100 mA

VCC_SD

V33

2.85V- 3.30V

350 mA

V33

VLDO3

100 mA

VLDO3

VLDO34IN

VLDO4

350 mA

VLDO4

Best

Supply

OTP

VREFDDR

VDDOTP

VINREFDDR

VHALF

VCORE

PF3000

CONTROL

Clocks

32 kHz and 16 MHz

Initialization State Machine

I2C

Interface

Clocks and

resets

I2C Register

map

Trim-In-Package

O/P

Drive

O/P

Drive SW1BIN

SW2FB

SW2LX

O/P

Drive

SW2IN

SW3IN

SW3FB

SW3LX

O/P

Drive

GNDREF2

Supplies

Control

DVS Control

DVS CONTROL

Reference

Generation

Core Control logic

GNDREF2

GNDREF1

SW1B

1.75A

Buck

SW1BFB

LDO

LDOG

VPWR

VLDO2IN

VREF

VIN2

Analog Integrated Circuit Device Data

Freescale Semiconductor 7

PF3000

PIN CONNECTIONS

4 Pin Connections

4.1 Pinout Diagram

Figure 4. Pinout Diagram

INTB

SD_VSEL

RESETBMCU

STANDBY

ICTEST

SW1AFB

SW1AIN

SW1ALX

SW1BLX

SW1BIN

SW1BFB

GNDREF1

VLDO1IN

VLDO1

VLDO2

VLDO2IN

SW2LX

SW2IN

SW2FB

VLDO3

VLDO34IN

VLDO4

VHALF

VINREFDDR

PWRON

VDDIO

SCL

SDA

VCOREREF

VCOREDIG

VIN

VCORE

GNDREF

VDDOTP

VIN2

SWBSTFB

LICELL

SWBSTLX

VSNVS

VCC_SD

V33

VPWR

LDOG

SW3LX

SW3IN

SW3FB

GNDREF2

VREFDDR

Transparent Top View

Analog Integrated Circuit Device Data

8Freescale Semiconductor

PF3000

PIN CONNECTIONS

4.2 Pin Definitions

Table 2. Pin Definitions

Pin Number Pin Name Pin

Function Type Definition

1 INTB O Digital Open drain interrupt signal to processor

2 SD_VSEL I/O Digital

Input from i.MX processor to select VCC_SD regulator voltage

• SD_VSEL=0, VCC_SD = 2.85 V to 3.3 V

• SD_VSEL= 1, VCC_SD = 1.8 V to 1.85 V

3 RESETBMCU O Digital Open drain reset output to processor

4 STANDBY I Digital Standby input signal from processor

5 ICTEST I Digital and

Analog Reserved pin. Connect to GND in application

6 SW1AFB (3) I Analog

SW1A output voltage feedback pin. Route this trace separately from the high current

path and terminate at the output capacitance or near the load, if possible for best

regulation

7SW1AIN

(3) I Analog Input to SW1A regulator. Bypass with at least a 10 µF ceramic capacitor and a 0.1 µF

decoupling capacitor as close to the pin as possible

8 SW1ALX (3) O Analog

Switcher 1A switch node connection. Connect to SW1A inductor when used in SW1A

independent mode. Connect to SW1BLX and connect to SW1AB inductor when using

SW1A/B as a single regulator

9 SW1BLX (3) O Analog

Switcher 1B switch node connection. Connect to SW1B inductor when used in SW1B

independent mode. Connect to SW1ALX and connect to SW1AB inductor when using

SW1A/B as a single regulator

10 SW1BIN (3) I Analog Input to SW1B regulator. Bypass with at least a 10 µF ceramic capacitor and a 0.1 µF

decoupling capacitor as close to the pin as possible

11 SW1BFB (3) I Analog SW1B output voltage feedback pin. Route this trace separately from the high current

path and terminate at the output capacitor or near the load, if possible for best regulation

12 GNDREF1 GND GND Ground reference for SW1A/B. Connect to GND. Keep away from high current ground

return paths

13 VLDO1IN I Analog VLDO1 input supply. Bypass with a 1.0 µF decoupling capacitor as close to the pin as

possible

14 VLDO1 O Analog VLDO1 regulator output. Bypass with a 2.2 µF ceramic output capacitor

15 VLDO2 O Analog VLDO2 regulator output. Bypass with a 4.7 µF ceramic output capacitor

16 VLDO2IN I Analog VLDO2 input supply. Bypass with a 1.0 µF decoupling capacitor as close to the pin as

possible

17 SW2LX (3) O Analog Switcher 2 switch node connection.Connect to SW2 inductor

18 SW2IN (3) I Analog Input to SW2 regulator. Bypass with at least a 10 µF ceramic capacitor and a 0.1 µF

decoupling capacitor as close to the pin as possible

19 SW2FB (3) I Analog SW2 output voltage feedback pin. Route this trace separately from the high current path

and terminate at the output capacitor or near the load, if possible for best regulation

20 VLDO3 O Analog VLDO3 regulator output. Bypass with a 2.2 µF ceramic output capacitor

21 VLDO34IN I Analog VLDO3 and VLDO4 input supply. Bypass with a 1.0 µF decoupling capacitor as close to

the pin as possible

22 VLDO4 O Analog VLDO4 regulator output. Bypass with a 2.2 µF ceramic output capacitor

23 VHALF I Analog Half supply reference for VREFDDR. Bypass with 0.1 µF to ground.

24 VINREFDDR I Analog VREFDDR regulator input. Connect a 0.1 µF capacitor between VINREFDDR and

VHALF pin. Ensure there is at least 1.0 µF net capacitance from VINREFDDR to ground

25 VREFDDR O Analog VREFDDR regulator output.Bypass with 1.0 µF to ground

Analog Integrated Circuit Device Data

Freescale Semiconductor 9

PF3000

PIN CONNECTIONS

26 GNDREF2 GND GND Reference ground for SW2 and SW3 regulators. Connect to GND. Keep away from high

current ground return paths

27 SW3FB (3) I Analog SW3 output voltage feedback pin. Route this trace separately from the high current path

and terminate at the output capacitor or near the load, if possible for best regulation

28 SW3IN (3) I Analog Input to SW3 regulator. Bypass with at least a 10 µF ceramic capacitor and a 0.1 µF

decoupling capacitor as close to the pin as possible

29 SW3LX (3) O Analog Switcher 3 switch node connection. Connect the SW3 inductor

30 LDOG O Analog Connect to gate of front-end LDO external pass P-MOSFET. Leave floating if VPWR

LDO is not used

31 VPWR I Analog Input to optional front-end VPWR LDO for systems with input voltage > 4.5 V

32 V33 O Analog V33 regulator output. Bypass with a 4.7 µF ceramic output capacitor

33 VCC_SD O Analog Output of VCC_SD regulator. Bypass with a 2.2 µF ceramic output capacitor.

34 VSNVS O Analog VSNVS regulator/switch output. Bypass with 0.47 µF capacitor to ground.

35 SWBSTLX (3) I/O Analog SWBST switch node connection. Connect to SWBST inductor and anode of Schottky

diode

36 LICELL I/O Analog Coin cell supply input/output. Bypass with 0.1 µF capacitor. Connect to optional coin cell.

37 SWBSTFB (3) I Analog SWBST output voltage feedback pin. Route this trace separately from the high current

path and terminate at the output capacitor

38 VIN2 I Analog Input to VCC_SD, V33 regulators and SWBST control circuitry. Connect to VIN rail and

bypass with 10 µF capacitor

39 VDDOTP I Digital &

Analog Supply to program OTP fuses. Connect VDDOTP to GND during normal application

40 GNDREF GND GND Ground reference for IC core circuitry. Connect to ground. Keep away from high current

ground return paths

41 VCORE O Analog Internal analog core supply. Bypass with 1 µF capacitor to ground

42 VIN I Analog

Main IC supply. Bypass with 1.0 µF capacitor to ground. Connect to system input supply

if voltage  4.5 V. Connect to drain of external PFET when VPWR LDO is used for

systems with input voltage > 4.5 V

43 VCOREDIG O Analog Internal digital core supply. Bypass with 1.0 µF capacitor to ground

44 VCOREREF O Analog Main band gap reference. Bypass with 220 nF capacitor to ground

45 SDA I/O Digital I2C data line (open drain). Pull up to VDDIO with a 4.7 kΩ resistor

46 SCL I Digital I2C clock. Pull up to VDDIO with a 4.7 kΩ resistor

47 VDDIO I Analog Supply for I2C bus. Bypass with 0.1 µF ceramic capacitor. Connect to 1.7 to 3.6 V

supply. Ensure that VDDIO is always lesser than or equal to VIN

48 PWRON I Digital Power ON/OFF input from processor

-EPGNDGND

Expose pad. Functions as ground return for buck and boost regulators. Tie this pad to

the inner and external ground planes through vias to allow effective thermal dissipation

Notes

3. Unused switching regulators should be connected as follows: Pins SWxLX and SWxFB should be unconnected and Pin SWxIN should be

connected to VIN with a 0.1 F bypass capacitor.

Table 2. Pin Definitions (continued)

Analog Integrated Circuit Device Data

10 Freescale Semiconductor

PF3000

GENERAL PRODUCT CHARACTERISTICS

5 General Product Characteristics

5.1 Absolute Maximum Ratings

Table 3. Absolute Maximum Voltage Ratings

All voltages are with respect to ground, unless otherwise noted. Exceeding these ratings may cause malfunction or permanent damage

to the device. The detailed maximum voltage rating per pin can be found in the pin list section.

Symbol Description Value Unit Notes

ELECTRICAL RATINGS

VPWR, ICTEST, LDOG, SWBSTLX – -0.3 to 7.5 V

VIN, VIN2, VLDO1IN, VLDO34IN, SW1AIN,

SW1BIN, SW2IN, SW3IN, SW1ALX, SW1BLX,

SW2LX, SW3LX

– -0.3 to 4.8 V

VDDOTP OTP programming input supply voltage -0.3 to 10.0 V (4)

SWBSTFB Boost switcher feedback -0.3 to 5.5 V

INTB, SD_VSEL, RESETBMCU, STANDBY,

SW1AFB, SW1BFB, SW2FB, SW3FB, VLDO1,

VLDO2IN, VLDO3, VLDO4, VHALF,

VINREFDDR, VREFDDR, V33, VCC_SD,

VSNVS, LICELL, VCORE, SDA, SCL, VDDIO,

PWRON

– -0.3 to 3.6 V

VLDO2 VLDO2 Linear regulator output -0.3 to 2.5 V

VCOREDIG Digital core supply voltage output -0.3 to 1.65 V

VCOREREF Bandgap reference voltage output -0.3 to 1.5 V

VESD

ESD Ratings

• Human Body Model

• Charge Device Model

2000

500

V(5)

Notes

4. 10 V Maximum voltage rating during OTP fuse programming. 7.5 V Maximum DC voltage rated otherwise.

5. ESD testing is performed in accordance with the Human Body Model (HBM) (CZAP = 100 pF, RZAP = 1500 ), and the Charge Device Model

(CDM), Robotic (CZAP = 4.0 pF).

Analog Integrated Circuit Device Data

Freescale Semiconductor 11

PF3000

GENERAL PRODUCT CHARACTERISTICS

5.2 Thermal Characteristics

Table 4. Thermal Ratings

Symbol Description (Rating) Min. Max. Unit Notes

THERMAL RATINGS

Ambient Operating Temperature Range

• Industrial version

• Consumer version

-40

105

C

TJOperating Junction Temperature Range -40 125 C(6)

TST Storage Temperature Range -65 150 C

TPPRT Peak Package Reflow Temperature – (8) C(7) (8)

QFN48 THERMAL RESISTANCE AND PACKAGE DISSIPATION RATINGS

RJA

Junction to Ambient, Natural Convection

• Four layer board (2s2p)

• Eight layer board (2s6p)

–

°C/W

(9) (10)

(11)

RJB Junction to Board – 11 °C/W (12)

RJCBOTTOM Junction to Case Bottom – 1.4 °C/W (13)

JT Junction to Package Top

• Natural Convection – 1.3 °C/W (14)

Notes

6. Do not operate beyond 125 °C for extended periods of time. Operation above 150 °C may cause permanent damage to the IC. See Thermal

Protection Thresholds for thermal protection features.

7. Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may cause a

malfunction or permanent damage to the device.

8. Freescale's package reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For peak package reflow temperature and

moisture sensitivity levels (MSL), Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view

all orderable parts (i.e. MC33xxxD enter 33xxx), and review parametrics..

9. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient

temperature, air flow, power dissipation of other components on the board, and board thermal resistance.

10. The Board uses the JEDEC specifications for thermal testing (and simulation) JESD51-7 and JESD51-5.

11. Per JEDEC JESD51-6 with the board horizontal.

12. Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is measured on the top surface of the

board near the package.

13. Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method 1012.1).

14. Thermal characterization parameter indicating the temperature difference between package top and the junction temperature per JEDEC 

JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JT (JT).

Analog Integrated Circuit Device Data

12 Freescale Semiconductor

PF3000

GENERAL PRODUCT CHARACTERISTICS

5.3 Current Consumption

The current consumption of the individual blocks is described in detail in the following table.

Table 5. Current Consumption Summary

TA= -40 °C to 105 °C, VPWR= 0 V (External pass FET is not populated), VIN = 3.6 V, VDDIO = 1.7 V to 3.6 V, LICELL = 1.8 V to 3.3 V,

VSNVS = 3.0 V, typical external component values, unless otherwise noted. Typical values are characterized at VIN = 3.6 V, VPWR = 0 V,

VDDIO = 3.3 V, LICELL = 3.0 V, VSNVS = 3.0 V and 25 °C, unless otherwise noted.

Mode PF3000 Conditions System Conditions Typical MAX Unit Notes

Coin Cell VSNVS from LICELL, All other blocks

off, VIN = 0.0 V No load on VSNVS 4.0 7.0 A(15) (16)

Off

VSNVS from VIN or LICELL

Wake-up from PWRON active

32 kHz RC on

All other blocks off

VIN UVDET

No load on VSNVS, PMIC able to

wake-up 16 25 A(15) (16)

Sleep LPSR

VSNVS from VIN

Wake-up from PWRON active

Trimmed reference active

SW3 PFM. All other regulators off.

Trimmed 16 MHz RC off

32 kHz RC on

VREFDDR disabled

No load on any of the regulators. 130 (15)

200 (18) 220 (15) A(17)

LDO1 & LDO3 activated in addition to

SW3 No load on any of the regulators. 170 (15)

260 (18) 248 (15) A(17)

Standby

VSNVS from either VIN or LICELL

SW1A in PFM

SW1B in PFM

SW2 in PFM

SW3 in PFM

SWBST off

Trimmed 16 MHz RC enabled

Trimmed reference active

VLDO1-4 enabled

V33 enabled

VCC_SD enabled

VREFDDR enabled

No load on any of the regulators. 297 450 A(17)

VSNVS from VIN

SW1A in APS

SW1B in APS

SW2 in APS

SW3 in APS

SWBST off

Trimmed 16 MHz RC enabled

Trimmed reference active

VLDO1-4 enabled

V33 enabled

VCC_SD enabled

VREFDDR enabled

No load on any of the regulators. 1.2 mA

Notes

15. At 25 °C only.

16. When VIN is below the UVDET threshold, in the range of 1.8 V VIN < 2.65 V, the quiescent current increases by 50 A, typically.

17. For PFM operation, headroom should be 300 mV or greater.

18. At 105 °C only.

Analog Integrated Circuit Device Data

Freescale Semiconductor 13

PF3000

GENERAL PRODUCT CHARACTERISTICS

5.4 Electrical Characteristics

Table 6. Electrical Characteristics – Front-end Input LDO

All parameters are specified at TA = -40 °C to 105 °C, VPWR = 5.0 V, VIN = 4.4 V, IVIN = 300 mA, typical external component values, unless

otherwise noted. Typical values are characterized at VPWR = 5.0 V, VIN = 4.4 V, IVIN = 300 mA, and 25 °C, unless otherwise noted.

Symbol Parameter Min Typ Max Unit Notes

FRONT END INPUT LDO (VPWR LDO)

VPWR

Operating Input Voltage

• In Regulation

• In Dropout Operation

4.6

3.7

–

5.5

4.6

V (19)

VIN

On Mode Output Voltage, 4.6 V < VPWR < 5.5 V, 

0.0 mA < IVIN < 3000 mA 4.3 4.4 4.55 V

IVIN Operating Load Current at VIN, 3.7 V < VPWR < 5.5 V 0.0 – 3.0 A

ILDOGQ ON mode Quiescent Current, No load, – 5.0 10 mA

VIN

Low Power Mode Output Voltage, 4.6 V < VPWR < 5.5 V 

0.0 mA < IVIN < 1.0 mA 3.7 4.5 V

VIN_OFF

Off Mode Output Voltage, (CL = 100 F) 4.6 V < VPWR < 5.5 V, 

0.0 mA < IVIN < 35 A3.2 4.8 V

ILDOQLP

Low Power Mode Quiescent Current, No load (Standby/Sleep/LPSR

states) – 150 300 A

VPWRUV

VPWR Under Voltage Threshold (Upon undervoltage condition the

external pass FET is turned off) 3.1 – 3.7 V

VPWROV

VPWR Overvoltage Threshold (Upon overvoltage condition interrupt is

asserted at INTB) 5.5 – 6.5 V

IVINUVILIMIT VPWR LDO Current Limit under VIN short circuit (Vin < UVDET) – – 300 mA

IVINLEAKAGE

Reverse Leakage current from VIN to VPWR, No external pass FET,

VPWR is grounded, device is in OFF state ––1.0µA

IVPWROFF VPWR LDO Off Mode Quiescent Current – – 75 A(20)

Notes

19. While the front end LDO can handle spikes up to 7.5 V at VPWR for as long as 200 µs, the circuit is not expected to be continuously operated

when VPWR is above 5.5 V.

20. This specification gives the leakage current in the VPWR LDO block. Total OFF mode current includes the quiescent current from the other blocks

as specified in Table 5.

Analog Integrated Circuit Device Data

14 Freescale Semiconductor

PF3000

GENERAL PRODUCT CHARACTERISTICS

Table 7. Static Electrical Characteristics – SW1

All parameters are specified at TA = -40 °C to 105 °C, VIN = VSW1xIN = 3.6 V, VSW1x = 1.2 V, ISW1x = 100 mA, typical external component

values, fSW1x = 2.0 MHz, unless otherwise noted. Typical values are characterized at VIN = VSW1xIN = 3.6 V, VSW1x = 1.2 V, 

ISW1x = 100 mA, and 25 °C, unless otherwise noted.

Symbol Parameter Min Typ Max Unit Notes

SWITCH MODE SUPPLY SW1A/B (SINGLE PHASE)

VSW1AIN

VSW1BIN

Operating Input Voltage 2.8 – 4.5 V (21), (22)

VSW1AB Nominal Output Voltage – Table 53 –V

VSW1ABACC

Output Voltage Accuracy

• PWM, APS, 2.8 V < VSW1xIN < 4.5 V, 0 < ISW1AB < 2.75 A

0.7 V  VSW1AB 1.2 V

• PFM, APS, 2.8 V < VSW1xIN < 4.5 V, 0 < ISW1AB < 2.75A

1.225 V < VSW1AB < 1.425 V

• PFM, steady state, 2.8 V < VSW1xIN < 4.5 V, 0 < ISW1AB < 150 mA

1.8 V VSW1AB  1.425 V

• PWM, APS, 2.8 V < VSW1xIN < 4.5 V, 0 < ISW1AB < 2.75A

1.8 V < VSW1AB < 3.3 V

• PFM, steady state, 2.8 V < VSW1xIN < 4.5 V, 0 < ISW1AB < 150 mA

1.8 V VSW1AB 3.3 V

-25

-45

-6.0

–

6.0

ISW1AB

Rated Output Load Current,

• 2.8 V  VSW1xIN  4.5 V, 0.7 V < VSW1AB < 1.425 V, 1.8V, 3.3V 2750 – – mA

ISW1ABQ

Quiescent Current

• PFM Mode

• APS Mode

–

300

–

µA

ISW1ABLIM

Current Limiter Peak Current Detection , Current through Inductor

• SW1xILIM = 0

• SW1xILIM = 1

3.5

2.6

5.5

4.0

7.5

5.4

VSW1AB Output Ripple – 5.0 – mV

RSW1ABDIS Discharge Resistance – 600 – 

SWITCH MODE SUPPLY SW1A (INDEPENDENT)

VSW1AIN Operating Input Voltage 2.8 – 4.5 V (21), (22)

VSW1A Nominal Output Voltage – Table 53 –V

VSW1AACC

Output Voltage Accuracy

• PWM, APS, 2.8 V < VSW1AIN < 4.5 V, 0 < ISW1A < 1.0 A

0.7 V  VSW1A 1.2 V

• PFM, APS, 2.8 V < VSW1AIN < 4.5 V, 0 < ISW1A < 1.0 A

1.225 V < VSW1A < 1.425 V

• PFM, steady state, 2.8 V < VSW1AIN < 4.5 V, 0 < ISW1A < 50 mA

0.7 V VSW1A  1.425V

• PWM, APS, 2.8 V < VSW1AIN < 4.5 V, 0 < ISW1A < 1.0 A

1.8 V < VSW1A < 3.3 V

• PFM, steady state, 2.8 V < VSW1AIN < 4.5 V, 0 < ISW1A < 50 mA

1.8 V VSW1A 3.3 V

-25

-45

-6.0

–

6.0

ISW1A

Rated Output Load Current

2.8 V < VSW1AIN < 4.5 V, 0.7 V < VSW1A < 1.425 V, 1.8V, 3.3V 1000 – – mA

Notes

21. The maximum operating input voltage is 4.55 V when VPWR LDO is used

22. Minimum operating voltage is 2.8 V with a valid LICELL voltage (1.8 V to 3.3 V). Minimum operating voltage is 3.1 V when no voltage is applied

at the LICELL pin. If operation down to 2.8 V is required for systems without a coin cell, connect the LICELL pin to any system voltage between

1.8 V and 3.3 V. This voltage can be an output from any PF3000 regulator, or external system supply.

Analog Integrated Circuit Device Data

Freescale Semiconductor 15

PF3000

GENERAL PRODUCT CHARACTERISTICS

SWITCH MODE SUPPLY SW1A (INDEPENDENT) (CONTINUED)

ISW1AQ

Quiescent Current

• PFM Mode

• APS Mode

–

250

–

µA

ISW1ALIM

Current Limiter Peak Current Detection, Current through Inductor

• SW1AILIM = 0

• SW1AILIM = 1

1.78

1.3

2.75

2.0

3.7

2.7

VSW1A Output Ripple – 5.0 – mV

RONSW1AP SW1A P-MOSFET RDSON, at VSW1AIN = 3.3 V – 265 295 m

RONSW1AN SW1A N-MOSFET RDSON, at VSW1AIN = 3.3 V – 300 370 m

ISW1APQ SW1A P-MOSFET Leakage Current, VSW1AIN = 4.5 V ––10.5µA

ISW1ANQ SW1A N-MOSFET Leakage Current, VSW1AIN = 4.5 V ––3.5µA

RSW1ADIS Discharge Resistance – 600 – 

SWITCH MODE SUPPLY SW1B (INDEPENDENT)

VSW1BIN Operating Input Voltage 2.8 – 4.5 V (23), (24)

VSW1B Nominal Output Voltage – Table 53 –V

VSW1BACC

Output Voltage Accuracy

• PWM, APS, 2.8 V < VSW1BIN < 4.5 V, 0 < ISW1B < 1.75 A

0.7 V < VSW1B < 1.2 V

• PWM, APS, 2.8 V < VSW1BIN < 4.5 V, 0 < ISW1B < 1.75 A

1.225 V < VSW1B < 1.475 V

• PFM, steady state 2.8 V < VSW1BIN < 4.5 V, 0 < ISW1B < 50 mA

0.7 V < VSW1B < 1.475 V

-25

-45

–

ISW1B

Rated Output Load Current

2.8 V < VSW1BIN < 4.5 V, 0.7 V < VSW1B < 1.475 V 1750 – – mA

ISW1BQ

Quiescent Current

• PFM Mode

• APS Mode

–

150

–

µA

ISW1BLIM

Current Limiter Peak Current Detection, Current through Inductor

• SW1BILIM = 0

• SW1BILIM = 1

2.4

1.725

3.50

2.65

4.725

3.575

VSW1B Output Ripple – 5.0 – mV

RONSW1BP SW1B P-MOSFET RDSON, at VSW1BIN = 3.3 V – 195 225 m

RONSW1BN SW1B N-MOSFET RDSON, at VSW1BIN = 3.3 V – 228 295 m

ISW1BPQ SW1B P-MOSFET Leakage Current, VSW1BIN = 4.5 V ––12µA

ISW1BNQ SW1B N-MOSFET Leakage Current, VSW1BIN = 4.5 V ––4.0µA

RSW1BDIS Discharge Resistance During OFF Mode – 600 – 

Notes

23. The maximum operating input voltage is 4.55 V when VPWR LDO is used.

24. Minimum operating voltage is 2.8 V with a valid LICELL voltage (1.8 V to 3.3 V). Minimum operating voltage is 3.1 V when no voltage is applied

at the LICELL pin. If operation down to 2.8 V is required for systems without a coin cell, connect the LICELL pin to any system voltage between

1.8 V and 3.3 V. This voltage can be an output from any PF3000 regulator, or external system supply.

Table 7. Static Electrical Characteristics – SW1 (continued)

All parameters are specified at TA = -40 °C to 105 °C, VIN = VSW1xIN = 3.6 V, VSW1x = 1.2 V, ISW1x = 100 mA, typical external component

values, fSW1x = 2.0 MHz, unless otherwise noted. Typical values are characterized at VIN = VSW1xIN = 3.6 V, VSW1x = 1.2 V, 

ISW1x = 100 mA, and 25 °C, unless otherwise noted.

Symbol Parameter Min Typ Max Unit Notes

Analog Integrated Circuit Device Data

16 Freescale Semiconductor

PF3000

GENERAL PRODUCT CHARACTERISTICS

Table 8. Dynamic Electrical Characteristics - SW1

All parameters are specified at TA = -40 °C to 105 °C, VIN = VSW1xIN = 3.6 V, VSW1x = 1.2 V, ISW1x = 100 mA, typical external component

values, fSW1x = 2.0 MHz, unless otherwise noted. Typical values are characterized at VIN = VSW1xIN = 3.6 V, VSW1x = 1.2 V, ISW1x =

100 mA, and 25 °C, unless otherwise noted.

Symbol Parameter Min Typ Max Unit Notes

SWITCH MODE SUPPLY SW1A/B (SINGLE PHASE)

VSW1ABOSH

Start-up Overshoot, ISW1AB = 0 mA, DVS clk = 25 mV/4 s, VIN =

VSW1xIN = 4.5 V, VSW1AB = 1.425 V ––66mV

tONSW1AB

Turn-on Time, Enable to 90% of end value, ISW1AB = 0 mA, DVS clk =

25 mV/4 s, VIN = VSW1xIN = 4.5 V, VSW1AB = 1.425 V – – 500 µs

SWITCH MODE SUPPLY SW1A (INDEPENDENT)

VSW1AOSH

Start-up Overshoot, ISW1A = 0 mA, DVS clk = 25 mV/4.0 s, VIN =

VSW1AIN = 4.5 V, VSW1A = 1.425 V ––66mV

tONSW1A

Turn-on Time, Enable to 90% of end value, ISW1A = 0 mA, DVS clk =

25 mV/4.0 s, VIN = VSW1AIN = 4.5 V, VSW1A = 1.425 V – – 500 µs

SWITCH MODE SUPPLY SW1B (INDEPENDENT)

VSW1BOSH

Start-up Overshoot, ISW1B = 0 mA, DVS clk = 25 mV/4.0 s, VIN =

VSW1BIN = 4.5 V, VSW1B = 1.475 V ––66mV

tONSW1B

Turn-on Time, Enable to 90% of end value, ISW1B = 0 mA, DVS clk =

25 mV/4 s, VIN = VSW1BIN = 4.5 V, VSW1B = 1.475 V – – 500 µs

Table 9. Static Electrical Characteristics – SW2

All parameters are specified at TA = -40 °C to 105 °C, VIN = VSW2IN = 3.6 V, VSW2 = 3.15 V, ISW2 = 100 mA, typical external component

values, fSW2 = 2.0 MHz, unless otherwise noted. Typical values are characterized at VIN = VSW2IN = 3.6 V, VSW2 = 3.15 V, ISW2 = 100 mA,

and 25 °C, unless otherwise noted.

Symbol Parameter Min Typ Max Unit Notes

SWITCH MODE SUPPLY SW2

VSW2IN Operating Input Voltage 2.8 – 4.5 V (25), (26)

VSW2 Nominal Output Voltage – Table 55 –V

VSW2ACC

Output Voltage Accuracy

• PWM, APS, 2.8 V  VSW2IN  4.5 V, 0  ISW2  1.25 A

• 1.50 V  VSW2  1.85 V

• 2.5 V  VSW2  3.3 V

• PFM, 2.8 V  VSW2IN  4.5 V, 0  ISW2 50 mA

• 1.50 V  VSW2  1.85 V

• 2.5 V  VSW2  3.3 V

-3.0%

-6.0%

–

3.0%

6.0%

ISW2

Rated Output Load Current, 

2.8 V < VSW2IN < 4.5 V, 1.50 V < VSW2 < 1.85 V, 2.5 V < VSW2 < 3.3 V 1250 – – mA (27)

ISW2Q

Quiescent Current

• PFM Mode

• APS Mode (Low output voltage settings)

• APS Mode (High output voltage settings, SW2_HI=1)

–

145

305

–

µA

Notes

25. The maximum operating input voltage is 4.55 V when VPWR LDO is used.

26. Minimum operating voltage is 2.8 V with a valid LICELL voltage (1.8 V to 3.3 V). Minimum operating voltage is 3.1 V when no voltage is applied at

the LICELL pin. If operation down to 2.8 V is required for systems without a coin cell, connect the LICELL pin to any system voltage between 1.8 V

and 3.3 V. This voltage can be an output from any PF3000 regulator, or external system supply.

27. The higher output voltages available depend on the voltage drop in the conduction path as given by the following equation: (VSW2IN - VSW2) = ISW2*

(DCR of Inductor +RONSW2P + PCB trace resistance).

Analog Integrated Circuit Device Data

Freescale Semiconductor 17

PF3000

GENERAL PRODUCT CHARACTERISTICS

SWITCH MODE SUPPLY SW2 (CONTINUED)

ISW2LIM

Current Limiter Peak Current Detection, Current through Inductor

• SW2ILIM = 0

• SW2ILIM = 1

1.625

1.235

2.5

1.9

3.375

2.565

VSW2 Output Ripple – 5.0 – mV

RONSW2P SW2 P-MOSFET RDSON at VIN = VSW2IN = 3.3 V – 215 245 m

RONSW2N SW2 N-MOSFET RDSON at VSW2IN = VSW2IN = 3.3 V – 258 326 m

ISW2PQ SW2 P-MOSFET Leakage Current, VIN = VSW2IN = 4.5 V – – 10.5 µA

ISW2NQ SW2 N-MOSFET Leakage Current, VIN = VSW2IN = 4.5 V ––3.0µA

RSW2DIS Discharge Resistance during OFF mode – 600 – 

Table 10. Dynamic Electrical Characteristics - SW2

All parameters are specified at TA = -40 °C to 105 °C, VIN = VSW2IN = 3.6 V, VSW2 = 3.15 V, ISW2 = 100 mA, typical external component

values, fSW2 = 2.0 MHz, unless otherwise noted. Typical values are characterized at VIN = VSW2IN = 3.6 V, VSW2 = 3.15 V, ISW2 = 100 mA,

and 25 °C, unless otherwise noted.

Symbol Parameter Min Typ Max Unit Notes

SWITCH MODE SUPPLY SW2

VSW2OSH

Start-up Overshoot, ISW2 = 0.0 mA, DVS clk = 25 mV/4 s, VIN =

VSW2IN = 4.5 V ––66mV

tONSW2

Turn-on Time, Enable to 90% of end value, ISW2 = 0.0 mA, DVS clk =

25 mV/4 s, VIN = VSW2IN = 4.5 V – – 500 µs

Table 11. Static Electrical Characteristics – SW3

All parameters are specified at TA = -40 °C to 105 °C, VIN = VSW3IN = 3.6 V, VSW3 = 1.5 V, ISW3 = 100 mA, typical external component

values, fSW3 = 2.0 MHz. Typical values are characterized at VIN = VSW3IN = 3.6 V, VSW3 = 1.5 V, ISW3 = 100 mA, and 25 °C, unless

otherwise noted.

Symbol Parameter Min Typ Max Unit Notes

SWITCH MODE SUPPLY SW3

VSW3IN Operating Input Voltage 2.8 – 4.5 V (28), (29)

VSW3 Nominal Output Voltage – Table 57 –V

VSW3ACC

Output Voltage Accuracy

• PWM, APS, 2.8 V < VSW3IN < 4.5 V, 0 < ISW3 < 1.5 A, 0.9 V < VSW3

< 1.65 V

• PFM, steady state (2.8 V < VSW3IN < 4.5 V, 0 < ISW3 < 50 mA), 0.9 V

< VSW3 < 1.65 V

-3.0%

-6.0%

–

3.0%

6.0%

ISW3

Rated Output Load Current, 2.8 V < VSW3IN < 4.5 V, 0.9 V < VSW3 <

1.65 V, PWM, APS mode 1500 – – mA (30)

Notes

28. The maximum operating input voltage is 4.55 V when VPWR LDO is used.

29. Minimum operating voltage is 2.8 V with a valid LICELL voltage (1.8 V to 3.3 V). Minimum operating voltage is 3.1 V when no voltage is applied at

the LICELL pin. If operation down to 2.8 V is required for systems without a coin cell, connect the LICELL pin to any system voltage between 1.8 V

and 3.3 V. This voltage can be an output from any PF3000 regulator, or external system supply.

30. The higher output voltages available depend on the voltage drop in the conduction path as given by the following equation: (VSW3IN - VSW3) =

ISW3* (DCR of Inductor +RONSW3P + PCB trace resistance).

Table 9. Static Electrical Characteristics – SW2 (continued)

All parameters are specified at TA = -40 °C to 105 °C, VIN = VSW2IN = 3.6 V, VSW2 = 3.15 V, ISW2 = 100 mA, typical external component

values, fSW2 = 2.0 MHz, unless otherwise noted. Typical values are characterized at VIN = VSW2IN = 3.6 V, VSW2 = 3.15 V, ISW2 = 100 mA,

and 25 °C, unless otherwise noted.

Symbol Parameter Min Typ Max Unit Notes

Analog Integrated Circuit Device Data

18 Freescale Semiconductor

PF3000

GENERAL PRODUCT CHARACTERISTICS

SWITCH MODE SUPPLY SW3 (CONTINUED)

ISW3Q

Quiescent Current

• PFM Mode

• APS Mode

–

150

–

µA

ISW3LIM

Current Limiter Peak Current Detection, Current through Inductor

• SW3ILIM = 0

• SW3ILIM = 1

1.95

1.45

3.0

2.25

4.05

3.05

VSW3 Output Ripple – 5.0 – mV

RONSW3P SW3 P-MOSFET RDSON at VIN = VSW3IN = 3.3 V – 205 235 m

RONSW3N SW3 N-MOSFET RDSON at VIN = VSW3IN = 3.3 V – 250 315 m

ISW3PQ SW3 P-MOSFET Leakage Current, VIN = VSW3IN = 4.5 V ––12µA

ISW3NQ SW3 N-MOSFET Leakage Current, VIN = VSW3IN = 4.5 V ––4.0µA

RSW3DIS Discharge Resistance During Off Mode – 600 – 

Table 12. Dynamic Electrical Characteristics - SW3

All parameters are specified at TA = -40 °C to 105 °C, VIN = VSW3IN = 3.6 V, VSW3 = 1.5 V, ISW3 = 100 mA, typical external component

values, fSW3 = 2.0 MHz. Typical values are characterized at VIN = VSW3IN = 3.6 V, VSW3 = 1.5 V, ISW3 = 100 mA, and 25 °C, unless

otherwise noted.

Symbol Parameter Min Typ Max Unit Notes

VSW3OSH

Start-up Overshoot, ISW3 = 0.0 mA, DVS clk = 25 mV/4 s, VIN =

VSW3IN = 4.5 V ––66mV

tONSW3

Turn-on Time, Enable to 90% of end value, ISW3 = 0 mA, DVS clk =

25 mV/4 s, VIN = VSW3IN = 4.5 V – – 500 µs

Table 13. Static Electrical Characteristics - SWBST

All parameters are specified at TA = -40 °C to 105 °C, VIN = VSWBSTIN = 3.6 V, VSWBST = 5.0 V, ISWBST = 100 mA, typical external

component values, fSWBST = 2.0 MHz, otherwise noted. Typical values are characterized at VIN = VSWBSTIN = 3.6 V, VSWBST = 5.0 V,

ISWBST = 100 mA, and 25 °C, unless otherwise noted.

Symbol Parameters Min Typ Max Unit Notes

SWITCH MODE SUPPLY SWBST

VSWBSTIN Input Voltage Range 2.8 – 4.5 V (31), (32)

VSWBST Nominal Output Voltage – Table 59 –V

ISWBST

Continuous Load Current

• 2.8 V  VIN  3.0 V

• 3.0 V  VIN  4.5 V

500

600

–

VSWBSTACC

Output Voltage Accuracy, 2.8 V  VIN  4.5 V, 0 < ISWBST

< ISWBSTMAX

-4.0 – 3.0 %

ISWBSTQ Quiescent Current (Auto Mode) – 222 289 A

Notes

31. The maximum operating input voltage is 4.55 V when VPWR LDO is used.

32. Minimum operating voltage is 2.8 V with a valid LICELL voltage (1.8 V to 3.3 V). Minimum operating voltage is 3.1 V when no voltage is applied at

the LICELL pin. If operation down to 2.8 V is required for systems without a coin cell, connect the LICELL pin to any system voltage between 1.8 V

and 3.3 V. This voltage can be an output from any PF3000 regulator, or external system supply.

Table 11. Static Electrical Characteristics – SW3 (continued)

All parameters are specified at TA = -40 °C to 105 °C, VIN = VSW3IN = 3.6 V, VSW3 = 1.5 V, ISW3 = 100 mA, typical external component

values, fSW3 = 2.0 MHz. Typical values are characterized at VIN = VSW3IN = 3.6 V, VSW3 = 1.5 V, ISW3 = 100 mA, and 25 °C, unless

otherwise noted.

Symbol Parameter Min