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AS1369
200mA Ultra-Compact Low Dropout Regulator
www.austriamicrosystems.com/LDOs/AS1369 Revision 1.7 1 - 21
Datasheet
1 General Description
The AS1369 is an ultra compact high-performance low-dropout
200mA voltage regulator designed for use with very-low ESR output
capacitors. The device can deliver superior performance in all
specifications critical to battery-powered designs, and is perfectly
suited for mobile phones, PDAs, MP3 players, and other battery
powered devices.
The AS1369 is fully operational with small input and output capacitor
of only 0.47µF offering PSRR of 72dB typical and a noise level of
30µVRMS.
Typical quiescent current is around 25µA while in shutdown the
AS1369 requires less than 0.1µA quiescent current.
Regulation performance is excellent even under low dropout
conditions, when the power transistor has to operate in linear mode.
The AS1369 offers excellent low-noise performance requiring no
external bypass capacitance.
Multiple output voltage options between 1.2V and 5.0V in 100mV
steps are available and the minimum input voltage is as low as 2.0V
(depending on the output voltage version), so the component can be
used with the new and emerging battery technologies.
The AS1369 is available in a 4-bump WL-CSP package.
Figure 1. AS1369 - Block Diagram
2 Key Features
Low Dropout Voltage: typ. 40mV @ 100mA
200mA High Maximum Load Current
2.0V to 5.5V Input Voltage
1.2V to 5.0V Output Voltage (in 100mV steps)
High Accura cy: ±2% Over Temperature
Thermal and Over Current Protection
25µA Quiescent Current
<0.1µA Standby Current
High PSRR: 7 2dB @ 1kHz
No Noise Bypass Capacitor Required
Low Noise: 30µVRMS
Enable Pin
Package: 4-bump WL-CSP 0.5mm pitch
3 Applications
The device is ideal for mobile communication, battery powered
systems and any electronic equipme nt.
VREF
On/Off
Control
Thermal &
Over Current
Protection
VOUT
VIN
_
+
GND
C2 1µF
EN
C1 1µF
B1
VOUT
A1
GND
B2
VIN
A2
EN
(WLP; Top Through View)
AS1369
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AS1369
Datasheet - Pin Assignments
4 Pin Assignments
Figure 2. Pin Assignments (Top Vie w)
4.1 Pin Descriptions
Table 1. Pin Descriptions
WLP Name Description
A1 GND Ground
A2 EN
Logic-High Enable Input.
VIH 1.2V: VOUT is enabled.
VIH 0.4V: VOUT is disabled.
Note: This pin is internally pulled down and must not float.
B1 VOUT Regulated Output Voltage
B2 VIN Input Voltage
AS1369
(WLP; Top Through View)
B1
VOUT
A1
GND
B2
VIN
A2
EN
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AS1369
Datasheet - Absolute Maximum Ratings
5 Absolute Maximum Ratings
Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of
the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 4 is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Table 2. Absolute Maximum Ratings1
1. The AS1369 uses an internal protective structure against light influence. However, exposing the WLP package to direct light could
cause device malfunction.
Parameter Min Max Units Comments
Electrical Parameters
Input Supply Voltage -0.3 +7 V
Shutdown Input Voltage -0.3 +7 V
Output Voltage -0.3 +7 V
IOUT Short-circuit protected
Input/Output Voltage2
2. The output PNP structure contains a diode between pins VIN and VOUT that is normally reverse-biased. reversing the polarity of pins
VIN and VOUT will activate this diode.
-0.3 +7 V
Latch-Up -100 +100 mA Norm: JEDEC 78
Electrostatic Discharge
ESD 2 kV Norm: MIL 883 E method 3015
500 V CDM JESD22-C101C methods
Temperature Ranges and Storage Conditions
Thermal Resistance, JA 3
3. Exceeding the maximum allowable dissipation will cause excessive device temperature and the regulator will go into thermal shutdown.
345 ºC/W
The maximum allowable power dissipation is a function of the
maximum junction temperature (TJ(MAX), the junction-to-
ambient thermal resistance (JA), and the ambient
temperature (TAMB). The maximum allowable power
dissipation at any ambient temperature is calculated as:
P(MAX) = (TJ(MAX) - (TAMB))/
JA (EQ 1)
Where:
The value of JA for the WLP package is 345°C/W.
Operating Junction Temperature -40 +125 ºC
Storage Temperature Range -65 +150 ºC
Package Body Temperature +260 ºC The reflow peak soldering temperature (body temperature)
specified is in accordance with IPC/JEDEC J-STD-020
“Moisture/Reflow Sensitivity Classification for Non-Hermetic
Solid State Surface Mount Devices”.
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AS1369
Datasheet - Electrical Characteristics
6 Electrical Characteristics
T
AMB
=
-40°C to +85°C
, V
IN
= V
OUT(NOM)
+ 0.5V, C
OUT
= C
IN
= 0.47µF, I
OUT
= 1mA, V
IH
= 1.2V (unless otherwise specified)
Table 3. Electrical Characteristics
Symbol Parameter Condition Min Typ Max Unit
TAMB Operating Temperature Range -40 +85 ºC
Operational Voltage Range 2.0 5.5 V
Input Undervoltage Lockout 1.8 V
Accuracy
Over full VIN, VOUT, TAMB
=
25°C
including line and load regulation -0.7 +0.7 %
Over full VIN, VOUT and temperature
including line and load regulation -2 +2
VDROP Dropout Voltage 1
1. Dropout voltage is the input-to-output voltage difference at which the output voltage is 100mV below its nominal value (does not apply to
input voltages below 2.0V).
IOUT = 50mA 20 50
mV
IOUT = 100mA 40 100
IOUT = 150mA 60 150
IOUT = 200mA 80 200
VOUT Line Regulation VIN = VOUT(NOM) + 0.5V to 5.5V, VOUT 2.5V 0.02 0.1 %/V
VIN = VOUT(NOM) + 0.5V to 5.5V, VOUT 2.5V 0.02 0.2
Load Regulation IOUT = 5 to 100mA 0.001 0.003 %/mA
IOUT = 5 to 200mA 0.001 0.003
VOUT /
TAMB Output voltage/temperature IOUT = 5mA 50 ppm/°C
Output current Maximum output current 210 mA
IQ Quiescent current ILOAD = 0mA 25 50 µA
ILOAD = 200mA 35 60 µA
ISHDN Standby current In Shutdown 5 500 nA
tON Turn On Time 2
2. T urn on time is time measured between the enable input just exceeding the VEN high value and the output voltage just reaching 95% of
its nominal value.
30 µs
PSRR
IOUT = 10mA, f = 1kHz, VOUT = 1.5V 72 dB
IOUT = 10mA, f = 100kHz, VOUT = 1.5V 55 dB
IOUT = 10mA, f = 1kHz, VOUT = 2.8V 80 dB
IOUT = 10mA, f = 100kHz, VOUT = 2.8V 56 dB
Load transient response 1 to 150mA, Trise = Tfall = 1µs,
COUT = CIN = 1µF, ESR load capacitor = 0 ±65 mV
eN Output Noise Voltage BW = 400Hz to 80kHz, COUT = 1µF,
IOUT = 30mA 30 µVRMS
IEN Enable Input Current VEN = 0.4V, VIN = 5.5V ±1 µA
VEN Enable Input Logic Low VIN = 2.0V to 5.5V, TAMB = -40°C to 85°C 0.4 V
Enable Input Logic High 1.2
IIN(start) Startup Peak Current IOUT = 0mA 340 mA
ISC Short Circuit Current VOUT = 0V 210 350 mA
TOFF Temperature Shutdown Temperature rising 160 ºC
Hysteresis 20
COUT Output Capacitor Load Capacitor Range 0.47 µF
Maximum ESR Load 0.5
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AS1369
Datasheet - Typical Operating Characteristics
7 Typical Operating Characteristics
VIN = VOUT + 0.5V, CIN = COUT = 1µF, TAMB = 25°C (unless otherwise specified).
Figure 5. VOUT vs. VIN; VOUT(NOM)=1.5V Figure 6. VOUT vs. VIN; VOUT(NOM)=2.8V
-30
-20
-10
0
10
0123456
I nput Volt age ( V)
O utput V olt age ( m V) .
Ta mb = -40°C
Ta mb = 25°C
Ta mb = 85°C
-30
-20
-10
0
10
33.544.555.56
Input Voltage (V)
O utput V olt age ( m V) .
TAMB = -40°C
TAMB = 25 °C
TAMB = 85 °C
Figure 7. VOUT vs. (VIN-VOUT); TAMB = -40°C Figure 8. VOUT vs. (VIN-VOUT); TAMB = +25°C
-100
-80
-60
-40
-20
0
20
40
-100 -50 0 50 100 150 200
VIN - VOUT (mV)
O utput V olt age ( m V) .
1mA 50mA
100mA 150 mA
200mA
VOUT(NOM) = 2.8V
-100
-80
-60
-40
-20
0
20
40
-100 -50 0 50 100 150 200
VIN - VOUT (mV)
O utput V olt age ( m V) .
1mA 50mA
10 0 mA 150 mA
200mA
VOUT(NOM) = 2.8V
Figure 9. VOUT vs. (VIN-VOUT); TAMB = +85°C Figure 10. Dropout Voltage vs. IOUT; VOUT=2.8V
-100
-80
-60
-40
-20
0
20
40
-100 -50 0 50 100 150 200
VIN - VOUT (mV)
O utput V olt age ( m V) .
1mA 50mA
10 0 mA 150 mA
200mA
VOUT(NOM) = 2.8V
0
20
40
60
80
100
120
140
0 50 100 150 200
Load Curr ent ( mA)
Dropout Voltage (mV) .
TAMB = 25 °C
TAMB = 85 °C
TAMB = -40°C
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AS1369
Datasheet - Typical Operating Characteristics
Figure 11. VOUT vs. IOUT; VOUT(NOM)=1.5V Figure 12. VOUT vs. IOUT; VOUT(NOM)=2.8V
1.47
1.48
1.49
1.5
1.51
1.52
1.53
0 50 100 150 200
Out put Curr ent ( mA)
O utput V olt age ( V ) .
TAMB = -40°C
TAMB = 25 °C
TAMB = 85 °C
2.74
2.76
2.78
2.8
2.82
2.84
2.86
0 50 100 150 200
O utput Current (mA )
O utput V olt age ( V ) .
T AMB = -40°C
TAMB = 25 °C
TAMB = 85 °C
Figure 13. VOUT vs. IOUT; VOUT(NOM)=1.5V Figure 14. VOUT vs. IOUT; VOUT(NOM)=2.8V
-30
-25
-20
-15
-10
-5
0
5
10
15
20
25
30
0 50 100 150 200
Output Cur r e nt (mA)
VOUT (mV) .
TAMB = -40°C
TAMB = 25°C
TAMB = 85°C
-50
-40
-30
-20
-10
0
10
20
30
40
50
0 50 100 150 200
Output Current (mA )
VOUT (mV) .
TAMB = -40°C
TAMB = 25°C
TAMB = 85°C
Figure 15. VOUT vs. Temperature; VOUT(NOM)=1.5V Figure 16. VOUT vs. Temperature; VOUT(NOM)=2.8V
-30
-25
-20
-15
-10
-5
0
5
10
-45 -30 -15 0 15 30 45 60 75 90
Ambient Temperature ( ° C)
VOUT (mV) .
1mA 50mA
100mA 150 mA
200mA
-50
-40
-30
-20
-10
0
10
-45 -30 -15 0 15 30 45 60 75 90
Ambient Temperature ( ° C)
VOUT (mV) .
1mA 50mA
100mA 150 mA
200mA
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AS1369
Datasheet - Typical Operating Characteristics
Figure 17. Dropout Voltage vs. Temperature; VOUT=2.8V Figure 18. IOUT(MAX) vs. Temperature
0
20
40
60
80
100
120
140
160
180
200
-45 -30 -15 0 15 30 45 60 75 90
Ambient Temper ature ( °C)
Dropout Voltage (mV) .
1mA 50mA
100mA 150 mA
200mA
200
250
300
350
400
-45 -30 -15 0 15 30 45 60 75 90
Ambient Temperature (°C)
Maximum Output Current (mA) .
Vout = 1.5V
Vout = 2.8V
Figure 19. Quiescent Current vs. VIN Figure 20. Standby Current vs. VIN
0
10
20
30
40
50
60
70
80
90
100
0123456
I nput Volt age ( V)
Quiescent Current (µA) .
Vout = 1.5V
Vout = 2.8V
0
1
2
3
4
5
6
7
8
9
10
0123456
Input Voltage (V)
Standby Cur r ent ( nA ) .
Vout = 1.5V
Vout = 2.8V
Figure 21. Ground Current vs. IOUT Figure 22. Quiescent Current vs. Temperature
0
10
20
30
40
50
60
70
80
90
100
0 40 80 120 160 200
Out put Curr ent ( mA)
Ground Cur r ent (µA) .
Vout = 1.5V
Vout = 2.8V
0
10
20
30
40
50
60
70
80
90
100
-45 -30 -15 0 15 30 45 60 75 90
Ambient Temperature ( ° C)
Quiescent Current (µA) .
Vout = 1.5V
Vout = 2.8V
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AS1369
Datasheet - Typical Operating Characteristics
Figure 23. Ground Current vs. Temperature; VOUT=1.5V Figure 24. Ground Current vs. Temperature; VOUT=2.8V
0
10
20
30
40
50
60
-45 -30 -15 0 15 30 45 60 75 90
Ambient Temperature ( ° C)
Ground Cur r ent (µA) .
0mA 50mA
10 0 mA 200mA
0
10
20
30
40
50
60
-45 -30 -15 0 15 30 45 60 75 90
Ambient Temper at ur e ( °C)
Ground Cur r ent (µA) .
0mA 50mA
100mA 200mA
Figure 25. IEN vs. VOUT; VOUT=1.5V Figure 26. IEN vs. VOUT; VOUT=2.8V
0
0.5
1
1.5
2
2.5
0 0.5 1 1.5 2
Input Volt age ( V)
Ien (µA) .
0
1
2
3
4
5
Vout (V)
Ien
Vout
0
0.5
1
1.5
2
2.5
00.511.52
I nput Volt age (V)
Ien (µA) .
0
1
2
3
4
5
Vout (V)
Ien
Vout
Figure 27. VEN vs. Temperature Figure 28. IEN vs. Temperature
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-45 -30 -15 0 15 30 45 60 75 90
Ambient Temperature ( ° C)
Ven (V) .
Vout = 1.5V
Vout = 2.8V
0
0.2
0.4
0.6
0.8
1
1.2
1.4
-45 -30 -15 0 15 30 45 60 75 90
Ambient Temperature ( ° C)
Ien (µA) .
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AS1369
Datasheet - Typical Operating Characteristics
Figure 29. PSRR vs. VIN-VOUT(NOM), VOUT=1.5V Figure 30. PSRR vs. VIN-VOUT(NOM), VOUT=2.8V
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
00.511.522.533.54
Vin - Vout( nom) ( V)
P SRR ( dB ) .
10 mA 50mA
10 0 mA 150 mA
200mA
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7
Vin - Vout( nom) ( V)
P SRR ( dB ) .
10 mA 50mA
100mA 150 mA
200mA
Figure 31. PSRR vs. Frequency, IOUT=10mA Figure 32. Spectral Noise vs. Frequency, IOUT=10mA
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
0.01 0.1 1 10 100 1000
F r equenc y (k Hz)
P SRR ( dB ) .
Vout = 2.8V
Vout = 1.5V
0.01
0.1
1
10
10 100 1000 10000 100000
F r equenc y (Hz)
O utput Nois e Dens ity ( µ V / Hz ) .
VOUT = 2.8V
VOUT = 1.5V
Figure 33. Voltage Noise vs. VOUT, IOUT=30mA
0
10
20
30
40
50
60
70
80
90
100
1.5 2 2.5 3 3.5 4 4.5
VOUT (V)
eN (µVrms) .
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AS1369
Datasheet - Typical Operating Characteristics
Figure 34. Line Transient Response; IOUT=50mA, V OUT=1.5V,
VIN=3.5V to 2.9V Figure 35. Line Transient Response; IOUT=50mA, VOUT=2.8V,
VIN=4.8V to 4.2V
20mV/DIV 200mV/Div
VIN
VOUT
100µs/Div
20mV/DIV 200mV/Div
VIN
VOUT
100µs/Div
Figure 36. Line Transient Response; IOUT=100mA, VOUT=1.5V,
VIN = 3.5V to 2.9V Figure 37. Line Transient Respo nse ; IOUT=100mA, VOUT=2.8V,
VIN=4.8V to 4.2V
20mV/DIV 200mV/Div
VIN
VOUT
100µs/Div
20mV/DIV 200mV/Div
VIN
VOUT
100µs/Div
Figure 38. Line Tra nsi ent Re spo nse; IOUT=200mA, VOUT=1.5V,
VIN=3.5V to 2.9V Figure 39. Line Transient Response; IOUT=200mA, VOUT=2.8V,
VIN=4.8V to 4.2V
20mV/DIV 200mV/Div
VIN
VOUT
100µs/Div
20mV/DIV 200mV/Div
VIN
VOUT
100µs/Div
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AS1369
Datasheet - Typical Operating Characteristics
Figure 40. Load Transient; IOUT= 0mA to 150mA
VIN=2.0V, VOUT=1.5V Figure 41. Load Transient; IOUT= 0mA to 150mA
VIN=3.3V, VOUT=2.8V
100mV/DIV 100mA/Div
IOUT
VOUT
100µs/Div
100mV/DIV 100mA/Div
IOUT
VOUT
100µs/Div
Figure 42. Load Transient; IOUT= 0mA to 150mA
VIN=3.0V, VOUT=2.8V, in Dropout Figure 43. Load Transient; IOUT= 1mA to 150mA
VIN=3.0V, VOUT=2.8V, in Dropout
100mV/DIV 100mA/Div
IOUT
VOUT
100µs/Div
100µs/Div
100mV/DIV 100mA/Div
IOUT
VOUT
Figure 44. Startup Figure 45. Shutdown
50mA/DIV 1V/Div
VEN
VOUT
10µs/Div
IIN
250µs/Div
50mA/DIV 1V/Div
VEN
VOUT
IIN
1V/Div
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AS1369
Datasheet - Application Information
8 Application Information
Figure 46. Typical Application Diagram
Figure 46 shows the block diagram of the AS1369. It identifies the basics of a series linear regulator employing a P-Channel MOSFET as the
control element. A stable voltage reference (REF in Figure 46) is compared with an attenuated sample of the output voltage. Any difference
between the two voltages (reference and sample) creates an output from the error amplifier that drives the series control element to reduce the
difference to a minimum. The error amplifier incorporates additional buffering to drive the relatively large gate capacitance of the series pass P-
channel MOSFET, when additional drive current is required under transient conditions. Input supply variations are absorbed by the series
element, and output voltage variations with loading are absorbed by the low output impedance of the regulator.
8.1 Dropout Voltage
Dropout is the input to output voltage difference, below which the linear regulator ceases to regulate. At this point, the output voltage change
follows the input voltage change. Dropout voltage may be measured at different load currents, but is usually specified at maximum output. As a
result, the MOSFET maximum series resistance over temperature is obtained. More generally:
VDROPOUT = ILOAD x RSERIES (EQ 2)
Dropout is probably the most important specification when the regulator is used in a battery application. The dropout performance of the
regulator defines the useful “end of life” of the battery before replacement or re-charge is required.
VREF
On/Off
Control
Thermal &
Over Current
Protection
VOUT
VIN
_
+
GND
C2
EN
C1
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AS1369
Datasheet - Application Information
Figure 47. Graphical Representation of Dropout Voltage
Figure 47 shows the variation of VOUT as VIN is varied for a certain load current. The practical value of dropout is the differential voltage (VOUT
- VIN) measured at the point where the LDO output voltage has fallen by 100mV below the nominal, fully regulated output value. The nominal
regulated output voltage of the LDO is that obtained when there is 500mV (or greater) input-output voltage differential.
8.2 Efficiency
Low quiescent current and low input-output voltage differential are important in battery applications amongst others, as the regulator efficiency is
directly related to quiescent current and dropout voltage. Efficiency is given by:
Efficiency = % (EQ 3)
Where:
IQ = Quiescent current of LDO
8.3 Power Dissipation
Maximum power dissipation (PD) of the LDO is the sum of the power dissipated by the internal series MOSFET and the quiescent current
required to bias the internal voltage reference and the internal error amplifier, and is calculated as:
Watts (EQ 4)
Internal power dissipation as a result of the bias current for the internal voltage reference and the error amplifier is calculated as:
Watts (EQ 5)
Total LDO power dissipation is calculated as:
Watts (EQ 6)
Dropout
Voltage
100mV
VIN
VOUT
VOUT VIN
VOUT VIN=VOUT(TYP)+0.5V
VIN
VLOAD ILOAD
VIN IQILOAD
+
----------------------------------------- 100
PD MAX
SeriespassILOAD MAX
=VIN MAX
VOUT MIN
–
PD MAX
BiasVIN MAX
IQ
=
PD MAX
TotalPD MAX
SeriespassPD MAX
+Bias=
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AS1369
Datasheet - Application Information
8.4 Junction Temperature
Under all operating conditions, the maximum junction temperature should not be allowed to exceed 125°C (unless otherwise specified in the
datasheet). Limiting the maximum junction temperature requires knowledge of the heat path from junction to case (JC°C/W fixed by the IC
manufacturer), and adjustment of the case to ambient heat path (CA°C/W) by manipulation of the PCB copper area adjacent to the IC position.
Figure 48. Package Physical Arrangements
Figure 49. Steady State Heat Flow Equivalent Circuit
Total Thermal Path Resistance: R
JA = R
JC + R
CS + R
SA (EQ 7)
Junction Temperature (TJ ºC) is determined by: TJ = (PD(MAX) x R
JA) + TAMB ºC (EQ 8)
Chip
PCB
Package Transfer Layer
CS-WLP Package
Solder Balls
Junction
TJ°C Package
TC°C PCB/Heatsink
TS°C Ambient
TA°C
Chip
Power
RJC RCS RSA
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AS1369
Datasheet
8.5 Explanation of Steady State Specifications
8.5.1 Line Regulation
Line regulation is defined as the change in output voltage when the input (or line) voltage is changed by a known quantity. It is a measure of the
regulator’s ability to maintain a constant output voltage when the input voltage changes. Line regulation is a measure of the DC open loop gain
of the error amplifier. More generally:
Line Regulation = and is a pure number (EQ 9)
In practise, line regulation is referred to the regulator output voltage in terms of % / VOUT. This is particularly useful when the same regulator is
available with numerous output voltage trim options.
Line Regulation = % / V (EQ 10)
8.5.2 Load Regulation
Load regulation is defined as the change of the output voltage when the load current is changed by a known quantity. It is a measure of the
regulator’s ability to maintain a constant output voltage when the load changes. Load regulation is a measure of the DC closed loop output
resistance of the regulator. More generally:
Load Regulation = and is units of ohms ()(EQ 11)
In practise, load regulation is referred to the regulator output voltage in terms of % / mA. This is particularly useful when the same regulator is
available with numerous output voltage trim options.
Load Regulation = % / mA (EQ 12)
8.5.3 Setting Accuracy
Accuracy of the final output voltage is determined by the accuracy of the ratio of R1 and R2, the reference accuracy and the input offset voltage
of the error amplifier. When the regulator is supplied pre-trimmed, the output voltage accuracy is fully defined in the output voltage specification.
When the regulator has a SET terminal, the output voltage may be adjusted externally. In this case, the tolerance of the external resistor network
must be incorporated into the final accuracy calculation. Generally:
(EQ 13)
The reference tolerance is given both at 25°C and over the full operating temperature range.
8.5.4 Total Accuracy
Away from dropout, total steady state accuracy is the sum of setting accuracy, load regulation and line regulation. Generally:
Total % Accuracy = Setting % Accuracy + Load Regulation % + Line Regulation % (EQ 14)
8.6 Explanation of Dynamic Specifications
8.6.1 Power Supply Rejection Ratio (PSRR)
Known also as Ripple Rejection, this specification measures the ability of the regulator to reject noise and ripple beyond DC. PSRR is a
summation of the individual rejections of the error amplifier, reference and AC leakage through the series pass transistor. The specification, in
the form of a typical attenuation plot with respect to frequency, shows up the gain bandwidth compromises forced upon the designer in low
quiescent current conditions. Generally:
PSRR = dB using lower case to indicate AC values (EQ 15)
Power supply rejection ratio is fixed by the internal design of the regulator. Additional rejection must be provided externally.
VOUT
VIN
-----------------
VOUT
VIN
----------------- 100
VOUT
-------------
VOUT
IOUT
-----------------
VOUT
IOUT
----------------- 100
VOUT
-------------
VOUT VSET VSET
1R1R1
R2R2
---------------------
+
=
20LogVOUT
VIN
-----------------
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AS1369
Datasheet - Application Information
8.6.2 Output Capacitor ESR
The series regulator is a negative feedback amplifier, and as such is conditionally stable. The ESR of the output capacitor is usually used to
cancel one of the open loop poles of the error amplifier in order to produce a single pole response. Excessive ESR values may actually cause
instability by excessive changes to the closed loop unity gain frequency crossover point. The range of ESR values for stability is usually shown
either by a plot of stable ESR versus load current, or a maximum value in the datasheet.
Some ceramic capacitors exhibit large capacitance and ESR variations with variations in temperature. Z5U and Y5V capacitors may be required
to ensure stability at temperatures below TAMB = -10°C. With X7R or X5R capacitors, a 1µF capacitor should be sufficient at all operating
temperatures.
Larger output capacitor values (10µF) help to reduce noise and improve load transient-response, stability and power-supply rejection.
8.6.3 Input Capacitor
An input capacitor at VIN is required for stability. It is recommended that a 1.0µF capacitor be connected between the AS1369 power supply
input pin VIN and ground (capacitance value may be increased without limit subject to ESR limits). This capacitor must be located at a distance
of not more than 1cm from the VIN pin and returned to a clean analog ground. Any good quality ceramic, tantalum, or film capacitor may be used
at the input.
8.6.4 Noise
The regulator output is a DC voltage with noise superimposed on the output. The noise comes from three sources; the reference, the error
amplifier input stage, and the output voltage setting resistors. Noise is a random fluctuation and if not minimized in some applications, will
produce system problems.
8.6.5 Transient Response
The series regulator is a negative feedback system, and therefore any change at the output will take a finite time to be corrected by the error
loop. This “propagation time” is related to the bandwidth of the error loop. The initial response to an output transient comes from the output
capacitance, and during this time, ESR is the dominant mechanism causing voltage transients at the output. More generally:
Units are Volts, Amps, Ohms. (EQ 16)
Thus an initial +50mA change of output current will produce a -12mV transient when the ESR=240m. Remember to keep the ESR within
stability recommendations when reducing ESR by adding multiple parallel output capacitors.
After the initial ESR transient, there follows a voltage droop during the time that the LDO feedback loop takes to respond to the output change.
This drift is approx. linear in time and sums with the ESR contribution to make a total transient variation at the output of:
Units are Volts, Seconds, Farads, Ohms. (EQ 17)
Where:
CLOAD is output capacitor
T= Propagation Delay of the LDO
This shows why it is convenient to increase the output capacitor value for a better support for fast load changes. Of course the formula holds for
t < “propagation time”, so that a faster LDO needs a smaller cap at the load to achieve a similar transient response. For instance 50mA load
current step produces 50mV output drop if the LDO response is 1usec and the load cap is 1µF.
There is also a steady state error caused by the finite output impedance of the regulator. This is derived from the load regulation specifi cat ion
discussed above.
8.6.6 Turn On Time
This specification defines the time taken for the LDO to awake from shutdown. The time is measured from the release of the enable pin to the
time that the output voltage is within 5% of the final value. It assumes that the voltage at VIN is stable and within the regulator min and max limits.
Shutdown reduces the quiescent curren t to very low, mostly leakage values (<1µA).
8.6.7 Thermal Protection
To prevent operation under extreme fault conditions, such as a permanent short circuit at the output, thermal protection is built into the device.
Die temperature is measured, and when a 150°C threshold is reached, the device enters shutdown. When the die cools sufficiently, the device
will restart (assuming input voltage exists and the device is enabled). Hysteresis of 20°C prevents low frequency oscillation between start-up and
shutdown around the temperature thresho ld.
VTRANSIENT IOUTPUT RESR
=
VTRANSIENT IOUTPUT RESR T
CLOAD
-----------------
+
=
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AS1369
Datasheet - Package Drawings and Markings
9 Package Drawings and Markings
The AS1369 is available in a 4-bump WL-CSP package.
Figure 50. 4-bump WL-CSP Package
Notes:
1. ccc – Coplanarity
2. All dimensions are in µm.
Top through view Bottom view (ball side)
Die size after cutting 1015x1015 ±20µm
ASRW
XXXX
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AS1369
Datasheet - Package Drawings and Markings
Revision History
Note: Typos may not be explicitly mentioned under revision history.
Revision Date Owner Description
1.4 Initial revision
1.5 Package marking updated
1.6 21 Sep, 2011 afe Changes made across the document
1.7 12 Dec, 2011 Updated equations in Power Dissipation section
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AS1369
Datasheet - Ordering Information
10 Ordering Information
The AS1369 is available as the standard versions listed in Table 4. Other versions are available upon request. Contact austriamicrosystems, AG
for more information.
Note: All products are RoHS compliant and austriamicrosystems green.
Buy our products or get free samples online at ICdirect: http://www.austriamicrosystems.com/ICdirect
Technical Support is available at http://www.austriamicrosystems.com/Technical-Support
For further information and requests, please contact us mailto:sales@austriamicrosystems.com
or find your local distributor at http://www.austriamicrosystems.com/distributor
Table 4. Ordering Information
Ordering Code Marking Output Description Delivery Form Package
AS1369-BWLT-12 ASRW 1.2V 200mA Ultra-Compact Low
Dropout Regulator Tape and Reel 4-bump WL-CSP
AS1369-BWLT-13 ASRX 1.3V 200mA Ultra-Compact Low
Dropout Regulator Tape and Reel 4-bump WL-CSP
AS1369-BWLT-15 ASPZ 1.5V 200mA Ultra-Compact Low
Dropout Regulator Tape and Reel 4-bump WL-CSP
AS1369-BWLT-18 ASP0 1.8V 200mA Ultra-Compact Low
Dropout Regulator Tape and Reel 4-bump WL-CSP
AS1369-BWLT-25 ASP1 2.5V 200mA Ultra-Compact Low
Dropout Regulator Tape and Reel 4-bump WL-CSP
AS1369-BWLT-28 ASP2 2.8V 200mA Ultra-Compact Low
Dropout Regulator Tape and Reel 4-bump WL-CSP
AS1369-BWLT-30 ASP3 3.0V 200mA Ultra-Compact Low
Dropout Regulator Tape and Reel 4-bump WL-CSP
AS1369-BWLT-33 ASP4 3.3V 200mA Ultra-Compact Low
Dropout Regulator Tape and Reel 4-bump WL-CSP
AS1369-BWLT-451
1. Available upon request. Contact austriamicrosystems AG for details.
ASP5 4.5V 200mA Ultra-Compact Low
Dropout Regulator Tape and Reel 4-bump WL-CSP
AS1369-BWLT-501ASP6 5.0V 200mA Ultra-Compact Low
Dropout Regulator Tape and Reel 4-bump WL-CSP
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AS1369
Datasheet - Ordering Information
Copyrights
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All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of
the copyright owner.
All products and companies mentioned are trademarks or registered trademarks of their respective companies.
Disclaimer
Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale.
austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding
the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at
any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for
current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range,
unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are
specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100
parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location.
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