11158AS–ATARM–06-Jun-13
SAM4N8/16 Description
The Atmel SAM4N series is a member of a family of Flash microcontrollers based on
the high performance 32-bit ARM® Cortex®-M4 RISC processor. It operates at a
maximum speed of 100 MHz and features up to 1024 Kbytes of Flash and up to 80
Kbytes of SRAM. The peripheral set includes 3x USARTs, 4x UARTs, 3x TWIs, 1x SPI,
as well as 1 PWM timer, 2x three-channel general-purpose 16-bit timers (with stepper
motor and quadrature decoder logic support), an RTC, a 10-bit ADC (up to 12-bit with
digital averaging) and a 10-bit DAC with an internal voltage reference.
The SAM4N device is a medium range general purpose microcontroller with the best
ratio in terms of reduced power consumption, processing power and peripheral set.
This enables the SAM4N to sustain a wide range of applications including industrial
automation and M2M (machine-to-machine), energy metering, consumer and
appliance, building and home control.
It operates from 1.62V to 3.6V and is available in 48-, 64- and 100-pin QFP, 48-, 64-pin
QFN, and 100-ball BGA packages.
The SAM4N series offers pin-to-pin compatibility with Atmel SAM4S, SAM3S, SAM3N
and SAM7S devices, facilitating easy migration within the portfolio.
The SAM4N series is the ideal migration path from the SAM4S for applications that
require a reduced BOM cost.
1. Features
zCore
zARM® Cortex®-M4 running at up to 100 MHz
zMemory Protection Unit (MPU)
zThumb®-2 instruction Set
zPin-to-pin compatible with SAM3N, SAM3S products (48-, 64- and 100-pin
versions), SAM4S (64- and 100-pin versions) and SAM7S legacy products (64-
pin version)
zMemories
zUp to 1024 Kbytes embedded Flash
zUp to 80 Kbytes embedded SRAM
z8 Kbytes ROM with embedded boot loader routines (UART) and IAP
routines, single-cycle access at maximum speed
zSystem
zEmbedded voltage regulator for single supply operation
zPower-on-Reset (POR), Brown-out Detector (BOD) and Watchdog for
safe operation
ARM-based Flash MCU
SAM4N Series
SUMMARY DATASHEET
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SAM4N Series [SUMMARY DATASHEET]
11158AS–ATARM–06-Jun-13
zQuartz or ceramic resonator oscillators: 3 to 20 MHz main power with Failure Detection and optional low
power 32.768 kHz for RTC or device clock
zHigh precision 8/12 MHz factory trimmed internal RC oscillator with 4 MHz default frequency for device
start-up. In-application trimming access for frequency adjustment
zSlow Clock Internal RC oscillator as permanent low-power mode device clock
zPLL up to 240 MHz for device clock
zTemperature Sensor
zUp to 23 peripheral DMA (PDC) channels
zLow Power Modes
zSleep and Backup modes, down to 0.7 μA in Backup mode
zLow-power RTC
zPeripherals
zUp to 3 USARTs with ISO7816 , IrDA®(only USART0), RS-485, and SPI Mode
zUp to 4 2-wire UARTs
zUp to 3 Two Wire Interfaces (TWI)
z1 SPI
z2 Three-channel 16-bit Timer/Counter with capture, waveform, compare and PWM mode. Quadrature
Decoder Logic and 2-bit Gray Up/Down for Stepper Motor
z1 Four-channel 16-bit PWM
z32-bit Real-time Timer and RTC with calendar and alarm features
zI/Os
zUp to 79 I/O lines with external interrupt capability (edge or level sensitivity), debouncing, glitch filtering and
on-die Series Resistor Termination. Individually Programmable Open-drain, Pull-up and Pull-down resistor
and Synchronous Output
zThree 32-bit Parallel Input/Output Controllers
zAnalog
zOne 10-bit ADC up to 510 ksamples/sec, with Digital Averaging Function providing Enhanced Resolution
Mode up to 12-bit, Up to 16-channels
zOne 10-bit DAC up to 1 MSamples/sec
zInternal voltage reference, 3V typ
zPackages
z100-lead LQFP, 14 x 14 mm, pitch 0.5 mm/100-ball TFBGA, 9 x 9 mm, pitch 0.8 mm/100-ball VFBGA 7 x 7
mm, pitch 0.65 mm
z64-lead LQFP, 10 x 10 mm, pitch 0.5 mm/64-pad QFN 9 x 9 mm, pitch 0.5 mm
z48-lead LQFP, 7 x7 mm, pitch 0.5 mm/48-pad QFN 7 x 7 mm, pitch 0.5 mm
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SAM4N Series [SUMMARY DATASHEET]
11158AS–ATARM–06-Jun-13
1.1 Configuration Summary
The SAM4N series devices differ in memory size, package and features. Table 1-1 summarizes the configurations of the
device family.
Notes: 1. Included Temperature Sensor.
2. Only 3 channels output.
3. USARTs with SPI mode are taken into account.
4. Timer Counter in PWM mode is taken into account.
Table 1-1. Configuration Summary
Feature SAM4N16C SAM4N16B SAM4N8C SAM4N8B SAM4N8A
Flash 1024 Kbytes 1024 Kbytes 512 Kbytes 512 Kbytes 512 Kbytes
SRAM 80 Kbytes 80 Kbytes 64 Kbytes 64 Kbytes 64 Kbytes
Package LQFP100
TFBGA100
VFBGA100
LQFP64
QFN64
LQFP100
TFBGA100
VFBGA100
LQFP64
QFN64 LQFP48
QFN48
Number of PIOs 79 47 79 47 34
10-bit ADC 17 ch (1) 11 ch (1) 17 ch (1) 11 ch (1) 9 ch (1)
10-bit DAC 1 ch 1 ch 1 ch 1 ch -
16-bit Timer 6 6(2) 66
(2) 6(2)
PDC Channels 23 23 23 23 23
USART/ UART 3/4 2/4 3/4 2/4 1/4
SPI 4(3) 3(3) 4(3) 3(3) 2(3)
TWI 33333
PWM 7(4) 4(4) 7(4) 4(4) 4(4)
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SAM4N Series [SUMMARY DATASHEET]
11158AS–ATARM–06-Jun-13
2. SAM4N8/16 Block Diagram
Figure 2-1. SAM4N8/16 100-pin Version Block Diagram
TST
PCK0-PCK2
System Controller
XIN
NRST
PMC
XOUT
XIN32
XOUT32
RC
12/8/4
MHz
ERASE
TDI
TDO
TMS/SWDIO
TCK/SWCLK
JTAGSEL
I/D S
Voltage
Regulator
VDDIN
VDDOUT
SPI
T imer Counter A
TC[0..2]
ADVREF
NPCS0
NPCS1
NPCS2
NPCS3
MISO
MOSI
SPCK
TIOA[0:2]
TIOB[0:2]
ADTRG
TCLK[0:2]
PDC
PDC
PDC
PDC
PWM TWI0
PDC TWCK0
TWD0
PDC
PDC
TWI1 TWCK1
TWD1
TWI2 TWCK2
TWD2
JTAG & Single Wire
PWM[0:3]
UART0
UART3
URXD0
UTXD0
URXD3
UTXD3
UART2
URXD2
UTXD2
UART1
URXD1
UTXD1
PDC
PDC
SM
DATRG
PLL
PDC
PDC
RXD0
TXD0
SCK0
RXD2
TXD2
SCK2
RTS2
CTS2
USART0
RXD1
TXD1
ROM
8 Kbytes
SRAM
80 Kbytes
64 Kbytes
FLASH
1024 Kbytes
512 Kbytes
Peripheral
Bridge
MPU
N
V
I
C
24-Bit
SisTick Counter
In-Circuit Emulator
Cortex-M4 Processor
Fmax 100 MHz
Flash
Unique
Identifier
VDDCORE
VDDPLL
VDDIO
PIOA / PIOB / PIOC
3-20 MHz
Osc.
SUPC
RC 32K
RTT
8 GPBREG
POR
RTC
DAC0
T imer Counter B TIOA[3:5]
TIOB[3:5]
TCLK[3:5]
AD[0..15]
3-layer AHB Bus Matrix Fmax 100 MHz
PDC
10-bit ADC
10-Bit DAC PDC
Temperature Sensor
OSC 32K
RSTC
WDT
USART1
USART2
TC[3..5]
SCK1
RTS1
CTS1
RTS0
CTS0
Real Time
Events
WKUP[15:0]
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SAM4N Series [SUMMARY DATASHEET]
11158AS–ATARM–06-Jun-13
Figure 2-2. SAM4N8/16 64-pin Version Block Diagram
SPI
T imer Counter A
TC[0..2]
NPCS0
NPCS1
NPCS2
NPCS3
MISO
MOSI
SPCK
TIOA[0:2]
TIOB[0:2]
TCLK[0:2]
TWI0
PDC TWCK0
TWD0
TWI1 TWCK1
TWD1
Peripheral
Bridge
PDC
PDC
TST
PCK0-PCK2
System Controller
XIN
NRST
PMC
XOUT
XIN32
XOUT32
RC
12/8/4
MHz
ERASE
TDI
TDO
TMS/SWDIO
TCK/SWCLK
JTAGSEL
I/D S
Voltage
Regulator
VDDIN
VDDOUT
JTAG & Single Wire
SM
PLL
ROM
8 Kbytes
SRAM
80 Kbytes
64 Kbytes
FLASH
1024 Kbytes
512 Kbytes
WDT
MPU
N
V
I
C
24-bit
SysTick Counter
In-Circuit Emulator
Cortex-M4 Processor
Fmax 100 MHz
Flash
Unique
Identifier
VDDCORE
VDDPLL
VDDIO
PIOA / PIOB / PIOC
3-20 MHz
Osc.
OSC 32K
SUPC
RC 32K
RTT
RSTC
8 GPBREG
POR
RTC
3-layer AHB Bus Matrix Fmax 100 MHz
T imer Counter B
TC[3..5]
ADVREF
PDC
ADTRG
PDC
PDC
PDC
PWM
PWM[0:3]
UART0
UART3
URXD0
UTXD0
URXD3
UTXD3
UART2
URXD2
UTXD2
UART1
URXD1
UTXD1
10-Bit ADC
10-Bit DAC
DATRG
PDC
PDC
RXD0
TXD0
SCK0
RTS0
CTS0
USART0
RXD1
TXD1
SCK1
RTS1
CTS1 USART1
PDC
DAC0
Temperature Sensor
AD[0..9]
PDC
PDC
TWI2 TWCK2
TWD2
WKUP[15:0]
Real Time
Events
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SAM4N Series [SUMMARY DATASHEET]
11158AS–ATARM–06-Jun-13
Figure 2-3. SAM4N8 48-pin Version Block Diagram
SPI
T imer Counter A
TC[0..2]
ADVREF
NPCS0
NPCS1
NPCS2
NPCS3
MISO
MOSI
SPCK
TIOA[0:2]
TIOB[0:2]
ADTRG
TCLK[0:2]
PWM
Peripheral
Bridge
PDC
PDC
RXD0
TXD0
SCK0
RTS0
CTS0
PWM[0:3]
TST
PCK0-PCK2
System Controller
XIN
NRST
PMC
XOUT
XIN32
XOUT32
RC
12/8/4
MHz
ERASE
TDI
TDO
TMS/SWDIO
TCK/SWCLK
JTAGSEL
I/D S
Voltage
Regulator
VDDIN
VDDOUT
JTAG & Single Wire
SM
PLL
ROM
8 Kbytes
SRAM
64 Kbytes
FLASH
512 Kbytes
WDT
MPU
N
V
I
C
24-Bit
SysTick Counter
In-Circuit Emulator
Cortex-M4 Processor
Fmax 100 MHz
Flash
Unique
Identifier
VDDCORE
VDDPLL
VDDIO
PIOA / PIOB / PIOC
3-20 MHz
Osc.
OSC 32K
SUPC
RC 32K
RTT
RSTC
8 GPBREG
POR
RTC
3-layer AHB Bus Matrix Fmax 100 MHz
TWI0
PDC TWCK0
TWD0
TWI1 TWCK1
TWD1
PDC
PDC
TWI2 TWCK2
TWD2
PDC
10-Bit ADC
Temperature Sensor
T imer Counter B
TC[3..5]
AD[0..7]
PDC
USART0
PDC
PDC
PDC
UART0
UART3
URXD0
UTXD0
URXD3
UTXD3
UART2
URXD2
UTXD2
UART1
URXD1
UTXD1
WKUP[15:0]
Real Time
Events
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SAM4N Series [SUMMARY DATASHEET]
11158AS–ATARM–06-Jun-13
3. Signals Description
Table 3-1 gives details on the signal name classified by peripheral.
Table 3-1. Signal Description List
Signal Name Function Type Active
Level Voltage
Reference Comments
Power Supplies
VDDIO Peripherals I/O Lines Power Supply Power 1.62V to 3.6V
VDDIN Voltage Regulator, ADC and DAC Power
Supply Power 1.6V to 3.6V
VDDOUT Voltage Regulator Output Power 1.2V Output
VDDPLL Oscillator Power Supply Power 1.08V to 1.32V
VDDCORE Core Chip Power Supply Power 1.08V to 1.32V
Connected externally
to VDDOUT
GND Ground Ground
Clocks, Oscillators and PLLs
XIN Main Oscillator Input Input VDDIO
XOUT Main Oscillator Output Output
XIN32 Slow Clock Oscillator Input Input VDDIO
XOUT32 Slow Clock Oscillator Output Output
PCK0 - PCK2 Programmable Clock Output Output
ICE and JTAG
TCK Test Clock Input VDDIO No pull-up resistor
TDI Test Data In Input VDDIO No pull-up resistor
TDO Test Data Out Output VDDIO
TRACESWO Trace Asynchronous Data Out Output VDDIO
SWDIO Serial Wire Input/Output I/O VDDIO
SWCLK Serial Wire Clock Input VDDIO
TMS Test Mode Select Input VDDIO No pull-up resistor
JTAGSEL JTAG Selection Input High VDDIO Pull-down resistor
Flash Memory
ERASE Flash and NVM Configuration Bits Erase
Command Input High VDDIO Pull-down (15 kΩ)
resistor
Reset/Test
NRST Microcontroller Reset I/O Low VDDIO Pull-Up resistor
TST Test Mode Select Input VDDIO Pull-down resistor
Universal Asynchronous Receiver Transmitter - UARTx
URXDx UART Receive Data Input
UTXDx UART Transmit Data Output
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SAM4N Series [SUMMARY DATASHEET]
11158AS–ATARM–06-Jun-13
PIO Controller - PIOA - PIOB - PIOC
PA0 - PA31 Parallel IO Controller A I/O VDDIO Pulled-up input at
reset
PB0 - PB14 Parallel IO Controller B I/O VDDIO Pulled-up input at
reset
PC0 - PC31 Parallel IO Controller C I/O VDDIO Pulled-up input at
reset
Universal Synchronous Asynchronous Receiver Transmitter USARTx
SCKx USARTx Serial Clock I/O
TXDx USARTx Transmit Data I/O
RXDx USARTx Receive Data Input
RTSx USARTx Request To Send Output
CTSx USARTx Clear To Send Input
Timer/Counter - TCx
TCLKx TC Channel x External Clock Input Input
TIOAx TC Channel x I/O Line A I/O
TIOBx TC Channel x I/O Line B I/O
Pulse Width Modulation Controller- PWMC
PWM PWM Waveform Output for channel Output
Serial Peripheral Interface - SPI
MISO Master In Slave Out I/O
MOSI Master Out Slave In I/O
SPCK SPI Serial Clock I/O
NPCS0 SPI Peripheral Chip Select 0 I/O Low
NPCS1 - NPCS3 SPI Peripheral Chip Select Output Low
Two-Wire Interface- TWIx
TWDx TWIx Two-wire Serial Data I/O
TWCKx TWIx Two-wire Serial Clock I/O
Analog
ADVREF ADC and DAC Reference Analog
10-bit Analog-to-Digital Converter - ADCC
AD0 - AD15 Analog Inputs Analog
ADTRG ADC Trigger Input
Digital-to-Analog Converter - DAC
DAC0 DAC Channel Analog Output Analog
DACTRG DAC Trigger Input
Table 3-1. Signal Description List
Signal Name Function Type Active
Level Voltage
Reference Comments
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SAM4N Series [SUMMARY DATASHEET]
11158AS–ATARM–06-Jun-13
Fast Flash Programming Interface
PGMEN0-PGMEN2 Programming Enabling Input VDDIO
PGMM0-PGMM3 Programming Mode Input VDDIO
PGMD0-PGMD15 Programming Data I/O VDDIO
PGMRDY Programming Ready Output High VDDIO
PGMNVALID Data Direction Output Low VDDIO
PGMNOE Programming Read Input Low VDDIO
PGMCK Programming Clock Input VDDIO
PGMNCMD Programming Command Input Low VDDIO
Table 3-1. Signal Description List
Signal Name Function Type Active
Level Voltage
Reference Comments
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SAM4N Series [SUMMARY DATASHEET]
11158AS–ATARM–06-Jun-13
4. Package and Pinout
SAM4N devices are pin-to-pin compatible with SAM3N4.
4.1 Overview of the 100-lead LQFP Package
Figure 4-1. Orientation of the 100-lead LQFP Package
4.2 Overview of the 100-ball TFBGA Package
The 100-ball TFBGA package has a 0.8 mm ball pitch and respects the Green Standards. Its dimensions are 9 x 9 x 1.1
mm.
Figure 4-2. Orientation of the 100-ball TFBGA Package
Table 4-1. SAM4N Packages
100 Pins/ Balls 64 Pins/ Balls 48 Pins/balls
SAM4N16 LQFP,TFBGA and
VFBGA LQFP and QFN -
SAM4N8 LQFP,TFBGA and
VFBGA LQFP and QFN LQFP and QFN
125
26
50
5175
76
100
1
3
4
5
6
7
8
9
10
2
ABCDEFGHJK
TOP VIEW
BALL A1
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SAM4N Series [SUMMARY DATASHEET]
11158AS–ATARM–06-Jun-13
4.3 Overview of the 100-ball VFBGA Package
The 100-ball VFBGA package has a 0.65 mm ball pitch and respects the Green Standards. Its dimensions are 7x 7x 1
mm.
Figure 4-3. Orientation of the 100-ball VFBGA Package
Top Vie w
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SAM4N Series [SUMMARY DATASHEET]
11158AS–ATARM–06-Jun-13
4.4 100-lead LQFP, TFBGA and VFBGA Pinout
Table 4-2. SAM4N8/16 100-lead LQFP Pinout
1 ADVREF 26 GND 51 TDI/PB4 76 TDO/TRACESWO/
PB5
2 GND 27 VDDIO 52 PA6/PGMNOE 77 JTAGSEL
3 PB0/AD4 28 PA16/PGMD4 53 PA5/PGMRDY 78 PC18
4 PC29/AD13 29 PC7 54 PC28 79 TMS/SWDIO/PB6
5 PB1/AD5 30 PA15/PGMD3 55 PA4/PGMNCMD 80 PC19
6 PC30/AD14 31 PA14/PGMD2 56 VDDCORE 81 PA31
7 PB2/AD6 32 PC6 57 PA27 82 PC20
8 PC31/AD15 33 PA13/PGMD1 58 PC8 83 TCK/SWCLK/PB7
9 PB3/AD7 34 PA24 59 PA28 84 PC21
10 VDDIN 35 PC5 60 NRST 85 VDDCORE
11 VDDOUT 36 VDDCORE 61 TST 86 PC22
12 PA17/PGMD5/
AD0 37 PC4 62 PC9 87 ERASE/PB12
13 PC26 38 PA25 63 PA29 88 PB10
14 PA18/PGMD6/
AD1 39 PA26 64 PA30 89 PB11
15 PA21/AD8 40 PC3 65 PC10 90 PC23
16 VDDCORE 41 PA12/PGMD0 66 PA3 91 VDDIO
17 PC27 42 PA11/PGMM3 67 PA2/PGMEN2 92 PC24
18 PA19/PGMD7/
AD2 43 PC2 68 PC11 93 PB13/DAC0
19 PC15/AD11 44 PA10/PGMM2 69 VDDIO 94 PC25
20 PA22/AD9 45 GND 70 GND 95 GND
21 PC13/AD10 46 PA9/PGMM1 71 PC14 96 PB8/XOUT
22 PA23 47 PC1 72 PA1/PGMEN1 97 PB9/PGMCK/XIN
23 PC12/AD12 48 PA8/XOUT32/
PGMM0 73 PC16 98 VDDIO
24 PA20/AD3 49 PA7/XIN32/
PGMNVALID 74 PA0/PGMEN0 99 PB14
25 PC0 50 VDDIO 75 PC17 100 VDDPLL
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SAM4N Series [SUMMARY DATASHEET]
11158AS–ATARM–06-Jun-13
Table 4-3. SAM4N8/16 100-ball TFBGA Pinout
A1 PB1/AD5 C6 TCK/SWCLK/PB7 F1 PA18/PGMD6/
AD1 H6 PC4
A2 PC29 C7 PC16 F2 PC26 H7 PA11/PGMM3
A3 VDDIO C8 PA1/PGMEN1 F3 VDDOUT H8 PC1
A4 PB9/PGMCK/XIN C9 PC17 F4 GND H9 PA6/PGMNOE
A5 PB8/XOUT C10 PA0/PGMEN0 F5 VDDIO H10 TDI/PB4
A6 PB13/DAC0 D1 PB3/AD7 F6 PA27 J1 PC15/AD11
A7 PB11 D2 PB0/AD4 F7 PC8 J2 PC0
A8 PB10 D3 PC24 F8 PA28 J3 PA16/PGMD4
A9 TMS/SWDIO/PB6 D4 PC22 F9 TST J4 PC6
A10 JTAGSEL D5 GND F10 PC9 J5 PA24
B1 PC30 D6 GND G1 PA21/AD8 J6 PA25
B2 ADVREF D7 VDDCORE G2 PC27 J7 PA10/PGMM2
B3 GND D8 PA2/PGMEN2 G3 PA15/PGMD3 J8 GND
B4 PB14 D9 PC11 G4 VDDCORE J9 VDDCORE
B5 PC21 D10 PC14 G5 VDDCORE J10 VDDIO
B6 PC20 E1 PA17/PGMD5/
AD0 G6 PA26 K1 PA22/AD9
B7 PA31 E2 PC31 G7 PA12/PGMD0 K2 PC13/AD10
B8 PC19 E3 VDDIN G8 PC28 K3 PC12/AD12
B9 PC18 E4 GND G9 PA4/PGMNCMD K4 PA20/AD3
B10 TDO/TRACESWO/
PB5 E5 GND G10 PA5/PGMRDY K5 PC5
C1 PB2/AD6 E6 NRST H1 PA19/PGMD7/
AD2 K6 PC3
C2 VDDPLL E7 PA29/AD13 H2 PA23 K7 PC2
C3 PC25 E8 PA30/AD14 H3 PC7 K8 PA9/PGMM1
C4 PC23 E9 PC10 H4 PA14/PGMD2 K9 PA8/XOUT32/
PGMM0
C5 ERASE/PB12 E10 PA3 H5 PA13/PGMD1 K10 PA7/XIN32/
PGMNVALID
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SAM4N Series [SUMMARY DATASHEET]
11158AS–ATARM–06-Jun-13
Table 4-4. SAM4N8/16 100-ball VFBGA Pinout
A1 ADVREF C6 PC9 F1 VDDOUT H6 PA12/PGMD0
A2 VDDPLL C7 TMS/SWDIO/PB6 F2 PA18/PGMD6/AD1 H7 PA9/PGMM1
A3 PB9/PGMCK/XIN C8 PA1/PGMEN1 F3 PA17/PGMD5/AD0 H8 VDDCORE
A4 PB8/XOUT C9 PA0/PGMEN0 F4 GND H9 PA6/PGMNOE
A5 JTAGSEL C10 PC16 F5 GND H10 PA5/PGMRDY
A6 PB11 D1 PB1/AD5 F6 PC26 J1 PA20/AD3
A7 PB10 D2 PC30 F7 PA4/PGMNCMD J2 PC12/AD12
A8 PC20 D3 PC31 F8 PA28 J3 PA16/PGMD4
A9 PC19 D4 PC22 F9 TST J4 PC6
A10 TDO/TRACESWO/
PB5 D5 PC5 F10 PC8 J5 PA24
B1 GND D6 PA29/AD13 G1 PC15/AD11 J6 PA25
B2 PC25 D7 PA30/AD14 G2 PA19/PGMD7/AD2 J7 PA11/PGMM3
B3 PB14 D8 GND G3 PA21/PGMD9/AD8 J8 VDDCORE
B4 PB13/DAC0 D9 PC14 G4 PA15/PGMD3 J9 VDDCORE
B5 PC23 D10 PC11 G5 PC3 J10 TDI/PB4
B6 PC21 E1 VDDIN G6 PA10/PGMM2 K1 PA23
B7 TCK/SWCLK/PB7 E2 PB3/AD7 G7 PC1 K2 PC0
B8 PA31 E3 PB2/AD6 G8 PC28 K3 PC7
B9 PC18 E4 GND G9 NRST K4 PA13/PGMD1
B10 PC17 E5 GND G10 PA27 K5 PA26
C1 PB0/AD4 E6 GND H1 PC13/AD10 K6 PC2
C2 PC29 E7 VDDIO H2 PA22/AD9 K7 VDDIO
C3 PC24 E8 PC10 H3 PC27 K8 VDDIO
C4 ERASE/PB12 E9 PA2/PGMEN2 H4 PA14/PGMD2 K9 PA8/XOUT32/PGM
M0
C5 VDDCORE E10 PA3 H5 PC4 K10 PA7/XIN32/PGMN
VALID
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SAM4N Series [SUMMARY DATASHEET]
11158AS–ATARM–06-Jun-13
4.5 Overview of the 64-lead LQFP Package
Figure 4-4. Orientation of the 64-lead LQFP Package
4.6 Overview of the 64-lead QFN Package
Figure 4-5. Orientation of the 64-lead QFN Package
33
49
48
32
17
16
1
64
1
16
17 32
33
48
4964
TOP VIEW
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SAM4N Series [SUMMARY DATASHEET]
11158AS–ATARM–06-Jun-13
4.7 64-lead LQFP and QFN Pinout
Note: The bottom pad of the QFN package must be connected to ground.
Table 4-5. 64-pin SAM4N8/16 Pinout
1 ADVREF 17 GND 33 TDI/PB4 49 TDO/TRACESWO/
PB5
2 GND 18 VDDIO 34 PA6/PGMNOE 50 JTAGSEL
3 PB0/AD4 19 PA16/PGMD4 35 PA5/PGMRDY 51 TMS/SWDIO/PB6
4 PB1/AD5 20 PA15/PGMD3 36 PA4/PGMNCMD 52 PA31
5 PB2/AD6 21 PA14/PGMD2 37 PA27/PGMD15 53 TCK/SWCLK/PB7
6 PB3/AD7 22 PA13/PGMD1 38 PA28 54 VDDCORE
7 VDDIN 23 PA24/PGMD12 39 NRST 55 ERASE/PB12
8 VDDOUT 24 VDDCORE 40 TST 56 PB10
9 PA17/PGMD5/AD0 25 PA25/PGMD13 41 PA29 57 PB11
10 PA18/PGMD6/AD1 26 PA26/PGMD14 42 PA30 58 VDDIO
11 PA21/PGMD9/AD8 27 PA12/PGMD0 43 PA3 59 PB13/DAC0
12 VDDCORE 28 PA11/PGMM3 44 PA2/PGMEN2 60 GND
13 PA19/PGMD7/AD2 29 PA10/PGMM2 45 VDDIO 61 XOUT/PB8
14 PA22/PGMD10/AD
930 PA9/PGMM1 46 GND 62 XIN/PGMCK/PB9
15 PA23/PGMD11 31 PA8/XOUT32/PG
MM0 47 PA1/PGMEN1 63 PB14
16 PA20/PGMD8/AD3 32 PA7/XIN32/XOUT
32/PGMNVALID 48 PA0/PGMEN0 64 VDDPLL
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11158AS–ATARM–06-Jun-13
4.8 Overview of the 48-lead LQFP Package
Figure 4-6. Orientation of the 48-lead LQFP Package
4.9 Overview of the 48-lead QFN Package
Figure 4-7. Orientation of the 48-lead QFN Package
25
37 36
24
13
12
1
48
1
12
13 24
25
36
3748
TOP VIEW
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11158AS–ATARM–06-Jun-13
4.10 48-lead LQFP and QFN Pinout
Note: The bottom pad of the QFN package must be connected to ground.
Table 4-6. 48-pin SAM4N8 Pinout
1 ADVREF 13 VDDIO 25 TDI/PB4 37 TDO/TRACESWO/
PB5
2 GND 14 PA16/PGMD4 26 PA6/PGMNOE 38 JTAGSEL
3 PB0/AD4 15 PA15/PGMD3 27 PA5/PGMRDY 39 TMS/SWDIO/PB6
4 PB1/AD5 16 PA14/PGMD2 28 PA4/PGMNCMD 40 TCK/SWCLK/PB7
5 PB2/AD6 17 PA13/PGMD1 29 NRST 41 VDDCORE
6 PB3/AD7 18 VDDCORE 30 TST 42 ERASE/PB12
7 VDDIN 19 PA12/PGMD0 31 PA3 43 PB10
8 VDDOUT 20 PA11/PGMM3 32 PA2/PGMEN2 44 PB11
9 PA17/PGMD5/AD0 21 PA10/PGMM2 33 VDDIO 45 XOUT/PB8
10 PA18/PGMD6/AD1 22 PA9/PGMM1 34 GND 46 XIN/P/PB9/GMCK
11 PA19/PGMD7/AD2 23 PA8/XOUT32/PG
MM0 35 PA1/PGMEN1 47 VDDIO
12 PA20/AD3 24 PA7/XIN32/PGMN
VALID 36 PA0/PGMEN0 48 VDDPLL
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5. SAM4N Mechanical Characteristics
Figure 5-1. 100-lead LQFP Package Mechanical Drawing
This package respects the recommendations of the NEMI User Group.
Table 5-1. Device and LQFP Package Maximum Weight
SAM4N 800 mg
Table 5-2. LQFP Package Reference
JEDEC Drawing Reference MS-026
JESD97 Classification e3
Table 5-3. LQFP Package Characteristics
Moisture Sensitivity Level 3
Note : 1. This drawing is for general information only. Refer to JEDEC Drawing MS-026 for additional information.
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Figure 5-2. 100-ball TFBGA Package Drawing
This package respects the recommendations of the NEMI User Group.
Table 5-4. TFBGA Package Reference - Soldering Information (Substrate Level)
Ball Land Diameter 0.35 mm
Soldering Mask Opening 350 μm
Table 5-5. Device and 100-ball TFBGA Package Maximum Weight
SAM4N 140 mg
Table 5-6. 100-ball TFBGA Package Characteristics
Moisture Sensitivity Level 3
Table 5-7. 100-ball TFBGA Package Reference
JEDEC Drawing Reference MO-275-DDAC-01
JESD97 Classification e8
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11158AS–ATARM–06-Jun-13
Figure 5-3. 100-ball VFBGA Package Drawing
22
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This package respects the recommendations of the NEMI User Group.
Table 5-8. VFBGA Package Reference - Soldering Information (Substrate Level)
Ball Land Diameter 0.27 mm
Soldering Mask Opening 275 μm
Table 5-9. Device and 100-ball VFBGA Package Maximum Weight
SAM4N 75 mg
Table 5-10. 100-ball VFBGA Package Characteristics
Moisture Sensitivity Level 3
Table 5-11. 100-ball VFBGA Package Reference
JEDEC Drawing Reference MO-275-BBE-1
JESD97 Classification e8
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Figure 5-4. 64-lead LQFP Package Drawing
24
SAM4N Series [SUMMARY DATASHEET]
11158AS–ATARM–06-Jun-13
This package respects the recommendations of the NEMI User Group.
Table 5-12. 64-lead LQFP Package Dimensions (in mm)
Symbol Millimeter Inch
Min Nom Max Min Nom Max
A – – 1.60 – – 0.063
A1 0.05 – 0.15 0.002 – 0.006
A2 1.35 1.40 1.45 0.053 0.055 0.057
D 12.00 BSC 0.472 BSC
D1 10.00 BSC 0.383 BSC
E 12.00 BSC 0.472 BSC
E1 10.00 BSC 0.383 BSC
R2 0.08 – 0.20 0.003 – 0.008
R1 0.08 – – 0.003 – –
q 0° 3.5° 7° 0° 3.5° 7°
θ10° – – 0° – –
θ211° 12° 13° 11° 12° 13°
θ311° 12° 13° 11° 12° 13°
c 0.09 – 0.20 0.004 – 0.008
L 0.45 0.60 0.75 0.018 0.024 0.030
L1 1.00 REF 0.039 REF
S 0.20 – – 0.008 – –
b 0.17 0.20 0.27 0.007 0.008 0.011
e 0.50 BSC. 0.020 BSC.
D2 7.50 0.285
E2 7.50 0.285
Tolerances of Form and Position
aaa 0.20 0.008
bbb 0.20 0.008
ccc 0.08 0.003
ddd 0.08 0.003
Table 5-13. Device and LQFP Package Maximum Weight
SAM4N 750 mg
Table 5-14. LQFP Package Reference
JEDEC Drawing Reference MS-026
JESD97 Classification e3
Table 5-15. LQFP Package Characteristics
Moisture Sensitivity Level 3
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Figure 5-5. 64-pad QFN Package Drawing
26
SAM4N Series [SUMMARY DATASHEET]
11158AS–ATARM–06-Jun-13
This package respects the recommendations of the NEMI User Group.
Table 5-16. 64-pad QFN Package Dimensions (in mm)
Symbol Millimeter Inch
Min Nom Max Min Nom Max
A – – 090 – – 0.035
A1 – – 0.05 – – 0.001
A2 – 0.65 0.70 – 0.026 0.028
A3 0.20 REF 0.008 REF
b 0.23 0.25 0.28 0.009 0.010 0.011
D 9.00 BSC 0.354 BSC
D2 6.95 7.10 7.25 0.274 0.280 0.285
E 9.00 BSC 0.354 BSC
E2 6.95 7.10 7.25 0.274 0.280 0.285
L 0.35 0.40 0.45 0.014 0.016 0.018
e 0.50 BSC 0.020 BSC
R 0.125 – – 0.0005 – –
Tolerances of Form and Position
aaa 0.10 0.004
bbb 0.10 0.004
ccc 0.05 0.002
Table 5-17. Device and QFN Package Maximum Weight (Preliminary)
SAM4N 280 mg
Table 5-18. QFN Package Reference
JEDEC Drawing Reference MO-220
JESD97 Classification e3
Table 5-19. QFN Package Characteristics
Moisture Sensitivity Level 3
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Figure 5-6. 48-lead LQFP Package Drawing
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Table 5-20. 48-lead LQFP Package Dimensions (in mm)
This package respects the recommendations of the NEMI User Group.
Symbol Millimeter Inch
Min Nom Max Min Nom Max
A – – 1.60 – – 0.063
A1 0.05 – 0.15 0.002 – 0.006
A2 1.35 1.40 1.45 0.053 0.055 0.057
D 9.00 BSC 0.354SC
D1 7.00 BSC 0.276 BSC
E 9.00 BSC 0.354 BSC
E1 7.00 BSC 0.276 BSC
R2 0.08 – 0.20 0.003 – 0.008
R1 0.08 – – 0.003 – –
q 0° 3.5° 7° 0° 3.5° 7°
θ10° – – 0° – –
θ211° 12° 13° 11° 12° 13°
θ311° 12° 13° 11° 12° 13°
c 0.09 – 0.20 0.004 – 0.008
L 0.45 0.60 0.75 0.018 0.024 0.030
L1 1.00 REF 0.039 REF
S 0.20 – – 0.008 – –
b 0.17 0.20 0.27 0.007 0.008 0.011
e 0.50 BSC. 0.020 BSC.
D2 5.50 0.217
E2 5.50 0.217
Tolerances of Form and Position
aaa 0.20 0.008
bbb 0.20 0.008
ccc 0.08 0.003
ddd 0.08 0.003
Table 5-21. Device and LQFP Package Maximum Weight
SAM4N 190 mg
Table 5-22. LQFP Package Characteristics
Moisture Sensitivity Level 3
Table 5-23. LQFP Package Reference
JEDEC Drawing Reference MS-026
JESD97 Classification e3
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Figure 5-7. 48-pad QFN Package Drawing
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Table 5-24. 48-pad QFN Package Dimensions (in mm)
This package respects the recommendations of the NEMI User Group.
Symbol Millimeter Inch
Min Nom Max Min Nom Max
A – – 090 – – 0.035
A1 – – 0.05 – – 0.002
A2 – 0.65 0.70 – 0.026 0.028
A3 0.20 REF 0.008 REF
b 0.18 0.20 0.23 0.007 0.008 0.009
D 7.00 BSC 0.276 BSC
D2 5.45 5.60 5.75 0.215 0.220 0.226
E 7.00 BSC 0.274 BSC
E2 5.45 5.60 5.75 0.215 0.220 0.226
L 0.35 0.40 0.45 0.014 0.016 0.018
e 0.50 BSC 0.020 BSC
R 0.09 – – 0.004 – –
Tolerances of Form and Position
aaa 0.10 0.004
bbb 0.10 0.004
ccc 0.05 0.002
Table 5-25. Device and QFN Package Maximum Weight
SAM4N 142 mg
Table 5-26. QFN Package Characteristics
Moisture Sensitivity Level 3
Table 5-27. QFN Package Reference
JEDEC Drawing Reference MO-220
JESD97 Classification e3
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6. Ordering Information
Table 6-1. Ordering Codes for SAM4N Devices
Ordering Code MRL Flash
(Kbytes) RAM
(Kbytes) Package Conditioning Package
Type Temperature
Operating Range
ATSAM4N16CA-CFU A 1024 80 VFBGA 100 Tray Green Industrial
-40°C to 85°C
ATSAM4N16CA-CFUR A 1024 80 VFBGA 100 Reel Green
ATSAM4N16CA-CU A 1024 80 TFBGA100 Tray Green Industrial
-40°C to 85°C
ATSAM4N16CA-CUR A 1024 80 TFBGA100 Reel Green
ATSAM4N16CA-AU A 1024 80 QFP100 Tray Green Industrial
-40°C to 85°C
ATSAM4N16CA-AUR A 1024 80 QFP100 Reel Green
ATSAM4N16BA-AU A 1024 80 QFP64 Tray Green Industrial
-40°C to 85°C
ATSAM4N16BA-AUR A 1024 80 QFP64 Reel Green
ATSAM4N16BA-MU A 1024 80 QFN64 Tray Green Industrial
-40°C to 85°C
ATSAM4N16BA-MUR A 1024 80 QFN64 Reel Green
ATSAM4N8CA-CFU A 512 64 VFBGA 100 Tray Green Industrial
-40°C to 85°C
ATSAM4N8CA-CFUR A 512 64 VFBGA 100 Reel Green
ATSAM4N8CA-CU A 512 64 TFBGA100 Tray Green Industrial
-40°C to 85°C
ATSAM4N8CA-CUR A 512 64 TFBGA100 Reel Green
ATSAM4N8CA-AU A 512 64 QFP100 Tray Green Industrial
-40°C to 85°C
ATSAM4N8CA-AUR A 512 64 QFP100 Reel Green
ATSAM4N8BA-AU A 512 64 QFP64 Tray Green Industrial
-40°C to 85°C
ATSAM4N8BA-AUR A 512 64 QFP64 Reel Green
ATSAM4N8BA-MU A 512 64 QFN64 Tray Green Industrial
-40°C to 85°C
ATSAM4N8BA-MUR A 512 64 QFN64 Reel Green
ATSAM4N8AA-AU A 512 64 QFP48 Tray Green Industrial
-40°C to 85°C
ATSAM4N8AA-AUR A 512 64 QFP48 Reel Green
ATSAM4N8AA-MU A 512 64 QFN48 Tray Green Industrial
-40°C to 85°C
ATSAM4N8AA-MUR A 512 64 QFN48 Reel Green
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Revision History
Doc. Rev.
11158AS Comments Change
Request
Ref.
First Issue
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