®
INA148
©1999 Burr-Brown Corporation PDS-1579A Printed in U.S.A.December, 1999
FEATURES
HIGH COMMON-MODE VOLTAGE:
+75V at VS = +5V
±200V at VS = ±15V
FIXED DIFFERENTIAL GAIN = 1V/V
LOW QUIESCENT CURRENT: 260µA
WIDE SUPPLY RANGE:
Single Supply: 2.7V to 36V
Dual Supplies: ±1.35V to ±18V
LOW GAIN ERROR: 0.075% max
LOW NONLINEARITY: 0.002% max
HIGH CMR: 86dB
SO-8 PACKAGE
±200V Common-Mode Voltage
DIFFERENCE AMPLIFIER
DESCRIPTION
The INA148 is a precision, low-power, unity-gain
difference amplifier with a high common-mode input
voltage range. It consists of a monolithic precision
bipolar op amp with a thin-film resistor network.
The on-chip resistors are laser trimmed for an accu-
rate 1V/V differential gain and high common-mode
rejection. Excellent temperature tracking of the resis-
tor network maintains high gain accuracy and com-
mon-mode rejection over temperature. The INA148
will operate on single or dual supplies.
The INA148 is available in a small SO-8 surface-
mount package and it is specified for the –40°C to
+85°C extended industrial temperature range.
APPLICATIONS
CURRENT SHUNT MEASUREMENTS
DIFFERENTIAL SENSOR AMPLIFIERS
LINE RECEIVERS
BATTERY POWERED SYSTEMS
AUTOMOTIVE INSTRUMENTATION
STACKED CELL MONITORS
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
For most current data sheet and other product
information, visit www.burr-brown.com
INA148
1M50k
52.6316k
50k
2.7778k
1M
V+
V
IN
7
3
2
6
41
A1
INA148
V– Ref
V
O
+
V
IN
SBOS123
2
®
INA148
SPECIFICATIONS: VS = ±5V to ±15V Dual Supplies
At TA = +25°C, RL = 10k connected to ground and Ref pin connected to ground, unless otherwise noted.
INA148UA
PARAMETER CONDITIONS MIN TYP MAX UNITS
OFFSET VOLTAGE (VO) RTI(1)(2)
Input Offset Voltage VOS VS = ±15V, VCM = 0V ±1±5mV
VS = ±5V, VCM = 0V ±1±5mV
Drift VOS/T At TA = –40°C to +85°C±10 µV°C
vs Power Supply PSRR VS = ±1.35V to ±18V, VCM = 0V ±50 ±400 µV/V
INPUT VOLTAGE RANGE
Common-Mode Voltage Range VCM VS = ±15V, (VIN
+) – (VIN
) = 0V –200 +200 V
VS = ±5V, (VIN
+) – (VIN
) = 0V –100 +80 V
Common-Mode Rejection CMRR
VS = ±15V, VCM = –200V to +200V, RS = 0
70 86 dB
V
S
= ±5V, V
CM
= –100V to +80V, R
S
= 0
70 86 dB
INPUT IMPEDANCE
Differential 2M
Common Mode 1M
NOISE RTI(1)(3)
Voltage Noise, f = 0.1Hz to 10Hz en17 µVp-p
Voltage Noise Density, f = 1kHz 880 nV/Hz
GAIN
Initial(1) 1 V/V
Gain Error VO = (V–) + 0.5 to (V+) – 1.5 ±0.01 ±0.075 %
vs Temperature ±3±10 ppm/°C
Nonlinearity
V
S
= ±15V, V
O
= (V–) + 0.5 to (V+) – 1.5
±0.001 ±0.002 % of FSR
V
S
= ±5V, V
O
= (V–) + 0.5 to (V+) – 1.5
±0.001 % of FSR
FREQUENCY RESPONSE
Small Signal Bandwidth 100 kHz
Slew Rate 1V/µs
Settling Time: 0.1% VS = ±15V, 10V Step 21 µs
0.01% VS = ±15V, 10V Step 25 µs
0.1% VS = ±5V, 6V Step 21 µs
0.01% VS = ±5V, 6V Step 25 µs
Overload Recovery 50% Input Overload 24 µs
OUTPUT (VO)
Voltage Output RL = 100k(V–) + 0.25 (V+) – 1 V
RL = 10k(V–) + 0.5 (V+) – 1.5 V
Output Current IO
Short-Circiuit Current Continuous to Common ±13 mA
Capacitive Load Stable Operation 10 nF
POWER SUPPLY
Operating Range, Dual Supplies ±1.35 ±18 V
Quiescent Current VIN = 0, IO = 0 ±260 ±300 µA
TEMPERATURE RANGE
Specified –40 85 °C
Operating –55 125 °C
Storage –55 125 °C
Thermal Resistance
θ
JA SO-8 Surface Mount 150 °C/W
NOTES: (1) Overall difference amplifier configuration. Referred to input pins (VIN
+ and VIN
), gain = 1V/V (2) Input offset voltage specification includes effects of
amplifier's input bias and offset currents. (3) Includes effects of input current noise and thermal noise contribution of resistor network.
3
®
INA148
SPECIFICATIONS: VS = +5V Single Supply
At TA = +25°C, RL = 10k connected to VS/2 and Ref pin connected to VS/2, unless otherwise noted.
INA148UA
PARAMETER CONDITIONS MIN TYP MAX UNITS
OFFSET VOLTAGE (VO) RTI(1)(2)
Input Offset Voltage VOS VCM = VS/2 ±1±5mV
Drift VOS/T At TA = –40°C to +85°C±10 µV°C
vs Power Supply PSRR VS = +2.7V to +36V, VCM = VS/2 ±50 ±400 µV/V
INPUT VOLTAGE RANGE
Common-Mode Voltage Range VCM (VIN
+) – (VIN
) = 0V, VREF = 0.25V –4 +75 V
(VIN
+) – (VIN
) = 0V, VREF = VS/2 –47.5 +32.5 V
Common-Mode Rejection CMRR VCM = –47.5V to +32.5V, RS = 070 86 dB
INPUT IMPEDANCE
Differential 2M
Common Mode 1M
NOISE RTI(1)(3)
Voltage Noise, f = 0.1Hz to 10Hz en17 µVp-p
Voltage Noise Density, f = 1kHz 880 nV/Hz
GAIN
Initial(1) 1 V/V
Gain Error VO = +0.5V to +3.5V ±0.01 ±0.075 %
vs Temperature ±3±10 ppm/°C
Nonlinearity VO = +0.5V to +3.5V ±0.001 % of FSR
FREQUENCY RESPONSE
Small Signal Bandwidth 100 kHz
Slew Rate 1V/µs
Settling Time: 0.1% VS = +5V, 3V Step 21 µs
0.01% VS = +5V, 3V Step 25 µs
Overload Recovery 50% Input Overload 13 µs
OUTPUT (VO)
Voltage Output RL = 100k(V–) + 0.25 (V+) – 1 V
RL = 10k(V–) + 0.5 (V+) – 1.5 V
Output Current IO
Short-Circiuit Current Continuous to Common ±8mA
Capacitive Load Stable Operation 10 nF
POWER SUPPLY
Operating Range, Single Supply +2.7 +36 V
Quiescent Current VIN = 0, IO = 0 260 300 µA
TEMPERATURE RANGE
Specified –40 85 °C
Operating –55 125 °C
Storage –55 125 °C
Thermal Resistance
θ
JA SO-8 Surface Mount 150 °C/W
NOTES: (1) Overall difference amplifier configuration. Referred to input pins (VIN
+ and VIN
), gain = 1V/V (2) Input offset voltage specification includes effects of
amplifier's input bias and offset currents. (3) Includes effects of input current noise and thermal noise contribution of resistor network.
4
®
INA148
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
Supply Voltage, V+ to V–.................................................................... 36V
Signal Input Terminals, Continuous ................................................ ±200V
Peak (0.1s) ............................................... ±500V
Output Short Circuit to GND Duration .................................... Continuous
Operating Temperature ..................................................–55°C to +125°C
Storage Temperature .....................................................–55°C to +125°C
Junction Temperature.................................................................... +150°C
Lead Temperature (soldering, 10s)............................................... +300°C
NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability. These are stress ratings only, and functional operation of the
device at these or any other conditions beyond those specified is not implied.
ABSOLUTE MAXIMUM RATINGS(1)
PACKAGE SPECIFIED
DRAWING TEMPERATURE PACKAGE ORDERING TRANSPORT
PRODUCT PACKAGE NUMBER RANGE MARKING NUMBER(1) MEDIA
INA148UA SO-8 182 –40°C to +85°C INA148UA INA148UA Rails
"""""INA148UA/2K5 Tape and Reel
NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500 pieces
of “INA148UA/2K5” will get a single 2500-piece Tape and Reel.
PACKAGE/ORDERING INFORMATION
PIN CONFIGURATION
TOP VIEW SO-8
Ref
–In
+In
V–
NC
V+
Out
NC
1
2
3
4
8
7
6
5
5
®
INA148
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = ±15V, RL = 10k to common, and VREF = 0V, unless otherwise noted.
5
0
–5
–10
–20
–25
–30
–35 10 100 1k 10k 100k 1M
Voltage Gain (dB)
Frequency (Hz)
GAIN vs FREQUENCY
V
S
= ±1.35V
V
S
= ±15V
100
80
60
40
20
010 100 1k 10k 100k 1M
Voltage Gain (dB)
Frequency (Hz)
COMMON-MODE REJECTION vs FREQUENCY
= V
S
= ±15V
= V
S
= ±1.35V
110
100
90
80
70
60
50
40
30
20
10 110 100 1k 10k 100K
Power Supply Rejection (dB)
Frequency (Hz)
POWER SUPPLY REJECTION vs FREQUENCY
PSR+
(VS = ±18V)
PSR+
(VS = ±1.35V)
PSR–
(VS = ±18V)
PSR–
(VS = ±1.35V)
800
1k
600
400
200
100 10 100 1k 10k 100k
INPUT VOLTAGE NOISE SPECTRAL DENSITY
Input Noise Spectral Density (nV/Hz)
Frequency (Hz)
290
280
270
260
250
240
230
220
210–60 –40 –20 0 20 40 60 80 100 120 140
Temperature (°C)
IQ (µA)
QUIESCENT CURRENT vs TEMPERATURE
VS = ±2.5V
VS = ±15V
1s/div
5µV/div
VOLTAGE NOISE (RTI)
0.1Hz to 10Hz
6
®
INA148
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = ±15V, RL = 10k to common, and VREF = 0V, unless otherwise noted.
20
15
10
5
0
–5
–10
–15
–20–60 –40 –20 020 40 60 80 100 120 140
+SC
–SC
SHORT-CIRCUIT CURRENT vs TEMPERATURE
Temperature (°C)
Short-Circuit Current (mA)
5V/div
25µs/div
+125°C +125°C
–55°C–55°C
LARGE-SIGNAL STEP RESPONSE
vs TEMPERATURE
25µs/div
5V/div
LARGE-SIGNAL STEP RESPONSE
(RL = 10k, CL = 10pF)
10µs/div
50mV/div
SMALL-SIGNAL STEP RESPONSE
(RL = 10k, CL = 10pF)
5V/div
100µs/div
LARGE-SIGNAL CAPACITIVE LOAD RESPONSE
(CL = 1nF and 10nF)
VIN
CL = 1nF CL = 10nF G = +1V/V
5V/div
1ms/div
RL = 1k
RL = 10k
RL = 100k
RL = 1k
RL = 10k
RL = 100k
OUTPUT VOLTAGE SWING vs RL
7
®
INA148
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = ±15V, RL = 10k to common, and VREF = 0V, unless otherwise noted.
24
18
12
6
0
–5.0
–4.0
–3.0
–2.0
–1.0
0.0
1.0
2.0
3.0
4.0
5.0
Offset Voltage, RTI (mV)
Percent of Amplifiers (%)
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
VS = ±15V
24
20
16
12
8
4
0
–5.0
–4.0
–3.0
–2.0
–1.0
0.0
1.0
2.0
3.0
4.0
5.0
Offset Voltage, RTI (mV)
Percent of Amplifiers (%)
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
VS = ±2.5V
20
15
10
5
0
–30.0
–24.0
–18.0
–12.0
–6.0
0.0
6.0
12.0
18.0
24.0
30.0
Offset Voltage Drift, RTI (µV/°C)
Percent of Amplifiers (%)
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
V
S
= ±15V
–30.0
–24.0
–18.0
–12.0
–6.0
0.0
6.0
12.0
18.0
24.0
30.0
Offset Voltage Drift, RTI (µV/°C)
Percent of Amplifiers (%)
OFFSET VOLTAGE DRIFT
PRODUCTION DISTRIBUTION
V
S
= ±2.5V
20
15
10
5
0
40
30
20
10
0
–10.0
–8.0
–6.0
–4.0
–2.0
0.0
2.0
4.0
6.0
8.0
10.0
Gain Drift (ppm/°C)
Percent of Amplifiers (%)
GAIN DRIFT PRODUCTION DISTRIBUTION
VS = ±15V
40
30
20
10
0
–10.0
–8.0
–6.0
–4.0
–2.0
0.0
2.0
4.0
6.0
8.0
10.0
Gain Drift (ppm/°C)
Percent of Amplifiers (%)
GAIN DRIFT PRODUCTION DISTRIBUTION
V
S
= ±2.5V
8
®
INA148
FIGURE 1. Basic Circuit Connections.
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = ±15V, RL = 10k to common, and VREF = 0V, unless otherwise noted.
APPLICATION INFORMATION
The INA148 is a unity gain difference amplifier with a high
common-mode input voltage range. A basic diagram of the
circuit and pin connections is shown in Figure 1.
To achieve its high common-mode voltage range, the INA148
features a precision laser-trimmed thin-film resistor network
with a 20:1 input voltage divider ratio. High input voltages
are thereby reduced in amplitude, allowing the internal op
amp to “see” input voltages that are within its linear oper-
ating range. A “Tee” network in the op amp feedback
network places the amplifier in a gain of 20V/V, thus
restoring the circuit’s overall gain to unity (1V/V).
External voltages can be summed into the amplifier’s output
by using the Ref pin, making the differential amplifier a
highly versatile design tool. Voltages on the Ref pin will
also influence the INA148’s common-mode voltage range.
In accordance with good engineering practice for linear
integrated circuits, the INA148’s power-supply bypass
capacitors should be connected as close to pins 4 and 7 as
practicable. Ceramic or tantalum types are recommended for
use as bypass capacitors.
The input impedances are unusually high for a difference
amplifier and this should be considered when routing input
signal traces on a PC board. Avoid placing digital signal
traces near the difference amplifier’s input traces to mini-
mize noise pickup.
OPERATING VOLTAGE
The INA148 is specified for ±15V and ±5V dual supplies
and +5V single supplies. The INA148 can be operated with
single or dual supplies with excellent performance.
The INA148 is fully characterized for supply voltages from
±1.35V to ±18V and over temperatures of –55ºC to +125 ºC.
Parameters that vary significantly with operating voltage,
load conditions, or temperature are shown in the Typical
Performance Curves section.
5µs/div
5V/div
INVERTING INPUT
50% OVERLOAD RECOVERY TIME
1M50k
52.6316k
50k
2.7778k
1M
V
IN
7
3
2
6
41
A1
INA148
–V
S
V
O
+
V
IN
0.1µF
+V
S
0.1µF
V
O
= (V
IN
– V
IN
)
+
5µs/div
5V/div
NON-INVERTING INPUT
50% OVERLOAD RECOVERY TIME
VS = ±15V
VIN
VOUT
0V
0V
VIN+
VOUT
0V
VS = ±15V
9
®
INA148
FIGURE 2. Optional Offset Trim Voltage.
FIGURE 3. Preferred Offset Trim Circuit.
THE GAIN EQUATION
An internal on-chip resistor network sets the overall differ-
ential gain of the INA148 to precisely 1V/V. It’s output is
accordance with the equation:
VOUT = (VIN
+ – VIN
) + VREF (1)
COMMON-MODE RANGE
The 20:1 input resistor ratio of the INA148 provides an input
common-mode range that extends well beyond its power
supply rails.
The exact input voltage range depends on the amplifier’s
power-supply voltage and the voltage applied to the Ref
terminal (pin 1). Typical input voltage ranges at different
power supply voltages can be found in the applications
circuits section.
OFFSET TRIM
The INA148 is laser-trimmed for low offset voltage and
drift. Most applications will require no external offset ad-
justment.
Since a voltage applied to the reference (Ref) pin (pin 1) will
be summed directly into the amplifier’s output signal, this
technique can be used to null the amplifier’s input offset
voltage. Figure 2 shows an optional circuit for trimming the
offset voltage.
To maintain high common-mode rejection (CMR), the source
impedance of any signal applied to the Ref terminal should
be very low (5).
A source impedance of only 10 at the Ref pin will reduce
the INA148’s CMR to approximately 74dB. High CMR can
be restored if a resistor is added in series with the amplifier’s
positive input terminal (pin 3). This resistor should be 19
times the source impedance that drives the Ref pin. For
example, if the Ref pin sees a source impedance of 10, a
resistor of 190 should be added in series with pin 3.
1M50k
52.6316k
50k
10k10k
+15V
–15V
10
2.7778k
1M190
V
IN
7
3
2
6
41
A1
INA148
–V
S
V
O
+
V
IN
+V
S
V
O
= (V
IN
– V
IN
) + V
REF
+
±15mV Offset
Trim Range, RTI
V
REF
1M50k
52.6316k
50k
2.7778k
1M
V
IN
7
3
2
6
41
A1
INA148
–15V
V
O
+
V
IN
+15V
±15mV Offset
Trim Range, RTI
100k100k
100
+15V
–15V
V
REF
OPA237
V
O
= (V
IN
– V
IN
) + V
REF
+
10
®
INA148
Preferably, the offset trim voltage applied to the Ref pin
should be buffered with an amp such as an OPA237
(see Figure 3). In this case, the op amp output impedance is
low enough that no external resistor is needed to maintain
the INA148’s excellent CMR.
INPUT IMPEDANCE
The input resistor network determines the impedance of
each of the INA148’s inputs. It is approximately 1M.
Unlike an instrumentation amplifier, signal source imped-
ances at the two input terminals must be nearly equal to
maintain good common-mode rejection.
A mismatch between the two inputs’ source impedances will
cause a differential amplifier’s common-mode rejection to
be degraded. With a source impedance imbalance of only
500, CMR can fall to approximately 66dB.
Figure 4 shows a common application—measuring power
supply current through a shunt resistor (RS). A shunt resistor
creates an unbalanced source resistance condition that can
degrade a differential amplifier’s common mode rejection.
Unless the shunt resistor is less than approximately 100, an
additional equal compensating resistor (RC) is recommended
to maintain input balance and high CMR.
Source impedances (or shunts) greater than 5k are not
recommended, even if they are “perfectly” compensated.
This is because the internal resistor network is laser-trimmed
for accurate voltage divider ratios, but not necessarily to
absolute values. Input resistors are shown as 1M, however,
this is only their nominal value.
In practice, the input resistors’ absolute values may vary by
as much as 30 percent. The two input resistors match to
about 5 percent, so adding compensating resistors greater
than 5k can cause a serious mismatch in the resulting
resistor network voltage divider ratios, thus degrading CMR.
Attempts to extend the INA148 input voltage range by
adding external resistors is not recommended for the reasons
just described in the last paragraph. CMR will suffer a
serious degradation unless the resistors are carefully trimmed
for CMR and gain. This is an iterative adjustment and can be
tedious and time consuming.
FIGURE 4. Shunt-Resistor Current Measurement Circuit.
FIGURE 5. AC-Coupled Difference Amplifier.
1M50k
52.6316k
50k
2.7778k
1MR
C
R
S
I
L
V
CM
7
3
200V
2
6
41
A1
INA148
–15V
V
O
+15V
LOAD
V
O
= I
L
• R
S
Make R
C
= R
S
if R
S
100
1M50k
52.6316k
50k
2.7778k
1M
7
3
2
6
41
A1
INA148
–15V
V
O
+15V
Typical CMR: 50Hz = 59dB
60Hz = 61dB
400Hz = 78dB
NOTE: (1) Metallized polypropylene, ±5% tolerance.
C
1
4.7µF
(1)
250V
C
2
4.7µF
(1)
250V
V
IN
+
V
IN
V
CM
= 200Vpk
V
O
= (V
IN
– V
IN
)
+
11
®
INA148
FIGURE 6. Quasi-AC-Coupled Differential Amplifier.
FIGURE 7. Single-Supply Differential Amplifier.
FIGURE 8. Battery Monitor Circuit.
1M50k
52.6316k
50k
2.7778k
1M
–V
S
V
IN
4
3
2
6
A1
INA148
V
O
+
V
IN
0.22µF
1
V
REF
+V
S
–V
S
+V
S
7
U2:
OPA132 for V
S
= ±5V to ±15V
OPA340 for V
S
= ±2.5
1M
U1
f
C
0.75 Hz HPF
2
3
U2 4
7
6
V
O
= (V
IN
– V
IN
) + V
REF
+
1M50k
52.6316k
50k
2.7778k
1M
V
IN
3
2
6
41
A1
INA148
V
O
+5V
+
V
IN
7
0.1µF+5V
V
CM
= –23V to +56V
V
O
= (V
IN
– V
IN
) + 1.235V
REF1004-1.2
10µF
534k
+–
+
1M50k
52.6316k
50k
2.7778k
1M
3
2
6
1
A1
INA148
REF1004-1.2
10µF
5
7
0.1µF
4
0.01
+
+
28V
Supply
I
C
271k
V
O
= 1.235V + (I
C
• R
S
)
R
S
12
®
INA148
1M50k
52.6316k
50k
2.7778k
1M
3
2
6
1
A1
INA148
7
4
V
O
200k
R
S
50mV
shunt
2
3
7
4
6
–V
ISO
+V
ISO
1k
OPA277
I
V
CM
= ±200V max
–15V
±50mV Input = ±10V Output
IN5245
IN5245
+V
ISO
–V
ISO
6
5
7
+15
C
–15
+V
S
O
DCP011515D
2
1
0.47µF ceramic (all)
+15V
+15V
0.1µF
0.1µF
FIGURE 9. 50mV Current Shunt Amplifier with ±200V Common-Mode Voltage Range.
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
INA148UA ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA148UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA148UA/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
INA148UAG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 16-Feb-2009
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm) W
(mm) Pin1
Quadrant
INA148UA/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 11-Mar-2008
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
INA148UA/2K5 SOIC D 8 2500 346.0 346.0 29.0
PACKAGE MATERIALS INFORMATION
www.ti.com 11-Mar-2008
Pack Materials-Page 2
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