RT9945
1
DS9945-01 April 2011 www.richtek.com
Ordering Information
Note :
Richtek products are :
` RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
` Suitable for use in SnPb or Pb-free soldering processes.
Power Management ICs for Handheld Device
Applications
zGPS and PND
zPDA and Smart Phones
zHandheld Devices
General Description
The RT9945 is a complete power management IC (PMIC)
for handheld device platform. This PMIC contains a fully
integrated linear charger for a single cell Lithium Ion battery,
five LDO linear regulators and two high efficiency buck
converters, a comparator, a reset and an I2C serial interface
to program one buck and one regulator output voltages as
well as power on timing control for complete flexibility.
The linear charger integrates LDO, MOSFET pass element,
and thermal-regulation circuitry. The proprietary thermal-
regulation circuitry limits the die temperature when fast
charging or while exposed to high ambient temperatures,
allowing maximum charging current without damaging the
IC.
The two step-down converters are optimized for small size
inductor and high efficiency applications. They utilize a
proprietary hysteretic PWM control scheme that switches
with nearly fixed frequency and is adjustable, allowing the
customer to trade some efficiency for smaller external
component, as desired. The output current is guaranteed
up to 600mA, while quiescent current is a low 40μA (typ).
The LDO linear regulators provide high power supply
rejection rate and have only 45uVRMS of output noises for
100Hz to 10kHz frequency range to power noise sensitive
RF sections.
The RT9945 is available in WQFN-40L 5x5 package.
Features
zz
zz
zCharger
``
``
` Adapter/USB & Battery Two Input with Auto Power
Dynamic Path.
``
``
` PWR_IN LDO Support Continuous 1.5A, Peak 2A
Current
``
``
` 4.5V to 5.5V Operation Voltage Range with Max.
18V Input Voltage
``
``
` Switch Well for LDO and Charger Power MOSFET
``
``
` Set Charge Current by ISETA Pin
``
``
` Charge Status Indicator
``
``
` Interrupt for PWR_IN Plug In/Out, Time Out and
Charger Done.
``
``
` Battery Temperature Monitoring
zz
zz
zHysteretic Buck
``
``
` Buck 1 for Memory , Adjustable V oltage and 600mA
Output Current
``
``
` Buck 2 for Core voltage with 25mV/step I2C
Adjustable, 600mA Output Current
``
``
` Max. Efficiency Up to 90%
zz
zz
zLDO
``
``
` LDO1 : 3.3V/500mA for I/O, Default ON
``
``
` LDO2 : 1.2V/80mA for PLL, Default ON
``
``
` LDO3 : 1.2V/80mA for VDD Alive.
``
``
` LDO4 : 2.5V/50mA, Default OFF
``
``
` LDO5 : 3.3V/50mA, Default OFF
``
``
` Minimize the External Component Counts
zz
zz
zOther
``
``
` Low Voltage Detector
``
``
` I2C Compatible Interface
``
``
` Power ON Timing Control
zz
zz
zRoHS Compliant and Halogen Free
Package Type
QW : WQFN-40L 5x5 (W-Type)
Lead Plating System
G : Green (Halogen Free and Pb Free)
RT9945
RT9945
2
DS9945-01 April 2011www.richtek.com
Pin No. Pi n Name Pi n Functi on
1 nCHG_S
This pin indicates the status of the battery charger. Open Drain Output and
Active Low.
2 ISETA PWR_IN Charge Current Setting Pin.
3 TS Temperature Sense Pin.
4 TIMER Charge Time Setting.
5 VOUT2 1.2V/80mA LDO regulator.
6 VIN3 This pin must be shorted to VSYS, VIN1 and VIN2. Connect a 4.7μF ceramic
capacitor from VIN3 to GND.
7 VOUT3 1.2V/80mA LDO Regulator with 25mV/Step Adjustable.
8 VOUT1 3.3V/500mA LDO Regulator.
9 VIN2 Must be shorted to VSYS, VIN1 and VIN3. Connect a 10μF ceramic capacitor
from VIN2 to GND.
10 VOUT4 2.5V/50mA LDO Regulator. Default off, controlled by I2C.
11 VOUT5 3.3V/50mA LDO Regulator. Default off, controlled by I2C.
12 nPBSTAS
Push-Button Status Pin. This pin is used to inform the power good state to
processor. Open Drain Output and Active Low.
13 nRESET
This pin provides a 200ms reset signal during power-up to initialize a processor.
Open Drain and Active Low.
14 nINT This pin must be Active Low to inform processor the interrupt events happened,
Open Drain Output and Active Low.
15 nLBO Low-Battery indication. Open Drain Output and Active Low.
16 LBI Low-Battery Detection. This pin is used to monitor the VSYS voltage and the
internal reference voltage is 1V.
17,
41 (Exposed Pad) GND Ground. The exposed pad must be soldered to a large PCB and connected to
GND for maximum power dissipation.
Functional Pin Description
To be continued
Pin Configurations
(TOP VIEW)
WQFN-40L 5x5
30
29
28
27
26
25
24
23
22
21
313233
34
35363738
39
40
1
2
3
4
5
6
7
8
9
10
201918171615141312
11
DATA
BATT
BATT
FB1
PGND1
LX1
VIN1
LX2
PGND2
FB2
nCHG_S
TS
TIMER
VOUT2
VIN3
VOUT3
VOUT1
VIN2
VOUT4
VOUT5
nINT
nLBO
LBI
GND
S2
S1
PWR_EN
PWR_IN
PWR_IN
PWR_ID
VSYS
VSYS
HP_PWR
PWR_ON
PWR_HOLD
CLK
GND
ISETA
nPBSTAS
ISETU
41
nRESET
RT9945
3
DS9945-01 April 2011 www.richtek.com
Pin No. Pin Name Pin Functi on
18 S2 LDO1 & LD O2 Output Voltage Setting. Directly connect VSYS t o pull high, GND
to pull low.
19 S1 LDO1 & LD O2 Output Voltage Setting. Directly connect VSYS t o pull high, GND
to pull low.
20 PWR_EN Buck2 & LDO2 Enable Pin from Processor.
21 FB2 Voltage Feedback 2. FB2 regulates to 0.675V nominal.
22 PGND2 Buck 2’s Power Ground.
23 LX2 Inductor connection to the drains of the Internal N-MOSFET and P-MOSFET.
24 VIN1 This pin must be shorted to VSYS, VIN2, and VIN3. Connect a 10μF ceramic
capacitor from VIN1 to GND .
25 LX1 Inductor connection to the drains of the Internal N-MOSFET and P-MOSFET.
26 PGND1 Buck 1’s Power Ground.
27 FB1 Voltage Feedback 1. FB1 regulates to 0.6V nominal.
28,29 BATT Main Battery Supply Input Terminal. This pin delivers charging current and
monitors batter
y
volta
g
e.
30 DATA Data Input/ Output for Serial Interface.
31 CLK Clock Input for Serial Interface.
32 PWR_HOLD Logic low signal from processor to turn-off the PMU.
33 PWR_ON
Active High Power On/ Off Key Input. This pin has an Internal 2μA pull-down
current to GND. W hen the push button is closed, It Is shorted to SYS, not
Ground. This input is de-bounced with 320ms (typ).
34 HP_PWR
Logic High Signals Connection of Hands Free Kit. This pin has an Internal 2μA
pull-down current to GND. This input is de-bounced with 320ms (typ).
35,36 VSYS Connect this pin to system with a minimum 22μF cera mi c ca pacitor to GN D.
This
p
in must be shorted to VIN1, VIN2, and VIN3
37 PWR_ID Power Source Input D etection Pin.
38,39 PWR_IN Power Source Input. Connect a 4.7μF ceramic capacitor from this pin to GND.
40 ISETU USB Charge Current Setting Pin.
RT9945
4
DS9945-01 April 2011www.richtek.com
Typical Application Circuit
TS
FB1
PGND1
LX1
VIN1
LX2
PGND2
FB2
HP_PWR
VOUT1
VOUT4
VIN3
VOUT5
VIN2
VOUT2
RT9945
nPBSTAS
PWR_ON
nCHG_S
TIMER
ISETA
VOUT3
BATT
GND
VBUCK1
1.8V/600mA
VBUCK2
1.35V/600mA
L2
3
27
26
25
24
23
22
21
34
17, Exposed Pad (41)
11
6
10
5
9
8
28, 29
38, 39
33
12
7
PWR_EN
S2
S1
VSYS
nRESET
20
35, 36
19
18
10µF
L1
LDO1 (S1 and S2 Control) 500mA
+
To VIN1, VIN2, VIN3
PWR_IN
+5V (Adapter / USB)
VSYS
VSYS
nINT 14
13
LBI
VSYS
4
2
16
1
4.7µF
100k
VBACK1
4.7µF
1µF
1µF
1µF
1µF
10µF
1µF x 2
22µF
2k
(750mA) 0.1µF
510 VSYS
100k
VSYS
100k
nLBO 15
VSYS
100k
100k
39k
4.7µF
PWR_ID
37
PWR_HOLD
ISETU
40
32
2.2µH
200k
100k
120pF
2.2µH
100k
100k
220pF
1µF
LDO2 (S1 and S2 Control) 80mA
LDO3 80mA
LDO4 (I2C Control) 50mA
LDO5 (I2C Control) 50mA
100k
VBACK1
USB
Adapter
NTC
DATA 30
VSYS
4.7k
CLK 31
VSYS
4.7k
RSET
500mA
100mA
CTIMER
VSYS
VSYS
VSYS
RT9945
5
DS9945-01 April 2011 www.richtek.com
Function Block Diagram
ON/OFF
Control & I2C
Interface
Li-lon Linear Charger
Control
Thermal
Shutdown
UVLO
Buck1
Reset
Buck2
LDO1
LDO2
LDO3
LDO4
320ms
Debounce
HP_PWR
FB1
PGND1
LX1
LX2
PGND2
FB2
nCHG_S
VOUT5
VOUT2
PWR_EN
VOUT1
VOUT3
ISETA
ISETU
PWR_ID
TIMER
BATT
VOUT4
PWR_ON
PWR_HOLD
nRESET
PWR_IN VSYS
VIN1
LDO5
VIN3
VIN2
BUCK1 OK
2µA
320ms
Debounce
2µA
nPBSTAS
TS
SW
Control
Circuit
nINT
+
-
LBI
1V
VSYS
nLBO
DATA CLK
S2 S1
GND
RT9945
6
DS9945-01 April 2011www.richtek.com
Recommended Operating Conditions (Note 4)
zJunction Temperature Range --------------------------------------------------------------------------- −40°C to 125°C
zAmbient Temperature Range --------------------------------------------------------------------------- −40°C to 85°C
Absolute Maximum Ratings (Note 1)
zPWR_IN ----------------------------------------------------------------------------------------------------- 0V to 7V
zPWR_HOLD, PWR_ON, HP_PWR, DATA, CLK, nCHG_S, ISETA, TS, TIMER,
nPBSTAS, nRESET, nINT, nLBO, LBI, S2, PWR_EN, PWR_ID to GND -------------------- −0.3V to VSYS + 0.3V
zFB2, FB1, LX2, LX1 -------------------------------------------------------------------------------------- −0.3V to VIN1 + 0.3V
zVOUT2, VOUT3 ------------------------------------------------------------------------------------------- −0.3V to VIN3 + 0.3V
zVOUT1, VOUT4, VOUT5 ------------------------------------------------------------------------------- −0.3V to VIN2 + 0.3V
zVIN1, VIN2, VIN3 ----------------------------------------------------------------------------------------- VSYS−0.3V to VSYS + 0.3V
zBATT, SYS ------------------------------------------------------------------------------------------------- 0V to 5.5V
zISETU ------------------------------------------------------------------------------------------------------- −0.3V to PWR_IN + 0.3V 6V
zPGND1, PGND2 ------------------------------------------------------------------------------------------ −0.3V to 0.3V
zPower Dissipation, PD @ TA = 25°C
WQFN-40L 5x5 ------------------------------------------------------------------------------------------- 2.778W
zPackage Thermal Resistance (Note 2)
WQFN-40L 5x5, θJA -------------------------------------------------------------------------------------- 36°C/W
WQFN-40L 5x5, θJC ------------------------------------------------------------------------------------- 7°C/W
zJunction Temperature ------------------------------------------------------------------------------------ 150°C
zLead Temperature (Soldering, 10 sec.) -------------------------------------------------------------- 260°C
zStorage Temperature Range --------------------------------------------------------------------------- −65°C to 150°C
zESD Susceptibility (Note 3)
HBM (Human Body Mode) ----------------------------------------------------------------------------- 2kV
MM (Machine Mode) ------------------------------------------------------------------------------------- 200V
≤
RT9945
7
DS9945-01 April 2011 www.richtek.com
Electrical Characteristics
Parameter Symbol Conditions Min Typ Max Unit
S ystem Operating Range
Input Supply Voltage VIN Without PWR_IN 3.3 -- 5.5 V
Shutdown Supply Current ISHDN VBATT = 4.2V, VOUT1 to 5, LX1, LX2
to ground. 4 10 15 μA
Sleep Mode Supply Current VBATT = 3.7V, PWR_EN = L, Only
Buck1, LDO1, LDO3 Turn On -- 120 200 μA
S ystem Voltage L ockout
V
SYS Rising -- 3.2 -- V
Under Voltage Lockout V
SYS Falling -- 2.5 -- V
Thermal S hutdown
Threshold -- 160 -- °C
Hystersis -- 10 -- °C
Logic and Control Inputs
Input Low Level PWR_HOLD, PWR_ON, HP_PWR,
DATA, CLK, PWR_EN, PWR_ID -- -- 0.4 V
Input High Level PWR_HOLD, PWR_ON, HP_PWR,
DATA, CLK, PWR_EN, PWR_ID 1.5 -- -- V
Input Current PWR_HOLD, DATA, CLK, PWR_EN −1 -- 1 μA
PWR_ON Pull-down Current to
GND PWR_ON = 0.4V -- 2 -- μA
HP_PWR Pull-down Current to
GND HP_PWR = 0.4V -- 2 -- μA
PWR_ON, HP_PWR
De-bounce Filter -- 320 -- ms
nINT, nPBSTAS, nRESET,
nLBO Pull Down Voltage Source Current = 5mA -- 65 -- mV
(VBATT = 3.7V, CSYS+ΣVINx = 47μF, C BATT = 4.7μF, T A = 25°C, unless otherwise specified)
Electrical Characteristics (General)
RT9945
8
DS9945-01 April 2011www.richtek.com
Parameter Symbol Conditions Min Typ Max Unit
Output Adjustable Range 0.6 2.5 V
FB Threshold Voltage VFB1 Falling 0.582 0.6 0.618 V
FB1 Threshold Line Regulation VIN = 2.7V to 5.5V -- 0.5 -- %/V
FB1 Threshold Voltage
Hysteresis -- 12 -- mV
Shutdown -- 0.1 -- μA
FB BIAS Current VFB = 0.5V -- 0.1 -- μA
Current Limit ILIM P-MOSFET Switch 1000 1500 2000 mA
P-MOSFET Switch, ILX = −40mA -- 0.3 -- Ω
On-Resistance
N-MOSFET Switch, ILX = 40mA -- 0.38 -- Ω
Rectifier Off Current Threshold -- 30 -- mA
(VBATT = 3.7V, CSYS+ΣVINx = 47μF, C BATT = 4.7μF, T A = 25°C, unless otherwise specified)
Electrical Characteristics (Buck Converter 1)
Electrical Characteristics (Buck Converter 2)
Parameter Symbol Conditions Min Typ Max Unit
Output Adjustable Range V
REF -- 2.5 V
Default FB2 Threshold Voltage VFB2 Falling 0.655 0.675 0.695 V
FB2 Threshold Line Regulation VIN = 2.7V to 5.5V -- 1.5 -- %/V
FB2 Threshold Voltage
Hysteresis -- 12 -- mV
Current Limit ILIM P-MOSFET Switch 1000 1500 2000 mA
P-MOSFET Switch, ILX = −40mA -- 0.4 -- Ω
On-Resistance
N-MOSFET Switch, ILX = 40mA -- 0.4 -- Ω
Rectifier Off Current Threshold -- 30 -- mA
Programmable FB2 Voltage VFB2 Falling 0.5 -- 0.7 V
Each Programmable FB Voltage
Step -- 12.5 -- mV
(VBATT = 3.7V, CSYS+ΣVINx = 47μF, C BATT = 4.7μF, T A = 25°C, unless otherwise specified)
RT9945
9
DS9945-01 April 2011 www.richtek.com
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage VOUT1 l
LOAD = 200mA & VIN = 3.7V 3.201 3.3 3.399 V
Output Current IOUT -- -- 500 mA
Current Limit ILIM V
OU T1 = 0V 500 650 850 mA
Dropout Voltage VDROP l
LOAD = 200mA -- 150 -- mV
Line Regulation VOU T1 + 0.4V ≤ V BATT = VIN1 ≤ 5.5V,
ILOAD = 200mA -- 2.4 -- mV
Load Regulation VIN1 = 3.7V, 50μA < ILOAD < 200mA -- 25 -- mV
Power Supply Rejection.
ΔVOUT/ΔVIN F = 1kHz (COUT = 1μF),
VOU T > 2.5V, ILOAD = 30mA -- 60 -- dB
(VBATT = 3.7V, CSYS+ΣVINx = 47μF, C BATT = 4.7μF, T A = 25°C, unless otherwise specified)
Electrical Characteristics (VOUT1 (LDO1) )
Note : All output capacitors are ceramic and X7R/X5R type.
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage VOUT2 l
LOAD = 80mA & VIN = 3.7V 1.164 1.2 1.236 V
Output Current IOUT -- -- 80 mA
Current Limit ILI M V
OUT2 = 0V -- 400 -- mA
Line Regulation VOUT2 + 0.4V ≤ VBATT = VIN1 ≤ 5.5V,
lLOAD = 80mA -- 2.4 -- mV
Load Regulation VIN1 = 3.7V, 50μA < lLOAD < 80mA -- 25 -- mV
Power Supply Rejection.
ΔVOUT/ΔVIN F = 1kHz (COUT = 1μF),
VOUT > 1.2V, lLOAD = 30mA -- 60 -- dB
(VBATT = 3.7V, CSYS+ΣVINx = 47μF, C BATT = 4.7μF, T A = 25°C, unless otherwise specified)
Electrical Characteristics (VOUT2 (LDO2) )
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage VOUT3 l
LOAD = 80mA & VIN = 3.7 V 1.164 1.2 1.236 V
Output Current IOUT -- -- 80 mA
Current Limit ILIM V
OUT3 = 0V -- 400 -- mA
Line Regulation VOUT3 + 0.4V ≤ VBATT = VIN1 ≤ 5.5V,
lLOAD = 80mA -- 2.4 -- mV
Load Regulation 50μA < lLOAD < 80mA -- 25 -- mV
Power Supply Rejection.
ΔVOUT/ΔVIN F = 1kHz (COU T = 1μF),
VOUT > 1.2V, lLOAD = 30mA -- 60 -- dB
Note : All output capacitors are ceramic and X7R/X5R type.
(VBATT = 3.7V, CSYS+ΣVINx = 47μF, C BATT = 4.7μF, T A = 25°C, unless otherwise specified)
Electrical Characteristics (VOUT3 (LDO3) )
Note : All output capacitors are ceramic and X7R/X5R type.
RT9945
10
DS9945-01 April 2011www.richtek.com
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage VOUT4 l
LOAD = 50mA & VIN = 3.7 V 2.425 2.5 2.575 V
Output Current IOUT -- -- 50 mA
Current Limit ILIM V
OUT4 = 0V -- 400 -- mA
Dropout Voltage VDROP
l
LOAD = 50mA -- 50 -- mV
Line Regulation VOUT4 + 0.4V ≤ VBATT
= VIN1 ≤ 5.5V,
lLOAD = 50mA -- 2.4 -- mV
Load Regulation 50μA < lLOAD < 50mA -- 25 -- mV
Power Supply Rejection.
ΔVOUT/ΔVIN F = 1kHz (COUT = 1μF),
VOUT > 1.2V, lLOAD = 30mA -- 60 -- dB
(VBATT = 3.7V, CSYS+ΣVINx = 47μF, C BATT = 4.7μF, T A = 25°C, unless otherwise specified)
Electrical Characteristics (VOUT4 (LDO4) )
Note : All output capacitors are ceramic and X7R/X5R type.
Parameter Symbol Conditions Min Typ Max Unit
Output Voltage VOUT5 l
LOAD = 50mA & VIN = 3.7 V 3.201 3.3 3.399 V
Output Current IOUT -- -- 50 mA
Current Limit ILIM V
OUT 5 = 0V -- 400 -- mA
Dropout Voltage VDROP l
LOAD = 50mA -- 50 -- mV
Line Regulation VOUT5 + 0.4V ≤ VBATT = VIN1 ≤ 5.5V,
lLOAD = 50mA -- 2.4 -- mV
Load Regulation 50μA < lLOAD < 50mA -- 25 -- mV
Power Supply Rejection.
ΔVOUT/ΔVIN F = 1kHz (COU T = 1μF),
VOUT > 1.2V, lLOAD = 30mA -- 60 -- dB
(VBATT = 3.7V, CSYS+ΣVINx = 47μF, C BATT = 4.7μF, T A = 25°C, unless otherwise specified)
Electrical Characteristics (VOUT5 (LDO5) )
Note :All output capacitors are ceramic and X7R/X5R type.
RT9945
11
DS9945-01 April 2011 www.richtek.com
Parameter Symbol Conditions Min Typ Max Unit
Input Volt age Range and Input Current
PWR_IN Input Operation
Voltage Range 4.5 -- 5.5 V
PWR_ID Current -- -- 100 μA
ISETU Pull High Current ISETU = 0V -- 0.5 -- μA
PWR_IN Standby Current VBATT = 4.2V -- 300 500 μA
PWR_IN UVP Current VPWR_IN = 4V, VBATT = 3V -- 150 250 μA
PWR_IN UVP Voltage -- 3.7 -- V
ISETU = H -- 450 500
PWR_ID = H ISETU = L -- -- 100
PWR_IN Current Limit
PWR_ID = L -- 2300 --
mA
Volt age Re gula tion
BATT Regulation Voltage IBATT = 60mA 4.158 4.2 4.242 V
System Regulation Voltage 4.8 5 5.2 V
PWR_IN Power FET RDS(ON) I
AC = 1A -- 350 -- mΩ
System to Battery RDS(ON) -- -- 150 mΩ
PWR_IN to SYS Switch Turn
On VPWR_IN − VBATT -- 150 -- mV
Current Regulation
ISETA Set Voltage (Fast
Charge Phase) V
BATT = 3.5V -- 2.5 -- V
Full Charge setting range 100 -- 1200 mA
Timer
TIMER Pin Source Current VTIMER = 2V -- 1 -- μA
Pre-charge Fault Time C
TIMER = 0.1μF --
2460 -- s
Charge Fault Time C
TIMER = 0.1μF --
19700 -- s
Pr echarge
BATT Pre-Charge Threshold -- 2.8 -- V
BATT Pre-Charge Threshold
Hysteresis -- 100 -- mV
Pre-Charge Current VBATT = 2V -- 10 -- %
Recharge T hreshold
BATT Re-Charge Falling
Threshold Hysteresis V
REG − VBATT -- 100 -- mV
Char ge Termin ation Detect ion
Termination Current Ratio
(default) ISETA Pin Voltage -- 250 -- mV
Logic Input/Output
nCHG_S Pull Down Voltage I/nCHG_S = 5mA -- 300 -- mV
(VPWR_IN = 5V, VBATT = 4V, TA = 25°C, unless otherwise specified)
Electrical Characteristics (Li-Ion Charger)
To be continued
RT9945
12
DS9945-01 April 2011www.richtek.com
Parameter Symbol Conditions Min Typ Max Unit
nRESET Threshold With respect to Buck2, Rising -- 87 -- %
nRESET Active Time-out
Period From Buck2 ≥ 87% until RESET =
High -- 200 -- ms
LBI Feedback Voltage
(falling) -- 1 -- V
LBI Hysteresis -- 50 -- mV
LBI Leak age Current −1 -- 1 μA
Parameter Symbol Conditions Min Typ Max Unit
Protection
Thermal Regulation -- 125 -- °C
TS Pi n S ource Current VTS = 1.5V 94 100 106 μA
TS Pin Low Threshold
Voltage 2.45 2.5 2.55 V
TS Pin High Threshold
Voltage 0.485 0.5 0.515 V
Electrical Characteristics (RESET & Low Battery)
(VBATT = 3.7V, CSYS+ΣVINx = 47μF, C BATT = 4.7μF, T A = 25°C, unless otherwise specified)
Note 1. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation of the device at these or any other conditions beyond those
indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Note 2. θJA is measured in the natural convection at TA = 25°C on a high effective four layers thermal conductivity test board of
JEDEC 51-7 thermal measurement standard. The case point of θJC is on the expose pad for the package.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
RT9945
13
DS9945-01 April 2011 www.richtek.com
Typical Operating Characteristics
Buck1 Efficiency vs. Output Current
0
10
20
30
40
50
60
70
80
90
100
0.001 0.01 0.1 1
Output Current (A)
Efficiency (%)
VBATT = 3.3V
VBATT = 3.7V
VBATT = 4.2V
VBuck1 = 1.8V
Buck2 Output Voltage vs. Output Current
1.31
1.32
1.33
1.34
1.35
1.36
1.37
1.38
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
Output Current (A)
Output Voltage (V)
VBATT = 3.6V
VBuck2 = 1.35V
VBATT = 4V
Buck2 Efficiency vs. Output Current
0
10
20
30
40
50
60
70
80
90
100
0.001 0.01 0.1 1
Output Current (A)
Efficiency (%)
VBATT = 3.3V
VBATT = 3.7V
VBATT = 4.2V
VBuck2 = 1.35V
VBATT = 4V
VBuck2, VLDO2 Power On from PWR_EN
Time (50μs/Div)
VLDO2
(1V/Div)
VBuck2
(1V/Div)
PWR_EN
(1V/Div)
Buck1 Output Voltage vs. Output Current
1.75
1.76
1.77
1.78
1.79
1.8
1.81
1.82
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
Output Current (A)
Output Voltage (V)
VBATT = 3.6V
VBuck1 = 1.8V
VBATT = 4V
VBATT = 4V
VBuck1, VLDO1, VLDO2 Power On
Time (50μs/Div)
VLDO3
(2V/Div)
VLDO1
(2V/Div)
VBuck1
(2V/Div)
RT9945
14
DS9945-01 April 2011www.richtek.com
VBATT = 4V, IOUT = 500mA
Buck2 Output Voltage Ripple
Time (500ns/Div)
ILX2
(500mA/Div)
VBuck2
(20mV/Div)
VLX2
(2V/Div)
VBATT = 4V, IOUT = 500mA
Buck1 Output Voltage Ripple
Time (500ns/Div)
ILX1
(500mA/Div)
VBuck1
(20mV/Div)
VLX1
(2V/Div)
VBATT = 4V
Normal to Sleep Mode
Time (10ms/Div)
VLDO2
(1V/Div)
VBuck2
(1V/Div)
PWR_EN
(1V/Div)
VBATT = 4V
LDO4, LDO5 Power Off
Time (25μs/Div)
LDO4
(5V/Div)
DATA
(5V/Div)
CLK
(5V/Div)
LDO5
(5V/Div)
VBATT = 4V
Power On nReset
Time (50ms/Div)
nRESET
(5V/Div)
PWR_EN
(2V/Div)
LDO4
(2V/Div)
DATA
(5V/Div)
CLK
(5V/Div)
LDO5
(2V/Div)
VBATT = 4V
LDO4, LDO5 Power On
Time (25μs/Div)
RT9945
15
DS9945-01 April 2011 www.richtek.com
VBATT = 4V, IOUT = 0.1A to 0.6A
Buck1 Load Transient Response
Time (250μs/Div)
IBuck1
(200mA/Div)
VBuck1
(50mV/Div)
Buck Frequency vs. Input Voltage
0.0
0.5
1.0
1.5
2.0
2.5
3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
Input Voltage (V)
Frequency (MHz)
IOUT = 200mA
Buck1
Buck2
VBATT = 4V, IOUT = 0.1A to 0.6A
Buck2 Load Transient Response
Time (250μs/Div)
IBuck2
(200mA/Div)
VBuck2
(50mV/Div)
VBATT = 4V, IOUT = 50mA to 500mA
LDO1 Load Transient Response
Time (100μs/Div)
ILDO1
(200mA/Div)
VLDO1
(50mV/Div)
LDO1 Output Voltage vs. Output Curre nt
3.20
3.22
3.24
3.26
3.28
3.30
3.32
3.34
3.36
0 0.1 0.2 0.3 0.4 0.5
Output Current (A)
Output Voltage (V)
VBATT = 3.8V
LDO1 Dropout Voltage vs. Temperature
0
20
40
60
80
100
120
140
-40 -15 10 35 60 85
Temperature
Dropout Voltage (mV)
IOUT1 = 200mA
(°C)
RT9945
16
DS9945-01 April 2011www.richtek.com
VPWRIN = 5V, VBATT = 3.8V, PWRID = L
PWRIN Insert Response
Time (1ms/Div)
IBATT
(2A/Div)
VPWRIN
(2V/Div)
VSYS
(2V/Div)
VBATT
(2V/Div)
IPWRIN
(2A/Div)
VPWRIN
VBATT
VSYS
IPWRIN
IBATT
Time (1ms/Div)
VPWRIN = 5V, VBATT = 4V, PWRID = H, USBID = H
Charger Power Path at USB Mode
Time (1ms/Div)
IBATT
(2A/Div)
VPWRIN
(2V/Div)
VSYS
(2V/Div)
VBATT
(2V/Div)
IPWRIN
(2A/Div)
ISYS
(2A/Div)
VPWRIN
VBATT
VSYS
ISYS
IPWRIN
IBATT
ISYS = 0 to 2.4A
VPWRIN = 5V, VBATT = 4V, PWRID = L, ISYS = 0 to 2.4A
Charger Power Path at AC Mode
IBATT
(2A/Div)
VPWRIN
(2V/Div)
VSYS
(2V/Div)
VBATT
(2V/Div)
IPWRIN
(2A/Div)
ISYS
(2A/Div)
VPWRIN
VBATT
VSYS
ISYS
IPWRIN
IBATT
Charge Current vs . RISETA
0
200
400
600
800
1000
1200
0 2.5 5 7.5 10 12.5 15
RISETA (k⎠)
Charge Current (mA)
(kΩ)
VPWRIN = 5V, VBATT = 4V, PWRID = L
Charg e Curren t vs. VBATT
0
200
400
600
800
1000
1200
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
VBATT (V)
Charge Current (mA)
PWRID = L, RISETA = 1.5kΩ
PWRIN = 4.5V
PWRIN = 5V
PSRR vs. Frequency
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
100 1,000 10,000 100,000
Frequency (Hz)
PSRR (dB)
VBATT = 4V, IOUT1 = IOUT2 =
IOUT3 = IOUT4 = IOUT5 = 30mA
LDO5
LDO1
10k1k 100k
RT9945
17
DS9945-01 April 2011 www.richtek.com
VPWRIN = 5V, VBATT = 3.8V, PWRID = L
PWRIN Remove Response
Time (250ms/Div)
IBATT
(2A/Div)
VPWRIN
(2V/Div)
VSYS
(2V/Div)
VBATT
(2V/Div)
IPWRIN
(2A/Div)
VPWRIN
VBATT
VSYS
IPWRIN
IBATT
RT9945
18
DS9945-01 April 2011www.richtek.com
Application Information
I2C Start and Stop Conditions
Both DATA and CLK remain high when the bus is not busy.
A high-to-low transition of DATA, while CLK is high is defined
as the Start condition. A low-to-high transition of the data
line while CLK is high is defined as the Stop condition.
I2C Acknowledge
The number of data bytes between the start and stop
conditions for the Transmitter and Receiver are unlimited.
Each 8-bit byte is followed by an Acknowledge Bit. The
Acknowledge Bit is a high level signal put on DATA by the
transmitter during which time the master generates an extra
acknowledge related clock pulse. A slave receiver which
is addressed must generate an Acknowledge after each
byte it receives. Also a master receiver must generate an
Acknowledge after each byte it receives that has been
clocked out of the slave transmitter.
The device that Acknowledges must pull down the DATA
line during the acknowledge clock pulse, so that the DATA
Figure 1. I2C Transmission Flow in the RT9945
Figure 2. I2C Function Block in the RT9945
line is stable low during the high period of the Acknowledge
clock pulse (set-up and hold times must also be met). A
master receiver must signal an end of data to the
transmitter by not generating an acknowledge signal on
the last byte that has been clocked out of the slave. In this
case the transmitter must leave DATA high to enable the
master to generate a stop condition.
I2C System Configuration
A device on the I2C Bus which generates a “message” is
called a “Transmitter” and a device that receives the
message is a “Receiver”. The device that controls the
message is the “Master” and the devices that are
controlled by the “Master” are called “Slaves”.
I2C Write Command.
The RT9945 writing address set 9C hex and write command
and data to set internal register.
TYPE I : Send the address and one command by I2C (Figure
3).
Figure 3. I2C One Command Flow in the RT9945
SCL
SDA A6 A5 A0 WA
Write command
from the master. Acknowledge
from the slave.
START
0Dx4 Dx0
STOP
A
Acknowledge
from the slave.
START command from the master.
01 or 10 or 11
A6 A5 A4 A3 A2 A1 A0 0 0 1 D14
0 1 0
011
D13 D12 D11 D10
D24 D23 D22 D21 D20
D34 D33 D32 D31 D30
I2C Address The 2nd Word
START 0
STOP
9
W
Processor
Master
RT9945
Slave
SDO
SCL
SDA
VSYS
RT9945
19
DS9945-01 April 2011 www.richtek.com
Table 1. Register Mapping Table (Underline is default)
V4 V3 V2 V1 V0 Buck 2 FB
Voltage (V)
0 0 0 0 0 0.5
0 0 0 0 1 0.5125
0 0 0 1 0 0.525
0 0 0 1 1 0.5375
0 0 1 0 0 0.55
0 0 1 0 1 0.5625
0 0 1 1 0 0.575
0 0 1 1 1 0.5875
0 1 0 0 0 0.6
0 1 0 0 1 0.6125
0 1 0 1 0 0.625
0 1 0 1 1 0.6375
0 1 1 0 0 0.65
0 1 1 0 1 0.6625
0 1 1 1 0 0.675 (Default)
0 1 1 1 1 0.6875
1 X[1] X X X 0.7
Note 1 : “X” means don’t care
Z41 Z40 LDO4 Outpu t Voltage (V)
0 0 1.8
0 1 2.5 (Default)
1 0 2.85
1 1 3.3
Z51 Z50 LDO5 Output V ol tage (V)
0 0 1.2
0 1 1.5
1 0 3.0
1 1 3.3 (Default)
TYPE II : Send address and two commands by I2C
(Figure 4).
Figure 4. I2C Two Commands Flow in the RT9945
A6 A5 A4 A3 A2 A1 A0 0 0 0 x x G2 G1 G0 0 1 E15 E14 E13 E12 E11 E10
1 0 E25 E24 E23 E22 E21 E20
G2 : 0 = 3'b000
I2C Address The 2nd Word The 3rd Word
START STOP
STOP
0918 27
W
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
0 0 0 0 0 Select Group
D1 0 0 1
LDO5 LDO4 Reserved Reserved Reserved
0 1 0 1 0 0 0
OFF ON OFF ON
D2 0 1 0
VPROG for
LDO5
VPROG for
LDO5 VPROG for LDO4 VPROG for LDO4 Charger
ON/OFF
Z51 Z50 Z41 Z40 0 1
OFF ON
D3 0 1 1
VPROG for
Buck2
VPROG for
Buck 2 VPROG for Buck 2, VPROG for Buck 2 VPR OG for
Buck 2
V4 V3 V2 V1 V0
RT9945
20
DS9945-01 April 2011www.richtek.com
Group 0 (Bit2 = 0, Bit1 = 0, Bit0 = 0)
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
LDO3 LDO2 LD O1 Buck1 Buck2 PWR_EN
0 1 0 1 0 1 0 1 0 1 0 1
E1 0 1
OFF ON OFF ON OFF ON OFF ON OFF ON None Mask
PWR_IN IN PW R_IN OUT PWR_ID R eser ved TIME OUT CH G DONE
0 1 0 1 0 1 0 1 0 1
E2 1 0
Non e Mask N one Mask None Mask 1 None Mask None Mask
I2C Read Command.
The RT9945 reading address set 9D hex and read the
interrupt status from internal register (Figure 5).
Figure 5. I2C Read Command of the RT9945
gA5 A4 A3 A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0
I2C Address Read register
START 1
9
STOP
18
R
Table 2. The Default Status of Interrupt Registers for I2C Reading (No PWR_IN)
Register Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Name PWR_IN PWR_OUT PWR_ID Reserved Time Out CHG_DONE Reserved
Default 0 1 0 1 0 0 0 0
LDO1 & LDO2 Voltage Setting
Pin S1 and S2 are tri-stat input to set LDO1 and LDO2 voltage. Connect S1 and S2 to VSYS directly to pull high and to
GND to pull low. If S1 and S2 are connected to a voltage that is not equal to VSYS, then S1 and S2 will be floating. The
Voltage setting table is listed in Table 3.
Table 3. LDO1 & LDO2 Voltage Setting
S1 S2 LDO1 (V) LDO2 (V)
L H 3.3 1.2
H L 2.8 1.2
H H 2.5 1.2
L F 1.8 1.2
F H 2.5 1.3
F F 1.8 1.3
H F 3.3 1.3
F L 2.5 1.0
L L 3.0 1.2
Power Sequence
If the PWR_IN and VSYS pin voltages are below the internal UVLO threshold, all IC blocks are disabled and the RT9945
is not operational. When an external power source or battery with voltage greater than the VULO voltage threshold is
applied to VSYS pins, the internal RT9945 references are powered up and biasing internal circuits. When all the main
internal supply rails are active, the RT9945 I2C registers are set to the power-up default values.
RT9945
21
DS9945-01 April 2011 www.richtek.com
If a power good fault is not present at the end of the power good check mode and then NORMAL mode starts. In this mode
of operation, the I2C registers define the RT9945 operation, and must be able to handle all issues regarding power on/off
the handheld device. The following pins and battery voltages determine the power on/off status of the handset :
PWR_ON
PWR_HOLD
Logic high on PWR_ON pin is the normal way of powering up a handset. The PWR_ON signal is held high for at least 320
ms; Buck1, 2 and LDO1, 3 are turned on; when Buck2 reaches 87% of its final value, a 200ms reset timer is started at
after which nRESET is asserted high, and then the handheld device processor is initialized and will assert PWR_HOLD
high to maintain power on. This wrap around constitutes the PWR_ON button can be released (return to low state) and the
power remains on. If, however, PWR_ON is released before the PWR_HOLD signal is asserted, then Buck1, 2 and LDO1,
3 will be turned off. All output could be turned off by the processor asserting PWR_HOLD low, if PWR_ON = Low.
The RT9945's default power output voltages for Samsung platform are listed in Table 4 as following :
Figure 6. Power and Interface Module
I2C
Decoder
I2C
Registers
and Non-
Volatile
Memory
Interrupt
Controller
System and
Battery
Charger
Control Logic
Sequencing
& Operating
Mode
Setting
Host
Processor
CLK
DATA
nINT
nRESET
nPBSTAS
PWR_HOLD
HP_PWR
PWR_ON
VSYS
VMEM
VSYS
PWR_IN
BATT
PWR_EN
VSYS
VSYS
Table 4. The RT9945 for Samsung Platform Power Terminology
Buck1 Buck 2 LDO1 LDO2 LDO3 LDO4 LDO5
Control Pin PW R_ON PWR_EN PWR_ON PWR_EN PWR_ON I
2
C default Off I
2
C, def ault Off
Default Output
Voltage 1.8V 1.35V 3.3V 1.2V 1.2V 2.5V 3.3V
LDO1, 2 voltage setting by Pin S1 and S2
LDO2 and Buck2 can be turned on by PWR_EN pin.
The I2C will be activated if the Buck1 is enabled.
LDO 1, 2, 3, 4, 5 and Buck 1, 2 output voltages can be turned on and off by I2C.
LDO 4, 5 and Buck2 output voltages can be programmed by I2C.
Sleep Mode
The external host can set the RT9945 in sleep mode using the GPIO configuration. In the sleep mode, change the
PWR_EN signal to set different output on/off status :
1. Buck2 and LDO2 will be disabled when the PWR_EN is turned off to enter the sleep mode.
2. When the PWR_EN is turned on, the Buck2 and LDO2 are enabled and the reset signal from the RT9945 remains high.
RT9945
22
DS9945-01 April 2011www.richtek.com
Power on
LDO3
BUCK1
LDO1
PWR_EN
LDO2
LDO4
LDO5
BUCK2
PWR_HOLD
I2C : LDO4/5_EN
nRESET
320ms
100µs
100µs
BUCK2 PG
200ms
VDD_IO
VDD_MEM
VDD_alive
VDD_CORE
VDD_PLL
Normal Mode
PWR_ON
Sleep Mode Power off
Table 5. Interrupt Register Table
Register Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Name PWR_IN PWR_OUT PWR_ID Reserved TIME_OUT CHG_DONE Reserved Reserved
Default 0 1 0 0 0 0 0 0
function
If PWR_IN
= Hi, this bit
will be set.
If PWR_IN =
Lo, this bit
will be set.
If PWR_IN = H
& PWR_ID = H
this bit will be
set
This bit will
be set if
charger
time out.
This bit will
be set if
charge done.
INT
Event Yes Yes Yes NO Yes Yes NO NO
If this internal interrupt event is set without mask, the interrupt controller will set nINT to low if any interrupt behavior
happened. Then processor will be acknowledged by nINT and then read register status by I2C interface. PMU will accept
this READ OK status and let the nINT return to high (Figure 8).
Figure 7. RT9945 POWER ON/OFF Timing Diagram
Interrupt Mode
The RT9945 interruption controller monitors multiple system status parameters and signals to the host when one of the
monitored parameters toggled, as a result of system status change. If the external interrupt event happened, the internal
interrupt flag of the RT9945 will be triggered. The interrupt flag with no mask will set the INT to low state. The host
processor receives the active low signal and then try to read the interrupt register by I2C interface. The interrupt controller
setting and function in register are listed in the Table 5.
RT9945
23
DS9945-01 April 2011 www.richtek.com
If this internal interrupt register is set with mask, the interrupt controller will not set nINT to low even external real interrupt
event happened (Figure 9).
PW R_ON & HP_PWR & nPBSTAS
Connecting external signal such as head phone can start up the power sequence of power management circuit. When the
RT9945 detects a HP_PWR rising edge signal and generates a over 320ms pulse. All RT9945 output will be turned on
even the without recognizing PWR_ON signal. The handheld device processor is initialized and will assert PWR_HOLD to
high to maintain the RT9945 power remains on. This power on behavior is same as PWR_ON signal asserted. nPBSTAS
signal is an inverter of PWR_ON with 320ms de-bounced to inform SOC or uP that power on button has been pressed.
PWR_ON & HP_PWR & nPBSTAS timing control diagram in the Figure 10
Figure 9. Interrupt with Mask
Interrupt Event
CLK
DATA
nINT
Interrupt Mask = 1
SET MASK = 0
READ OK
Figure 8. Interrupt without Mask
Interrupt Event
CLK
DATA
nINT
Interrupt Mask = 0
READ OK
Figure 10. PWR_ON & HP_PWR & nPBSTAS Timing Diagram
nRESET
PWR_HOLD
Buck1
LDO1
LDO3 320ms
PWR_ON
200ms
nPBSTAS
Buck2 power good
RT9945
24
DS9945-01 April 2011www.richtek.com
Buck Converters
The RT9945 step-down converters are optimized for high efficiency over a wide load range, small external component
size, low output ripple, and excellent transient response. The DC-DC converters also feature an optimized on-resistance
internal MOSFET switch and synchronous rectifier to maximize the efficiency and minimize the external components.
The RT9945 utilizes a proprietary hysteretic PWM control scheme that switches with nearly fixed frequency, allowing the
customer to trade some efficiency for smaller external component, as desired. If one buck converter is not used, please
make LX = open, FB = IN, and PGND = GND.
Figure 11. Step-down Converter Block Diagram
LX
Logic
+
Buffer
+
-
FB
PGND
VSYS
CIN
L
CFF
COUT
VOUT
R1
R2
Reference VREF
Current Limit
Zero-Current
Detection
ZC
OC
Setting the Output Voltage
Select an output voltage between 0.6V and 2.5V by connecting FB to a resistive voltage divider between LX and GND.
Choose R2 for a reasonable bias current in the resistive divider. A wide range of resistor values is acceptable, but a good
starting point is to choose R2 as 100kΩ. Then, R1 is given by :
(
)
OUT FB1
R1
V1V
R2
=+×
Where VFB1 is the feedback reference voltage (0.6V typ.)
Below table is the default value of resistor and CFF for different output voltages.
VBuck (V) R1 (k) R2 (k) CFF (pF)
1.2 100 100 220
1.8 200 100 120
2.5 316 100 120
Inductor Selection
The RT9945 step-down converters operate with inductors of 1μH to 4.7μH. Low inductance values are physically smaller
but require faster switching, which results in some efficiency loss. The inductor's DC current rating only needs to match
the maximum load current of the application because the RT9945 step-down converters feature zero current overshoot
during startup and load transients. The recommended inductor is 2.2μH. For optimum voltage positioning load transients,
choose an inductor with DC series resistance in the 50mΩ to 150mΩ range. For higher efficiency at heavy loads (above
200mA) or minimal load regulation (but some transient overshoot), the resistance should be kept below 100mΩ. For light
load applications up to 200mA, much higher resistance is acceptable with very little impact on performance.
RT9945
25
DS9945-01 April 2011 www.richtek.com
Feedforward Capacitor Selection
The feedforward capacitor, CFF, sets the feedback loop response, controls the switching frequency, and is critical in
obtaining the best efficiency possible. Choose a small ceramic X7R capacitor with value given by :
FF L
C10
R1
=×
Select the closest standard value to CFF as possible.
Charger
The RT9945 has an integrated charger with power path integrated MOSFETs. This topology, shown in the simplified block
diagram (Figure 12), enables the goal of using an external input power to run the system and charge the battery. The
power path has single inputs that can be used to select either an external AC_DC adapter or USB port by PWR_ID pin and
different charging current by limitation. The RT9945 connect the end equipment main power rail and charge the battery
pack by the BATT pin.
Output Capacitor Selection
The output capacitor, COUT, is required to keep the output voltage ripple small and to ensure the regulation loop stability.
COUT must have low impedance at the switching frequency. Ceramic capacitors with X5R or X7R dielectric are highly
recommended due to their characteristics of small size, low ESR, and small temperature coefficients. Due to the unique
feedback network, the output capacitance can be very low. For most applications, a 4.7μF capacitor is sufficient. For
optimum load-transient performance and very low output ripple, the output capacitor value in μF’s should be equal or
larger than the inductor value in μH's.
Figure 12. Charger Block Diagram and Required External Components
LDO
VSYS
BATT
TS
ISETA
nCHG_S
PWR_ID
USB/AC
Adapter
PWR_IN Q1
Q2
System
Power Bus
RSET
+
NTC
Li
Battery
CC/CV
Dynamic
Battery
Supplement
Current
Scaling and
Charger
Suspend
Power Path
Control,
System power
and Current
limit selection
The RT9945 charger uses current, voltage, and thermal control loops to charge and protect a single Li+ battery cell. One
enable input PWR_ID pin is supplied to set charging current limits. During pre-charge and fast-charge phases, the charger
output status is pulled low. As the battery voltage approaches 4.2V, the charging current is reduced. When the charging
current drops below 10% of charging current setting and the battery voltage equals 4.2V, the nCHG_S output pin goes
high impedance, signaling a full battery and set the internal I2C register bit CHG DONE. If the charger done is not masked,
the interrupt flag will be trigged. At any time during charging, if the RT9945 internal I2C register bit, Charger ON/OFF, is
clear. Then the charger enters suspend mode, charging stops, and nCHG_S goes high impedance.
RT9945
26
DS9945-01 April 2011www.richtek.com
BA TTERY CHARGE MANAGEMENT FUNCTION
The RT9945 supports charging of single-cell Li-Ion battery packs. The charge process is executed in three phases: pre-
charge (or preconditioning), constant current and constant voltage. A typical charge profile and flow chart are shown in
Figure 13 & 14.
Figure 13. Typical Charge Profile
Figure 14. Charge Flow Chat
Precharge
Phase
Fast Charge
Phase
Constant
Voltage Phase
&
Standby Phase
Recharge
Phase
2.8V
Precharge
Threshold
4.2V
Recharge
Threshold
1/10 Programmed
Charge Current
Programmed
Charge
Current
Charge
Complete
4.1V
Any State
if VIN < UVLO or
VIN > OVP or
I2C = OFF or
VIN < BATT
Power Off State
PFET = OFF
NO
BATT>2.8V
YES
Pre-CHG State
ICHG_pre = 0.1 x
ICHG_fast
Fast-CHG State
ICHG_fast = 1000mA
@RISET = 1.5k
Check Thermal
Temp.<125°C
Charge Done State
ICHG = 0A
NO
YES
YES
YES BATT < 4.1V
0.5V < TS < 2.5V
NO
NO
ICHG<0.1*ICHG_fast
YES
NO Decrease
ICHG_fast
Temp.<125°C
UVLO > VIN < OVP
& I2C = ON &VIN >
BATT Ω
RT9945
27
DS9945-01 April 2011 www.richtek.com
Power-Path Management
The power path and charge management block operate independently of the other RT9945 circuits. Internal circuits
check battery parameters (pack temperature, battery voltage and charge current) and system parameters, setting the
power path MOSFETs operating modes automatically. The RT9945 has integrated comparators that monitor the battery
voltage, Power input pin voltage and the SYS pin voltage. The data generated by those comparators is used by the power
path control logic to define which of the integrated power path switches is active.
A typical auto power path management profile is shown in Figure 15 & 16.
Figure 15. Typical Power Path Management Profile
Figure 16. Power Path Management Flow Chart
PWR_IN
SYS
1A
0
-1A
2A
3A
-2A
-3A
5V
4.65V
4.2V
4.0V
IBATT
ISYS
IPWR_IN
T1 T2 T3 T4 T5 T6 T7
BATT
T8
0V
BATT supply
SYS
SYS < BATT
(T8)
AC supply SYS
& BATT
SYS > BATT
(T1,T2,T6,T7)
AC supply SYS &
BATT
Reduce charge
current
SYS = 4.2V > BATT
(T3,T5)
AC & BATT
supply SYS
SYS < BATT
(T4)
NO
NO
NO
NO
NO
SYS Load >
AC Current
Limit
AC Current LimitACOK?
AC Current Limit
ACOK?
ACOK?
YES YES YES
NONO
YES
YES
YES
RT9945
28
DS9945-01 April 2011www.richtek.com
The RT9945 powers the system while independently charging the battery. This feature reduces the charge and discharge
cycles on the battery, allows for proper charge termination, and allows the system to run with an absent or defective
battery pack. This feature gives the system priority on input power, allowing the system to power up with a deeply
discharged battery pack. This feature works as follows:
Case 1: AC Mode (PWR_ID = LOW)
In this case, the system load is powered directly from the AC adapter through the internal transistor Q1 (Figure 17). The
output SYS is regulated at 5V. If the system load exceeds the capacity of the supply, the output voltage drops down to
the battery's voltage.
When in AC mode, the battery is charged through the switch Q2 based on the charge rate set on the ISETA input pin. This
feature monitors the output voltage (system voltage) for input power loss due to brown outs, current limiting, or removal
of the input supply. If the voltage on the VSYS pin drops to a preset value (4.2V) due to a limited amount of input current,
then the battery charging current is reduced until the VSYS stops dropping. If the system continues increasing load to
exceed the AC adapter capacity, the battery will start to discharge to VSYS.
Case 2: USB Mode (PWR_ID = High)
In this case, the system load is powered from a USB port through the internal switch Q1 (Figure 18). Note that in this
case, Q1 regulates the total current to the 450mA level as selected on the input. The output, SYS, is regulated to 5V. The
system's power management is responsible for keeping its system load below the USB current. Otherwise, the output
drops (VSYS) to the battery voltage; therefore, the system should have a low-power mode for USB power application.
Figure 17. RT9945 Powered by AC Adapter
LDO
Power Path
Control,
System power
and Current
limit selection
PWR_ID
PWR_IN
Adapter
From adapter
VSYS
ID
V+
GND
V+
GND
Q1
Figure 18. RT9945 Powered by USB port
LDO
Power Path
Control,
System power
and Current
limit selection
PWR_ID
PWR_IN
USB
VSYS
ID
VBUS
GND
VBUS
GND
Q1
D+
D-
USB port
from PC or
Notebook
RT9945
29
DS9945-01 April 2011 www.richtek.com
Table 6. PWR_IN Input Current and Charger Current-Limit Selection
PWR_ID PWR_IN Current Limit Expected Input Type Charger Current Limit
Hi 450mA USB 450mA
Lo 2.3A AC adapter (2.5V/Rset)*600
Charge-Current Selection
When powered from a USB port, the input current is available to 0.5A. For AC-Adapter input applications (PWR_ID = Low)
requiring a different current requirement, set the charging current with an external resistor (RSET) from ISETA to GND.
Calculate charge current as follows :
Charge Current = 2.5/ RSET(kΩ) x 600 (mA)
The RT9945 offers ISETA pin to determine the AC charge rate from 100mA to 1A.
Charge-Status Output
nCHG_S is an open-drain output that indicates charger status and can be used with an external LED. nCHG_S goes low
during charging. When VBAT equals 4.2V and the charging current drops below 10% of the setting charge current,
nCHG_S goes high impedance and the RT9945 internal I2C register bit CHG DONE will be set. Connect a pull-up resistor
between nCHG_S and VSYS to indicate charge status.
Soft-Start
To prevent input transients, the change rate of the charge current is limited when the charger is turned on or changes its
current compliance. It takes approximately 1ms for the charger to go from 0mA to the maximum fast-charge current.
Figure 19. Connection of Battery Temperature Monitor
Figure 20. Connection of Battery Temperature Monitor
Temperature
Sense
A
+
ITS
TS
0.1µF to 10µF
NTC
VBATT
Battery
=×
TS TS
VR100μA
Temperature
Sense
A
+
ITS
TS
0.1µF to 10µF
NTC
VBATT
Battery
RT1
RT2
T2 T1 NTC
TS TS T1 T2 NTC
R(RR)
VI RR R
×+
=× ++
RT9945
30
DS9945-01 April 2011www.richtek.com
Temperature Monitoring
The RT9945 monitors the battery temperature by measuring the voltage between the TS and GND pins. The RT9945 has
an internal current source to provide the bias for most common 10kΩ negative-temperature thermistor (NTC) with the
battery.
The RT9945 compares the voltage on the TS pin against the internal VTS thresholds to determine if charging is allowed.
When the temperature outside the VTS thresholds is detected, the device immediately stops the charger. Charging is
resumed when the VTS is recovered to the operation range. However, the user may modify thresholds by adding external
resistors to change biasing voltage.
Timer
As a safety mechanism, the charger has a user programmable timer that monitors the pre-charge and fast charge time.
This timer (charge safety timer) is started at the beginning of the pre-charge and fast charge period. The safety charge
timeout value is set by the value of an
external capacitor connected to the TIMR pin (CTIMR), if pin TIMR is short to GND, the charge safety timer is disabled.
As CTIMR = 0.1μF, TFAULT is CTIMR (F) x 1.97 x 1011 secs = 19700 secs and TPRECH = TFAULT /8
As timer fault, re-plug-in power or I2C ON/OFF charger again can release the fault condition.
SYS Output
The RT9945 contains a SYS output which can be regulated up to 5V. Bypass SYS to GND with a 22μF or larger ceramic
capacitor to improve the transient droops. When charging a battery, the load on SYS is serviced first and the remaining
available current goes to charge the battery.
Battery PRE-CHARGE
During a charge cycle, if the battery voltage is below the VPRECH threshold and the RT9945 applies a pre-charge mode to
the battery. This feature revives deeply discharged cells and protects battery life. The RT9945 internally determines the
pre-charge rate as 10% of the fast charge current.
Thermal Regulation
The RT9945 features a thermal limit that reduces the charge current when the die temperature exceeds +125°C. As the
temperature increases, the RT9945 features a junction temperature regulation loop. If the power dissipation of the IC
results in a junction temperature greater than the thermal regulation threshold (125°C), the RT9945 throttles back on the
charge current in order to maintain a junction temperature around the thermal regulation threshold (125°C). The RT9945
monitors the junction temperature, TJ, of the die and disconnects the battery from the input if TJ exceeds 125°C. This
operation continues until junction temperature falls below the thermal regulation threshold (125°C) by the hysteresis
level. This feature prevents the maximum power dissipation from exceeding typical design conditions.
Capacitor Selection
Connect a ceramic capacitor from PWR_IN to GND as close to the IC as possible for proper stability. For most applications,
connect a 4.7μF ceramic capacitor from IN to GND as close to the IC as possible.
Linear Regulators
The RT9945 offers five Integrated Linear Regulators, designed to be stable over the operating load range with the use of
external ceramic capacitors.
RT9945
31
DS9945-01 April 2011 www.richtek.com
Figure 21. LBI and nLBO Application Circuit
+
-
SYS
nLBO
1V
VSYS
LBI
Figure 22. Typical LBI Rising and Falling Threshold
Voltage
Thermal Considerations
For continuous operation, do not exceed absolute maximum operation junction temperature. The maximum power dissipation
depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference
between junction to ambient. The maximum power dissipation can be calculated by following formula :
PD(MAX) = ( TJ(MAX) - TA ) / θJA
Where TJ(MAX) is the maximum operation junction temperature 125°C, TA is the ambient temperature and the θJA is the
junction to ambient thermal resistance.
For recommended operating conditions specification of RT9945, where TJ(MAX) is the maximum junction temperature of
the die (125°C) and TA is the maximum ambient temperature. The junction to ambient thermal resistance θJA is layout
dependent. For WQFN-40L 5x5 packages, the thermal resistance θJA is 36°C/W on the standard JEDEC 51-7 four layers
thermal test board. The maximum power dissipation at TA = 25°C can be calculated by following formula :
PD(MAX) = ( 125°C - 25°C) / (36°C/W) = 2.778W for WQFN-40L 5x5 packages
The maximum power dissipation depends on operating ambient temperature for fixed TJ (MAX) and thermal resistance θJA.
For RT9945 packages, the Figure 23 of derating curves allows the designer to see the effect of rising ambient temperature
on the maximum power allowed.
All the LDO have an ON/OFF control which can be set by I2C commands and have integrated switches that discharge
each output to ground when the LDO is turned off. The LDO 1, 3 will be turn on in the first time of PWR_ON button be
pressed and LDO2 will be turned on when PWR_EN = 1. LDO 4, 5 need to be turned on/off by I2C command. The LDO4,5
also support four voltage setting by I2C control. LDO1 and LDO2 voltages are set by S1 and S2 pin, see Table 3.
Low-Battery Detector
nLBO is an open-drain output that typically connects to the BATT FAULT input of the processor to indicate the battery has
been removed or discharged. nLBO is typically pulled up to VSYS. LBI monitors the input voltage (usually connect to
VSYS) and triggers the nLBO output (Figure 21). nLBO is high impedance when the voltage from LBI exceeds the battery
rising threshold VLBITH = 1.05V (typ.). nLBO is low when the voltage from LBI falls below the low-battery falling threshold
VLBITH = 1V (typ.) (Figure 22). Connecting LBI to two-resistor voltage divider to detect the external resistor embedded in
a battery pack and is also used as a pack ID function.
When system first power up or back from deep sleep mode , LBI will check the VSYS voltage. If VSYS voltage is lower
than setting voltage, system will not power up or wake up.
If the low-battery-detector feature is not required, connect nLBO to ground and connect LBI to SYS.
1.05V
1V
LBI
nLBO
RT9945
32
DS9945-01 April 2011www.richtek.com
PCB Layout Guide Considerations
For the best performance of the RT9945, the following PCB Layout guidelines must be strictly followed.
`Place the input and output capacitors as close as possible to the input and output pins.
`Keep the main power traces as possible as wide and short.
`To minimize EMI, the switching area connected to LX inductor should be smallest possible.
`Place the feedback components as close as possible to the FB pin and keep these components away from the noisy
devices. Also, the feed forward capacitor CFF trace is sensitive to the magnetic field that the inductor generates. Please
keep the CFF trace away from the inductor and use a via and run the trace between ground layers.
`Connect the GND and Exposed Pad to a strong ground plane for maximum thermal dissipation and noise protection.
Figure 24. PCB Layout Guide
30
29
28
27
26
25
24
23
22
21
313233
34
35363738
39
40
1
2
3
4
5
6
7
8
9
10
201918171615141312
11
DATA
BATT
BATT
FB1
PGND1
LX1
VIN1
LX2
PGND2
FB2
nCHG_S
TS
TIMER
VOUT2
VIN3
VOUT3
VOUT1
VIN2
VOUT4
VOUT5
nINT
nLBO
LBI
GND
S2
S1
PWR_EN
PWR_IN
PWR_IN
PWR_ID
VSYS
VSYS
HP_PWR
PWR_ON
PWR_HOLD
CLK
GND
ISETA
nPBSTAS
ISETU
41
nRESET
CBATT
R14
R13
R11 R10
CFF1
L1
CBuck1
CIN1
L2
CBuck2
R13 R12
CFF2
Buck1
Buck2
R9
R8
R7
R6
R5
R4
C5
C4
CIN2
CIN3
C1
C3
C2
R2
R3
C6
R1
CPWR_IN CSYS
high-current path should be
made as short and wide as
possible.
Place input and output
capacitors (connected to the
ground) as close as possible
to the IC.
Connect the inductors, output
capacitors, and feedback resistors
as close to the IC as possible and
keep the traces short, direct, and
wide.
Keep the voltage feedback
network very close to the IC,
but away from Inductor & LX.
VSYS
VSYS
VSYS
VSYS
VSYS
GND
GND
GND
GND
GND
GND
GNDGND
Figure 23. Derating Curves for RT9945 Packages
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
2.6
2.8
3.0
0 25 50 75 100 125
Ambient Temperature (°C)
Maximum Power Dissipation (W)
WQFN-40L 5x5
Four Layers PCB
RT9945
33
DS9945-01 April 2011 www.richtek.com
Richtek Technology Corporation
Headquarter
5F, No. 20, Taiyuen Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789 Fax: (8863)5526611
Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit design,
specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be guaranteed
by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.
Richtek Technology Corporation
Taipei Office (Marketing)
5F, No. 95, Minchiuan Road, Hsintien City
Taipei County, Taiwan, R.O.C.
Tel: (8862)86672399 Fax: (8862)86672377
Email: marketing@richtek.com
Outline Dimension
Symbol Dimensions In Millimeters Dimensions In Inches
Min Max Min Max
A 0.700 0.800 0.028 0.031
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250 0.007 0.010
b 0.150 0.250 0.006 0.010
D 4.950 5.050 0.195 0.199
D2 3.250 3.500 0.128 0.138
E 4.950 5.050 0.195 0.199
E2 3.250 3.500 0.128 0.138
e 0.400 0.016
L 0.350 0.450
0.014 0.018
W-Type 40L QFN 5x5 Package
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.
DETAIL A
Pin #1 ID and Tie Bar Mark Options
1
1
22
D
E
D2
E2
L
b
A
A1 A3
e
1
SEE DETAIL A
