PD-9.3240 International | Rectifier IRF820 HEXFET Power MOSFET @ Dynamic dv/dt Rating @ Repetitive Avalanche Rated D _ Fast Switching Voss = 500V Ease of Paralleling Simple Drive Requirements Rpgion) = 3.00 S Ip = 2.5A Description Third Generation HEXFETs from International Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 watts. The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry. TO-220AB Absolute Maximum Ratings Parameter Max. Units Ib @ Te = 25C Continuous Drain Current, Vas @ 10 V 2.5 lp @ Tc = 100C | Continuous Drain Current, Vag @ 10 V 1.6 A lon Pulsed Drain Current 8.0 Pp @ Tc = 25C __| Power Dissipation 50 WwW Linear Derating Factor 0.40 WPro Vas Gate-to-Source Voltage +20 Vv Eas Single Pulse Avalanche Energy 210 mJ laR Avalanche Current 2.5 A Ear Repetitive Avalanche Energy 5.0 mJ dv/dt Peak Diode Recovery dv/dt 3.5 Vins Ty Operating Junction and -65 to +150 Tsta Storage Temperature Range C Soldering Temperature, for 10 seconds 300 (1.6mm from case} Mounting Torque, 6-32 or M3 screw 10 Ibfein (1.1 Nem) Thermal Resistance Parameter Min. Typ. Max. Units Rasc Junction-to-Case _ _ 25 Recs ____| Case-to-Sink, Flat, Greased Surface 050 | cw Rasa Junction-to-Ambient _ - | 62 257IRF820 Electrical Characteristics @ Ty = 25C (unless otherwise specified) Parameter Min. | Typ. | Max. | Units Test Conditions Vieryoss Drain-to-Source Breakdown Voitage 500 = _ V__ | Vas=0V, In= 250nA AV sryoss/ATy| Breakdown Voltage Temp. Coefficient {| 059; | V/C | Reference to 25C, In= 1mA Rpsvon) Static Drain-to-Source On-Resistance = 3.0 Q | Vas=10V, In=1.5A Vasith) Gate Threshold Voltage 2.0 4.0 V__ | Vos=Ves, Ip= 250nA Ots Forward Transconductance 1.5 _ S| Vps=50V, Ip=1.5A " _ 25 Vos=500V, Ves=0V Ipss Drain-to-Source Leakage Current _ 1350 HA Vos=400V, Vasc0V, 12125C lass Gate-to-Source Forward Leakage - _ 100 nA Vas=20V Gate-to-Source Reverse Leakage | -100 Vas=-20V Qg Total Gate Charge _ 24 Ip=2.1A Qgs Gate-to-Source Charge | | 33 | nC | Vos=400V Qo Gate-to-Drain ("Miller") Charge _ 13 Vas=10V See Fig. 6 and 13 @ ta(on) Turn-On Delay Time = 8.0 = Vpp=250V tr Rise Time _ 8.6 _ ns Ip=2.1A taforty Turn-Off Delay Time _ 33 _ Rg=182 tr Fall Time _ 16 _ Rp=100Q See Figure 10 @ Lo Internal Drain Inductance 45 B immo. goad ) j nH | from package fe Ls Internal Source Inductance |) 75} and center of die contact s Ciss Input Capacitance | 360) Veg=0V Coss Output Capacitance _ 92 _ PF | Vps=25V Ciss Reverse Transfer Capacitance _ 37 _ f=1.0MHz See Figure 5 Source-Drain Ratings and Characteristics Parameter Min. | Typ. | Max. | Units Test Conditions Is Continuous Source Current _ _ 25 MOSFET symbol D (Body Diode) , A showing the Ism Pulsed Source Current | | go integral reverse = @ (Body Diode) . p-n junction diode. 8 Vsp Diode Forward Voltage _ _ 1.6 Vs | Ty=25C, Is=2.5A, Ves=0V tir Reverse Recovery Time _ 260 ; 520 ns | Ty=25C, Ip=2.1A Qr Reverse Recovery Charge | 0.70 | 1.4 | pC | di/dt=100A/1s ton Forward Turn-On Time Intrinsic turn-on time is neglegible (turn-on is dominated by Ls+Lp) Notes: Repetitive rating; pulse width limited by Isps2.5A, di/dt<50A/us, VopsVBR)pss, max. junction temperature (See Figure 11) Tys150C Vpp=50V, starting Tj=25C, L=60mH @ Pulse width < 300 1s; duty cycle <2%. Ra=25Q, Ias=2.5A (See Figure 12) 258| IRF820 Ip, Drain Current (Amps) tp, Drain Current (Amps) g E required las Ip TOP 4.48 1.64 BOTTOM 2.54 Fig 12a. Unclamped Inductive Test Circuit ViBR)yDss Eas, Single Pulse Energy (mJ) po = SOV Vps 25 50 75 4100 425 150 Starting Ty, Junction Temperature(C) lag To Fig 12c. Maximum Avalanche Energy Fig 12b. Unclamped Inductive Waveforms Vs. Drain Current Current Regulator oS Ves ama ETL io = | Charge Current Sampling nesters Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit Appendix A: Figure 14, Peak Diode Recovery dv/dt Test Circuit - See page 1505 Appendix B: Package Outline Mechanical Drawing ~ See page 1509 Appendix C: Part Marking Information See page 1516 Intemational Appendix E: Optional Leadforms See page 1525 Rectifi er 262