FDMA410NZ Single N-Channel 1.5 V Specified PowerTrench(R) MOSFET 20 V, 9.5 A, 23 m: Features General Description Max rDS(on) = 23 m: at VGS = 4.5 V, ID = 9.5 A Max rDS(on) = 36 m: at VGS = 1.8 V, ID = 4.0 A This Single N-Channel MOSFET has been designed using Fairchild Semiconductor's advanced Power Trench process to optimize the rDS(ON) @ VGS = 1.5 V on special MicroFET leadframe. Max rDS(on) = 50 m: at VGS = 1.5 V, ID = 2.0 A Applications HBM ESD protection level > 2.5 kV (Note 3) Li-lon Battery Pack Low Profile-0.8 mm maximum in the new package MicroFET 2x2 mm Baseband Switch Max rDS(on) = 29 m: at VGS = 2.5 V, ID = 8.0 A Load Switch Free from halogenated compounds and antimony oxides DC-DC Conversion RoHS Compliant Pin 1 D G D Bottom Drain Contact Drain Source D D D 1 6 D D 2 5 D G 3 4 S S MicroFET 2X2 (Bottom View) MOSFET Maximum Ratings TA = 25 C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage -Continuous ID TA = 25 C (Note 1a) -Pulsed PD TJ, TSTG Ratings 20 Units V 8 V 9.5 24 Power Dissipation TA = 25 C (Note 1a) 2.4 Power Dissipation TA = 25 C (Note 1b) 0.9 Operating and Storage Junction Temperature Range -55 to +150 A W C Thermal Characteristics RTJA Thermal Resistance, Junction to Ambient (Note 1a) 52 RTJA Thermal Resistance, Junction to Ambient (Note 1b) 145 C/W Package Marking and Ordering Information Device Marking 410 Device FDMA410NZ (c)2009 Fairchild Semiconductor Corporation FDMA410NZ Rev.B2 Package MicroFET 2X2 1 Reel Size 7 '' Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMA410NZ Single N-Channel 1.5 V Specified PowerTrench(R) MOSFET April 2009 Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 PA, VGS = 0 V 'BVDSS 'TJ Breakdown Voltage Temperature Coefficient ID = 250 PA, referenced to 25 C IDSS Zero Gate Voltage Drain Current VDS = 16 V, VGS = 0 V 1 PA IGSS Gate to Source Leakage Current VGS = 8 V, VDS = 0 V 10 PA 1.0 V 20 V 17 mV/C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 PA 'VGS(th) 'TJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 PA, referenced to 25 C -3 VGS = 4.5 V, ID = 9.5 A 17 VGS = 2.5 V, ID = 8.0 A 20 29 VGS = 1.8 V, ID = 4.0 A 24 36 VGS = 1.5 V, ID = 2.0 A 29 50 VGS = 4.5 V, ID = 9.5 A, TJ = 125 C 23 32 VDD = 5 V, ID = 9.5 A 35 VDS = 10 V, VGS = 0 V, f = 1 MHz 815 1080 pF 130 175 pF 85 130 pF f = 1 MHz 2.1 7.5 15 ns VDD = 10 V, ID = 9.5 A, VGS = 4.5 V, RGEN = 6 : 3.9 10 ns rDS(on) gFS Static Drain to Source On Resistance Forward Transconductance 0.4 0.7 mV/C 23 m: S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance : Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time Qg Total Gate Charge Qgs Gate to Source Charge Qgd Gate to Drain "Miller" Charge VGS = 4.5 V , VDD = 10 V, ID = 9.5 A 27 44 ns 3.7 10 ns 10 14 nC 1.2 nC 2.0 nC Drain-Source Diode Characteristics IS Maximum Continuous Drain-Source Diode Forward Current VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 2.0 A 2.0 (Note 2) IF = 9.5 A, di/dt = 100 A/Ps A 0.7 1.2 V 12 22 ns 2.6 10 nC NOTES: 1. RTJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RTJC is guaranteed by design while RTJA is determined by the user's board design. a.52 C/W when mounted on a 1 in2 pad of 2 oz copper. b. 145 C/W when mounted on a minimum pad of 2 oz copper. 2. Pulse Test: Pulse Width < 300 Ps, Duty cycle < 2.0%. 3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. (c)2009 Fairchild Semiconductor Corporation FDMA410NZ Rev.B2 2 www.fairchildsemi.com FDMA410NZ Single N-Channel 1.5 V Specified PowerTrench(R) MOSFET Electrical Characteristics TJ = 25 C unless otherwise noted 24 4.0 ID, DRAIN CURRENT (A) VGS = 3.5 V VGS = 2.5 V 16 VGS = 1.8 V VGS = 1.5 V 12 8 PULSE DURATION = 80P s DUTY CYCLE = 0.5%MAX 4 0 0.0 0.5 1.0 VGS = 1.2 V 1.5 VGS = 1.2 V NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 4.5 V 20 3.0 VGS = 1.5 V 2.5 2.0 VGS = 1.8 V 1.5 VGS = 2.5 V 1.0 VGS = 3.5 V VGS = 4.5 V 0.5 2.0 0 4 8 VDS, DRAIN TO SOURCE VOLTAGE (V) rDS(on), DRAIN TO 1.2 1.0 0.8 SOURCE ON-RESISTANCE (m:) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 1.4 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) TJ = 125 oC 30 20 TJ = 25 oC 1.5 2.0 2.5 3.0 3.5 4.0 VDS = 5 V 16 12 TJ = 125 oC 8 TJ = 25 oC 4 TJ = -55 oC 1.5 10 1 TJ = 125 oC TJ = 25 oC 0.1 0.01 0.001 0.0 2.0 VGS = 0 V TJ = -55 oC 0.2 0.4 0.6 0.8 1.0 VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current (c)2009 Fairchild Semiconductor Corporation FDMA410NZ Rev.B2 4.5 30 IS, REVERSE DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 40 Figure 4. On-Resistance vs Gate to Source Voltage PULSE DURATION = 80 Ps DUTY CYCLE = 0.5%MAX 1.0 50 VGS, GATE TO SOURCE VOLTAGE (V) 24 0.5 24 PULSE DURATION = 80 Ps DUTY CYCLE = 0.5%MAX ID = 4.75 A 10 1.0 Figure 3. Normalized On- Resistance vs Junction Temperature 0 0.0 20 60 ID = 9.5 A VGS = 4.5 V 20 16 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 1.6 -50 12 ID, DRAIN CURRENT (A) Figure 1. On-Region Characteristics 0.6 -75 PULSE DURATION = 80Ps DUTY CYCLE = 0.5%MAX 3.5 3 1.2 www.fairchildsemi.com FDMA410NZ Single N-Channel 1.5 V Specified PowerTrench(R) MOSFET Typical Characteristics TJ = 25 C unless otherwise noted 2000 5 VGS, GATE TO SOURCE VOLTAGE (V) ID = 9.5 A Ciss 1000 CAPACITANCE (pF) 4 VDD = 8 V 3 VDD = 10 V VDD = 12 V 2 1 Coss 100 2 4 6 8 10 12 1 10 -3 10 -4 10 -5 10 -6 10 -7 10 20 Figure 8. Capacitance vs Drain to Source Voltage 40 VGS = 0 V -ID, DRAIN CURRENT (A) Ig, GATE LEAKAGE CURRENT (A) Figure 7. Gate Charge Characteristics -2 10 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) 10 Crss 50 0.1 0 0 f = 1 MHz VGS = 0 V TJ = 125 o C TJ = 25 oC 10 0.1 ms 1 ms 1 THIS AREA IS LIMITED BY rDS(on) 10 ms SINGLE PULSE TJ = MAX RATED 1s 10 s DC 0.1 100 ms o RTJA = 145 C/W TA = 25 oC -8 0 3 6 9 12 0.01 0.1 15 1 10 50 -VDS, DRAIN to SOURCE VOLTAGE (V) VGS, GATE TO SOURCE VOLTAGE (V) Figure 9. Gate Leakage Current vs Gate to Source Voltage Figure 10. Forward Bias Safe Operation Area 50 P(PK), PEAK TRANSIENT POWER (W) VGS = 4.5 V SINGLE PULSE RTJA = 145 oC/W TA = 25 oC 10 1 0.5 -3 10 -2 10 -1 0 10 10 1 10 100 1000 t, PULSE WIDTH (sec) Figure 11. (c)2009 Fairchild Semiconductor Corporation FDMA410NZ Rev.B2 Single Pulse Maximum Power Dissipation 4 www.fairchildsemi.com FDMA410NZ Single N-Channel 1.5 V Specified PowerTrench(R) MOSFET Typical Characteristics TJ = 25 C unless otherwise noted 2 DUTY CYCLE-DESCENDING ORDER NORMALIZED THERMAL IMPEDANCE, ZTJA 1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM 0.1 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZTJA x RTJA + TA SINGLE PULSE o RTJA = 145 C/W 0.01 -3 10 -2 10 -1 10 0 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 12. Junction-to-Ambient Transient Thermal Response Curve (c)2009 Fairchild Semiconductor Corporation FDMA410NZ Rev.B2 5 www.fairchildsemi.com FDMA410NZ Single N-Channel 1.5 V Specified PowerTrench(R) MOSFET Typical Characteristics TJ = 25 C unless otherwise noted 2.000 0.10 C 1.00 6 2X 4 1.35 0.66 2.30 1.05 2.000 NO DRAIN OR GATE TRACES ALLOWED IN THIS AREA (0.47) 0.10 C PIN#1 LOCATION 2X 1 0.65 TYP 3 0.40 TYP RECOMMENDED LAND PATTERN OPT 1 0.8 MAX 0.10 C (0.20) 0.08 C 0.05 0.00 C SEATING PLANE 1.00 6 (0.30) PIN #1 IDENT 4 1.000 0.800 1 0.33 0.20 3 1.35 0.66 2.30 1.05 (0.56) 1.05 0.95 (0.47) 1 6 0.65 TYP 4 0.65 0.25~0.35 1.30 0.10 0.05 C AB C 3 0.40 TYP RECOMMENDED LAND PATTERN OPT 2 A. DOES NOT FULLY CONFORMTO JEDEC REGISTRATION MO-229 DATED AUG/2003 B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 D. DRAWING FILENAME: MKT-MLP06Lrev2. (c)2009 Fairchild Semiconductor Corporation FDMA410NZ Rev.B2 6 www.fairchildsemi.com FDMA410NZ Single N-Channel 1.5 V Specified PowerTrench(R) MOSFET Dimensional Outline and Pad Layout *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. 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Preliminary First Production Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I40 (c)2009 Fairchild Semiconductor Corporation FDMA410NZ Rev.B2 www.fairchildsemi.com FDMA410NZ Single N-Channel 1.5 V Specified PowerTrench(R) MOSFET TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 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