HI-300 thru HI-307 S E M I C O N D U C T O R CMOS Analog Switches December 1993 Features * * * * * * * * * Description Analog Signal Range (15V Supplies) 15V Low Leakage (Typical at +25oC) 40pA Low Leakage (Typical at +125oC) 1nA Low On Resistance (Typical at +25oC) 35 Break-Before-Make Delay (Typical) 60ns Charge Injection 30pC TTL, CMOS Compatible Symmetrical Switch Elements Low Operating Power 1.0mW (Typical for Hl-300 - 303) Applications * * * * * Sample and Hold (i.e. Low Leakage Switching) Op Amp Gain Switching (i.e. Low On Resistance) Portable, Battery Operated Circuits Low Level Switching Circuits Dual or Single Supply Systems The Hl-300 thru Hl-307 series of switches are monolithic devices fabricated using CMOS technology and the Harris dielectric isolation process. These switches feature break-beforemake switching, (Hl-301, HI-303, HI-305 and HI-307 only), low and nearly constant ON resistance over the full analog signal range, and low power dissipation, (a few mW for the Hl-300 thru HI-303, a few hundred mW for the HI-304 thru HI-307). The HI-300 thru HI-303 are TTL compatible and have a logic "0" condition with an input less than 0.8V and a logic "1" condition with an input greater than 4.0V. The Hl-304 thru HI-307 switches are CMOS compatible and have a low state with an input less than 3.5V and a high state with an input greater than 11V. (See pinouts for switch conditions with a logic "1" input.) All the devices are available in a 14 lead Epoxy or Ceramic DIP. The Hl-300, HI-301, HI-304 and HI-305 are also available in a 10 pin Metal Can. Each of the switch types are available in either the -55oC to +125oC or 0oC to +75oC operating ranges. Pinouts (Switch States are for a Logic "1" Input) DUAL SPST HI-300 AND HI-304 TOP VIEWS (CDIP, PDIP, SOIC) (METAL CAN) SPST HI-301 AND HI-305 TOP VIEWS (CDIP, PDIP, SOIC) (METAL CAN) V+ V+ NC 1 14 V+ D1 2 13 D2 NC 3 12 NC S1 4 11 S2 NC 5 10 NC IN1 6 9 IN2 GND 7 10 D1 S1 1 SWITCH 0 OFF 1 ON D2 2 8 S2 IN1 3 7 IN2 4 NC 6 5 8 V- LOGIC 9 V-* 14 V+ S3 2 13 S4 * The substrate and case are internally tied to V-. (The case should not be used as the Vconnection, however.) D3 3 12 D4 D1 4 11 D2 S1 5 10 S2 IN1 6 GND 7 LOGIC 14 V+ D1 2 13 D2 NC 3 12 NC S1 2 S1 4 11 S2 IN NC 5 10 NC IN 6 9 NC OFF 1 ON LOGIC SW1 SW2 0 OFF ON 1 ON OFF NC 1 14 V+ S3 2 13 S4 D3 3 12 D4 D1 4 11 D2 S1 5 10 S2 IN1 6 9 IN2 8 V- (c) Harris Corporation 1993 8 S2 3 NC 7 NC 4 5 6 V-* GND * The substrate and case are internally tied to V-. (The case should not be used as the Vconnection, however.) GND 7 9-93 LOGIC SW1 SW2 SW3 SW4 0 OFF ON 1 ON OFF 9 IN2 8 V- CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures. Copyright 9 D2 DUAL SPDT HI-303 AND HI-307 (PDIP, CDIP, SOIC) TOP VIEW SWITCH 0 10 D1 1 8 V- GND 7 GND DUAL DPST HI-302 AND HI-306 (PDIP, CDIP, SOIC) TOP VIEW NC 1 NC 1 File Number 3125 HI-300 thru HI-307 Ordering Information PART NUMBER TEMPERATURE RANGE PART NUMBER PACKAGE HI1-0300-2 -55oC to +125oC HI1-0300-5 0oC to +75oC HI2-0300-2 -55oC to +125oC 10 Pin TO-5 Can HI2-0300-5 0oC to +75oC 10 Pin TO-5 Can HI3-0300-5 0oC to +75oC HI9P0300-5 TEMPERATURE RANGE PACKAGE 14 Lead Ceramic DIP HI1-0304-2 -55oC to +125oC 14 Lead Ceramic DIP 14 Lead Ceramic DIP HI1-0304-5 0oC to +75oC 14 Lead Ceramic DIP o HI2-0304-2 o -55 C to +125 C 10 Pin TO-5 Can HI2-0304-5 0oC to +75oC 10 Pin TO-5 Can 14 Lead Plastic DIP HI3-0304-5 0oC to +75oC 14 Lead Plastic DIP 0oC to +75oC 14 Lead SOIC HI9P0304-5 0oC to +75oC 14 Lead SOIC HI9P0300-9 -40oC to +85oC 14 Lead SOIC HI9P0304-9 -40oC to +85oC 14 Lead SOIC HI1-0301-2 -55oC to +125oC 14 Lead Ceramic DIP HI1-0305-2 -55oC to +125oC 14 Lead Ceramic DIP HI1-0301-5 0oC to +75oC 14 Lead Ceramic DIP HI1-0305-5 0oC to +75oC HI2-0301-2 o -55 C to +125 C 10 Pin TO-5 Can HI2-0305-2 -55oC to +125oC 10 Pin TO-5 Can HI2-0301-5 0oC to +75oC 10 Pin TO-5 Can HI2-0305-5 0oC to +75oC 10 Pin TO-5 Can o o o 14 Lead Ceramic DIP HI3-0301-5 0 C to +75 C 14 Lead Plastic DIP HI3-0305-5 0oC to +75oC 14 Lead Plastic DIP HI9P0301-5 0oC to +75oC 14 Lead SOIC HI9P0305-5 0oC to +75oC 14 Lead SOIC HI9P0301-9 -40oC to +85oC 14 Lead SOIC HI9P0305-9 -40 C to +85 C 14 Lead SOIC HI1-0302-2 -55oC to +125oC 14 Lead Ceramic DIP HI1-0306-2 -55oC to +125oC 14 Lead Ceramic DIP HI1-0302-5 0oC to +75oC 14 Lead Ceramic DIP HI1-0306-5 0oC to +75oC 14 Lead Ceramic DIP o o o o HI3-0302-5 0 C to +75 C 14 Lead Plastic DIP HI3-0306-5 0oC to +75oC 14 Lead Plastic DIP HI9P0302-5 0oC to +75oC 14 Lead SOIC HI9P0306-5 0oC to +75oC 14 Lead SOIC HI9P0302-9 -40oC to +85oC 14 Lead SOIC HI9P0306-9 -40 C to +85 C 14 Lead SOIC HI1-0303-2 -55oC to +125oC 14 Lead Ceramic DIP HI1-0307-2 -55oC to +125oC 14 Lead Ceramic DIP HI1-0303-5 0oC to +75oC 14 Lead Ceramic DIP HI1-0307-5 0oC to +75oC 14 Lead Ceramic DIP o o o o HI3-0303-5 0 C to +75 C 14 Lead Plastic DIP HI3-0307-5 0oC to +75oC 14 Lead Plastic DIP HI9P0303-5 0oC to +75oC 14 Lead SOIC HI19P307-5 0oC to +75oC 14 Lead SOIC HI9P0303-9 -40oC to +85oC 14 Lead SOIC HI9P0307-9 -40oC to +85oC 14 Lead SOIC Functional Block Diagram TYPICAL SWITCH HI-300 SERIES S IN N P D 9-94 HI-300 thru HI-307 Schematic Diagrams SWITCH CELL A V+ MN1B MN2B MN3B MP5B MP4B IN OUT MN4B MN6B MP3B MP2B MP1B V- A DIGITAL INPUT BUFFER AND LEVEL SHIFTER V+ D2A MP1A MP2A MP3A MP4A MP5A MP6A MP7A MP8A 200 A A LOGIC IN D1A MN1A MN2A MN3A MN4A MN5A MN6A MN7A MN8A GND VSWITCH CELL DRIVER (ONE PER SWITCH CELL) 9-95 Specifications HI-300 thru HI-307 Absolute Maximum Ratings Thermal Information Voltage Between Supplies . . . . . . . . . . . . . . . . . . . . . . . 44V (22V) Digital Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . +VSUPPLY +4V -VSUPPLY -4V Analog Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . +VSUPPLY +1.5V -VSUPPLY -1.5V Storage Temperature Range . . . . . . . . . . . . . . . . . -65oC to +150oC Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300oC Typical Derating Factor. . . . . . . . . . .1.5mA/MHz Increase in ICCOP ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1 Thermal Resistance JA JC 14 Lead Ceramic DIP . . . . . . . . . . . . . . . 95oC/W 24oC/W 14 Lead Plastic DIP . . . . . . . . . . . . . . . . . . . 100oC/W 14 Lead SOIC . . . . . . . . . . . . . . . . . . . . . 120oC/W 10 Pin TO-100 Metal Can . . . . . . . . . . . . 136oC/W 65oC/W Maximum Power Dissipation Ceramic DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 588mW Plastic DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 526mW Metal Can . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 435mW Derate 6.9mW/0oC above TA = +70oC Operating Temperature Range HI-3XX-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to +125oC HI-3XX-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to +75oC Junction Temperature Ceramic DIP, TO-Can . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC Plastic DIP, SOIC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Specifications Supplies = +15V, -15V; VIN = Logic Input. HI-300-303: VIN - for Logic "1" = 4V, for Logic "0" = 0.8V. HI-304-307: VIN - for Logic "1" = 11V, for Logic "0" = 3.5V, Unless Otherwise Specified. -55oC TO +125oC PARAMETERS 0oC TO +75oC TEMP MIN TYP MAX MIN TYP MAX UNITS +25oC SWITCHING CHARACTERISTICS Break-Before-Make Delay, tOPEN (Note 15) Switch On Time, tON (Note 13) - 60 - - 60 - ns o - 210 300 - 210 300 ns o +25 C Switch Off Time, tOFF (Note 13) +25 C - 160 250 - 160 250 ns Switch Off Time, tON (Note 14) +25oC - 160 250 - 160 250 ns o - 100 150 - 100 150 ns o - 60 - - 60 - dB o Switch Off Time, tOFF (Note 14) "Off Isolation" (Note 6) +25 C +25 C Charge Injection (Note 7) +25 C - 3 - - 3 - mV Input Switch Capacitance, CS(OFF) +25oC - 16 - - 16 - pF o - 14 - - 14 - pF o - 35 - - 35 - pF o Output Switch Capacitance, CD(OFF) Output Switch Capacitance, CD(ON) +25 C +25 C (High) Digital Input Capacitance, CIN +25 C - 5 - - 5 - pF (Low) Digital Input Capacitance, CIN +25oC - 5 - - 5 - pF Full - - 0.8 - - 0.8 V Input High Level, VINH (Note 13) Full 4 - - 4 - - V Input Low Level, VINL (Note 14) Full - - 3.5 - - 3.5 V Input High Level, VINH (Note 14) Full 11 - - 11 - - V Input Leakage Current (Low), IINL (Note 5) Full - - 1 - - 1 A Input Leakage Current (High), IINH (Note 5) Full - - 1 - - 1 A Full DIGITAL INPUT CHARACTERISTICS Input Low Level, VINL (Note 13) ANALOG SWITCH CHARACTERISTICS Analog Signal Range -15 - +15 -15 - +15 V o 35 50 - 35 50 On Resistance, RON (Note 2) +25 C - Full - 40 75 - 40 75 Off Input Leakage Current, IS(OFF) (Note 3) +25oC - 0.04 1 - 0.04 5 nA Full - 1 100 - 0.2 100 nA 9-96 Specifications HI-300 thru HI-307 Electrical Specifications Supplies = +15V, -15V; VIN = Logic Input. HI-300-303: VIN - for Logic "1" = 4V, for Logic "0" = 0.8V. HI-304-307: VIN - for Logic "1" = 11V, for Logic "0" = 3.5V, Unless Otherwise Specified. (Continued) -55oC TO +125oC PARAMETERS TEMP 0oC TO +75oC MIN TYP MAX MIN TYP MAX UNITS o 0.04 1 - 0.04 5 nA Off Output Leakage Current, ID(OFF) (Note 3) +25 C - Full - 1 100 - 0.2 100 nA On Leakage Current, ID(ON) (Note 4) +25oC - 0.03 1 - 0.03 5 nA Full - 0.5 100 - 0.2 100 nA +25oC - 0.09 0.5 - 0.09 0.5 mA Full - - 1 - - 1 mA +25oC - 0.01 10 - 0.01 100 A Full 100 - - - A POWER SUPPLY CHARACTERISTICS Current, I+ (Notes 8, 13) Current, I- (Notes 8, 13) Current, I+ (Notes 9, 13) Current, I- (Notes 9, 13) Current, I+ (Notes 10, 14) Current, I- (Notes 10, 14) Current, I+ (Notes 11, 14) Current, I- (Notes 11, 14) - - o +25 C - 0.01 10 - 0.01 100 A Full - - 100 - - - A +25oC - 0.01 10 - 0.01 100 A Full 100 - - - A - - o +25 C - 0.01 10 - 0.01 100 A Full - - 100 - - - A +25oC - 0.01 10 - 0.01 100 A Full 100 - - - A - - o +25 C - 0.01 10 - 0.01 100 A Full - - 100 - - - A +25oC - 0.01 10 - 0.01 100 A Full - - 100 - - - A NOTES: 1. As with all semiconductors, stresses listed under "Absolute Maximum Ratings" may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under "Electrical Specifications" are the only conditions recommended for satisfactory operation. 2. VS = 10V, IOUT = 3. VS = 14V, VD = 10mA. On resistance derived from the voltage measured across the switch under the above conditions. 14V. 4. VS = VD = 14V. 5. The digital inputs are diode protected MOS gates and typical leakages of 1nA or less can be expected. 6. VS = 1VRMS, f = 500kHz, CL = 15pF, RL = 1K. 7. VS = 0V, CL = 10,000pF, Logic Drive = 5V pulse. (HI-300 - 303) Switches are symmetrical; S and D may be interchanged. Logic Drive = 15V (HI-304 - 307). 8. VIN = 4V (one input) (all other inputs = 0V). 9. VIN = 0.8V (all inputs). 10. VIN = 15V (all inputs). 11. VIN = 0V (all inputs). 12. To drive from DTL/TTL circuits, pullup resistors to +5V supply are recommended. 13. HI-300 thru HI-303 only. 14. HI-304 thru HI-307 only. 15. HI-301, HI-303, HI-305, HI-307 only. 9-97 HI-300 thru HI-307 Typical Performance Curves 80 DRAIN TO SOURCE ON RESISTANCE () DRAIN TO SOURCE ON RESISTANCE () 80 V+ = +15V, V- = -15V 60 +125oC +25oC -55oC 40 20 0 -15 -10 -5 0 5 DRAIN VOLTAGE (V) 10 TA = +25oC 60 C B 40 A 20 A B C D 0 -15 15 FIGURE 1. RDS(ON) vs VD AND TEMPERATURE D V+ = +15V, V- = -15V V+ = +10V, V- = -10V V+ = +7.5V, V- = -7.5V V+ = +5V, V- = -5V -10 -5 0 5 DRAIN VOLTAGE (V) 15 FIGURE 2. RDS(ON) vs VD AND POWER SUPPLY VOLTAGE 100 100 V+ = +15V, V- = -15V CLOAD = 30pF, VS = 1VRMS V+ = +15V, V- = -15V TA = +25oC, VS = 15V, RL = 2K 80 OFF ISOLATION (dB) POWER DISSIPATION (mW) 10 10 HI-300 THRU HI-303 1.0 RL = 100 60 RL = 1k 40 20 HI-304 THRU HI-307 0.1 0 105 1 10 100 1K 10K 100K 1M LOGIC SWITCHING FREQUENCY (50% DUTY CYCLE) (Hz) 10.0 10.0 V+ = +15V, V- = -15V V+ = +15V, V- = -15V | VD | = | VS | = 14V 1.0 0.1 0.01 25 107 108 FREQUENCY (Hz) FIGURE 4. OFF ISOLATION vs FREQUENCY ID(ON) CHANNEL LEAKAGE (nA) SOURCE OR DRAIN OFF LEAKAGE CURRENT (nA) FIGURE 3. DEVICE POWER DISSIPATION vs SWITCHING FREQUENCY SINGLE LOGIC INPUT 106 1.0 0.1 0.01 25 75 125 TEMPERATURE (oC) FIGURE 5. IS(OFF) OR ID(OFF) vs TEMPERATURE 75 125 TEMPERATURE (oC) FIGURE 6. ID(ON) vs TEMPERATURE The net leakage into the source or drain is the n-channel leakage minus the p-channel leakage. This difference can be positive, negative or zero depending on the analog voltage and temperature, and will vary greatly from unit to unit. 9-98 HI-300 thru HI-307 Typical Performance Curves (Continued) +15V 6 RGEN = 0 S VGEN LOGIC INPUT (V) V+ D RL 10k IN CL 10pF HI-300 THRU HI-303 4 2 0 LOGIC INPUT VGND VLOGIC -15V 0 7A. TEST CIRCUIT OUTPUT VOLTAGE (V) LOGIC INPUT (V) HI-304 THRU HI-307 10 5 0 LOGIC INPUT 0.4 0.8 TIME (s) 1.2 +10 VGEN = 10V 0 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) VGEN = 5V 1.2 0.4 0.8 TIME (s) 1.2 1.6 1.2 1.6 7F. VOUT vs TIME OUTPUT VOLTAGE (V) OUTPUT VOLTAGE (V) 1.6 VGEN = 0V 0 0 VGEN = -5V 0.8 TIME (s) 1.2 0 -5 1.6 -5 0.4 0.8 TIME (s) +5 7E. VOUT vs TIME 0 0.4 7D. VOUT vs TIME 0 0.8 TIME (s) 1.6 0 1.6 +5 0.4 1.2 (SEE NOTE) +5 7C. VIN(LOGIC) vs TIME 0 0.8 TIME (s) 7B. VIN(LOGIC) vs TIME 15 0 0.4 1.2 1.6 0 -5 -10 VGEN = -10V 0 7G. VOUT vs TIME 0.4 0.8 TIME (s) 7H. VOUT vs TIME NOTE: If RGEN, RL or CL is increased, there will be proportional increases in rise and/or fall RC times. FIGURE 7. TYPICAL DELAY, RISE, FALL, SETTLING TIMES AND SWITCHING TRANSIENTS 9-99 HI-300 thru HI-307 Typical Performance Curves (Continued) 16 INPUT ON CAPACITANCE (pF) OUTPUT ON CAPACITANCE (pF) 60 50 40 30 12 8 TRANSITION (INDETERMINATE DUE TO ACTIVE INPUT) HI-300 THRU HI-303 4 HI-304 THRU HI-307 TRANSITION 20 0 2 4 6 8 10 DRAIN VOLTAGE (V) 12 14 0 16 FIGURE 8. OUTPUT ON CAPACITANCE vs DRAIN VOLTAGE 6 8 10 INPUT VOLTAGE (V) 12 14 16 300 V+ = +15V, V- = -15V VINH = 15V, VINL = 0V V+ = +15V, V- = -15V VINH = 4.0V, VINL = 0V tON SWITCHING TIME (ns) SWITCHING TIME (ns) 4 FIGURE 9. DIGITAL INPUT CAPACITANCE vs INPUT VOLTAGE 300 200 tOFF 100 -55 -35 -15 5 25 45 65 85 105 125 200 tON 100 tOFF -55 TEMPERATURE (oC) FIGURE 10. SWITCHING TIME vs TEMPERATURE, HI-300 THRU HI-303 300 tON 200 tOFF V+ = +15V, TA = +25oC VINH = 4V, VINL = 0V 5 10 NEGATIVE SUPPLY (V) FIGURE 12. SWITCHING TIME vs NEGATIVE SUPPLY VOLTAGE, HI-300 THRU HI-303 -15 5 25 45 65 TEMPERATURE (oC) tON 300 100 0 -35 85 105 125 FIGURE 11. SWITCHING TIME vs TEMPERATURE, HI-304 THRU HI-307 SWITCHING TIME (s) SWITCHING TIME (s) 2 15 V+ = +15V, TA = +25oC VINH = 15V, VINL = 0V 200 tOFF 100 0 5 10 NEGATIVE SUPPLY (V) FIGURE 13. SWITCHING TIME vs NEGATIVE SUPPLY VOLTAGE, HI-304 THRU HI-307 9-100 15 HI-300 thru HI-307 SWITCHING TIME/BREAK-BEFORE-MAKE TIME (s) Typical Performance Curves (Continued) 1.8 V- = -15V, TA = +25oC VINH = 15V, VINL = 0V 1.6 SWITCHING TIME (s) 1.4 1.2 1.0 0.8 0.6 0.4 tOFF tON 0.2 0 0 5 10 POSITIVE SUPPLY VOLTAGE (V) 15 INPUT SWITCHING THRESHOLD VOLTAGE (V) FIGURE 14. SWITCHING TIME vs POSITIVE SUPPLY VOLTAGE, HI-304 THRU HI-307 1.8 V- = -15V, TA = +25oC VINH = 4.0V, VINL = 0V 1.6 1.4 1.2 1.0 0.8 0.6 tON 0.4 0 tOFF tBBM HI-301/303 ONLY 0.2 0 5 10 POSITIVE SUPPLY VOLTAGE (V) FIGURE 15. SWITCHING TIME AND BREAK-BEFORE-MAKE TIME vs POSITIVE SUPPLY VOLTAGE, HI-300 THRU HI-303 7 V- = -15V, TA = +25oC 6 HI-304 THRU 307 5 4 3 2 HI-300 THRU 303 1 0 0 15 5 10 POSITIVE SUPPLY VOLTAGE (V) 15 FIGURE 16. INPUT SWITCHING THRESHOLD vs POSITIVE SUPPLY VOLTAGE, HI-300 THRU HI-307 9-101 HI-300 thru HI-307 Test Circuits SWITCH TYPE VINH SWITCH TYPE VINH HI-300 thru HI-303 4V HI-301, HI-303 5V HI-304 thru HI-307 15V HI-305, HI-307 15V +15V +15V V+ V+ S VO D VS = +3V RL 300 CL 33pF SWITCH OUTPUT VS1 = +3V VS2 = +3V S1 D1 S2 D2 OUT 2 RL2 LOGIC INPUT LOGIC INPUT GND -15V LOGIC INPUT LOGIC "1" = SWITCH ON LOGIC INPUT 0V RL1 CL1 -15V LOGIC "1" = SWITCH ON VINH RL1 = RL2 = 300 CL1 = CL2 = 33pF 0V VINH 50% 50% 50% 90% 10% tOFF SWITCH OUTPUT 50% 0V tBBM tON FIGURE 17. SWITCHING TEST CIRCUIT (tON, tOFF) 50% OUT 1 0V VS 0V SWITCH OUTPUT CL2 V- VGND OUT 1 OUT 2 50% tBBM FIGURE 18. BREAK-BEFORE-MAKE TEST CIRCUIT (tBBM) 9-102