June 2010 Doc ID 14580 Rev 3 1/23
23
STG5678
Low voltage dual SPDT switch
with negative rail capability
Features
■Distortion-free negative signal throughput
down to VCC - 5.5 V
■Wide operating voltage range:
VCC (opr) = 1.65 to 4.5 V single supply
■Ultra low power dissipation:
ICC = 0.2 µA (max.) at TA = 85 °C
■Low ON resistance:
RON = 0.5 Ω (max. TA = 25 °C) at VCC = 3.6 V
■4.3 V tolerant and 1.8 V compatible threshold
on digital control input at VCC = 1.65 V to 4.5 V
■Latch-up performance exceeds 300 mA
(JESD 17)
■ESD performance:
– 2000-V human-body model
(IEC61340-3-1:2002 level 2)
– 200-V machine model
(IEC61340-3-2 level M2)
– 1000-V charge device model
(JESD22-C101-A level III)
Description
The STG5678 is a high-speed CMOS low voltage
dual analog SPDT (single pole dual throw) switch
or 2:1 multiplexer/de-multiplexer switch fabricated
in silicon gate CMOS technology. It is designed to
operate from 1.65 to 4.5 V.
The device is capable of handling signals with
negative voltages from VCC - 5.5 V to VCC without
any distortion.
Additional key features are fast switching speed,
break-before-make delay time and ultra low power
consumption. All inputs and outputs are equipped
with protection circuits against static discharge,
giving them ESD immunity and transient excess
voltage.
Flip-chip 12
Table 1. Device summary
Order code Package Packaging
STG5678BJR Flip-chip 12 Tape and reel
STG5678CJR Flip-chip 12 (with back side coating) Tape and reel
www.st.com
Contents STG5678
2/23 Doc ID 14580 Rev 3
Contents
1 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 STG5678 device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3.1 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6 Application hint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
6.1 Input signal dynamic range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
STG5678 Pin settings
Doc ID 14580 Rev 3 3/23
1 Pin settings
1.1 Pin connection
Figure 1. Pin connection (bump side view)
1. Note 1: bump A1 is distinguished by a circular dot on the top-side. There is no circular dot on the bump-
side.
1.2 Pin description
A1
A2
B2
C2
C1
B1
D2
D1
A3
B3
C3
D3
A B C D
1
2
3
1SEL
NC
GND
GND
D1
1S1
VCC
1S2
2SEL
2S1
D2
2S2
A B C D
1
2
3
See note 1
Table 2. Pin assignment
Pin number Symbol Name and function
A1 1SEL Selection control for switch 1
A2 NC No connection
A3 2SEL Selection control for switch 2
B1 1S1 Independent channel for switch 1
B2 GND Ground (0 V)
B3 2S1 Independent channel for switch 2
C1 D1 Common channel for switch 1
C2 GND Ground (0 V)
C3 D2 Common channel for switch 2
D1 1S2 Independent channel for switch 1
D2 VCC Positive supply voltage
D3 2S2 Independent channel for switch 2
STG5678 device summary STG5678
4/23 Doc ID 14580 Rev 3
2 STG5678 device summary
Figure 2. Functional diagram
Figure 3. Input equivalent circuit
Table 3. Truth table
SEL Switch S1 Switch S2
HONOFF
(1)
1. High impedance
LOFF
(1) ON
1S1
1S2
D1
1SEL
2S1
2S2
D2
2SEL
2SEL
2S1
2S2
1S1
1S2
D2
D1
1SEL
D
SEL
S2
S1
STG5678 Maximum rating
Doc ID 14580 Rev 3 5/23
3 Maximum rating
Stressing the device above the rating listed in the “absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Table 4. Absolute maximum ratings
Symbol Parameter Value Unit
VCC Supply voltage -0.5 to 5.5 V
VIDC input voltage - (VCC - 6.0) to
VCC + 0.5 V
VIC DC control input voltage -0.5 to 5.5 V
VODC output voltage - (VCC - 6.0 V) to
VCC + 0.5 V
IIKC DC input diode current on control pin (VSEL <0V) -50 mA
IIK DC input diode current (VIN <0V) ±50 mA
IOK DC output diode current ±20 mA
IODC output current ±150 mA
IOP DC output current peak (pulse at 1ms, 10% duty cycle) ±400 mA
ICC or
IGND
DC VCC or ground current ±100 mA
PDPower dissipation at TA = 70°C (1)
1. Derate above 70 ºC by 18.5 mW/C
1120 mW
Tstg Storage temperature -65 to 150 °C
TLLead temperature (10 sec) 300 °C
Maximum rating STG5678
6/23 Doc ID 14580 Rev 3
3.1 Recommended operating conditions
Table 5. Recommended operating conditions
Symbol Parameter Value Unit
VCC Supply voltage 1.65 to 4.5 V
VIInput voltage VCC -5.5 to VCC V
VIC Control input voltage 0 to 4.5 V
VOOutput voltage VCC -5.5 to VCC V
Top Operating temperature -40 to 85 °C
dt/dv Input rise and fall time control
input
VCC = 1.65 to 2.7 V 0 to 20 ns/V
VCC = 3.0 to 4.5 V 0 to 10
STG5678 Electrical characteristics
Doc ID 14580 Rev 3 7/23
4 Electrical characteristics
Table 6. DC specifications
Symbol Parameter
Test conditions Value
Unit
VCC
(V)
TA = 25 °C -40 to 85 °C
Min Typ Max Min Max
VIH
High level
input voltage
1.65 −1.95 0.9 – – 0.9 –
V
2.25 −2.7 0.9 – – 0.9 –
3.0 −4.3 1.0 – – 1.0 –
4.5 1.1 – – 1.1 –
VIL
Low level
input voltage
1.65 −1.95 – – 0.6 – 0.6
V
2.25 −2.7 – – 0.6 – 0.6
3.0 −4.3 – – 0.7 – 0.7
4.5 – – 0.7 – 0.7
RON
Switch ON
resistance
1.8
VS = VCC −5.5 V
to VCC;
IS = 100 mA
–3.804.60–7.0
Ω
2.7 – 0.77 0.90 – 1.2
3.0 – 0.64 0.80 – 1.0
3.6 – 0.51 0.65 – 1.0
ΔRON
ON
resistance
match
between
channels (1)
1.8
VS at RON max
IS = 100 mA
– 50 – – 500
mΩ
2.7 – 20 – – 500
3.0 – 15 – – 500
3.6 – 15 – – 500
RFLAT
ON
resistance
flatness (2)
1.8
VS = VCC −5.5 V
to VCC;
IS = 100 mA
–3.5– –6.6
Ω
2.7 – 0.50 – – 0.8
3.0 – 0.40 – – 0.6
3.6 – 0.25 – – 0.5
IOFF
Sn OFF
state
leakage
current
3.6
VS = -1.2 to
3.6 V
VD = 3.6 to
-1.2 V
– -0.55 – -2 1 µA
ION
Sn ON state
leakage
current
3.6
VS = -1.2 to
3.6 V
VD = open
– -0.55 – -2 1 µA
Electrical characteristics STG5678
8/23 Doc ID 14580 Rev 3
Symbol Parameter
Test conditions Value
Unit
VCC
(V)
TA = 25 °C -40 to 85 °C
Min Typ Max Min Max
ID
D ON state
leakage
current
3.6
VS = open
VD = -1.2 V to
3.6 V
–0.55– -2 1µA
IIH,IIL
SEL leakage
current 3.6 VSEL=3.6V or
GND -0.1 0.1 -1 1 µA
ICCLV
Quiescent
supply
current low
voltage
driving
3.6 V1SEL, V2SEL =
1.80 V – 7 – – 10 µA
ICC
Quiescent
supply
current(3)
2.5 V1SEL= V2SEL =
VCC
–5.6– –10
µA
3.6 – 8 – – 16
1.65 −4.5 V1SEL= V2SEL =
GND –0.05– –0.1
1. Note 1: ΔRON = RON(max) - RON (min)
2. Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges.
3. When V1SEL and V2SEL is both low, the ICC consumption will reduce to less than 0.1 µA (max)
Table 6. DC specifications (continued)
STG5678 Electrical characteristics
Doc ID 14580 Rev 3 9/23
Table 7. AC electrical characteristics (CL = 35 pF, RL = 50 Ω, tr = tf ≤ 5ns)
Symbol Parameter
Test conditions Value
Unit
Vcc
(V)
TA = 25°C -40 to 85°C
Min Typ Max Min Max
tPLH, tPHL
Propagation
delay
1.65 −1.95 – 0.45 – – –
ns
2.3 −2.7 – 0.40 – – –
3.0 −3.3 – 0.30 – – –
3.6 – 0.25 – – –
tON
Tur n O N
time
1.65 −1.95 VS = 0.8 V – 220 265 – –
ns
2.3 −2.7
VS = 1.5 V
– 140 175 – –
3.0 −3.3 – 110 135 – –
3.6 – 105 130 – –
tOFF
Tur n O F F
time
1.65 −1.95 VS = 0.8 – 120 150 – –
ns
2.3 −2.7
VS = 1.5 V
–7792 – –
3.0 −3.3 – 77 92 – –
3.6 – 77 92 – –
tD
Break-
before-make
time delay
1.65 −1.95
CL = 35 pF
RL = 50 Ω
VS = VCC/2
–120–––
ns
2.3 −2.7 – 66 – – –
3.0 −3.3 – 40 – – –
3.6 – 30 – – –
QCharge
injection
1.65 −1.95
CL = 100 pF
VGEN = 0 V
–55–––
pC
2.3 −2.7 – 76 – – –
3.0 −3.3 – 94 – – –
3.6 – 126 – – –
Electrical characteristics STG5678
10/23 Doc ID 14580 Rev 3
Table 8. Analog switch characteristics (CL = 5 pF, RL = 50 Ω,)
Symbol Parameter
Test conditions Value
Unit
VCC
(V)
TA = 25 °C -40 to 85 °C
Min Typ Max Min Max
OIRR OFF isolation (1) 2.7 −3.6
VS = 1 VRMS,
f = 100 kHz –-86 – – –
dB
VS = 1 VRMS,
f = 1 MHz –-70 – – –
VS = 1 VRMS,
f = 5 MHz –-54 – – –
Xtalk Crosstalk(2) 2.7 −3.6
VS = 1 VRMS,
f = 100 kHz –-96 – – –
dB
VS = 1 VRMS,
f = 1 MHz –-87 – – –
VS = 1 VRMS,
f = 5 MHz –-74 – – –
THD
Total harmonic
distortion 2.7 −3.6
RL = 32 Ω
VIN = 0.5 VPP
DC bias = 0
f = 20 Hz to 20 kHz
–0.01 – – – %
BW -3dB bandwidth 2.7 −3.6 RL = 50 Ω
Signal = 0 dBm –30 – – –MHz
CSEL
Control pin input
capacitance 3.3 f = 1 MHz – 12 – – – pF
CSn(OFF)
OFF Sn port
capacitance 3.3 f = 1 MHz –120 – – – pF
CD
D port capacitance
when switch is
enabled
3.3 f = 1 MHz – 290 – – – pF
1. Off isolation = 20Log10 (VD/VS), VD = output. VS = input to off switch.
2. Crosstalk values are measured between two switches.
STG5678 Test circuit
Doc ID 14580 Rev 3 11/23
5 Test circuit
Figure 4. ON resistance
Figure 5. OFF leakage
IDS
V
CS14071
VCC
S1
S2
IN
GND
GND
D
VS
VSS
VCC
IN
S2
A
CS14081
D
VD
A
VCC
GND
S(OFF)
ID(OFF)
I
Test circuit STG5678
12/23 Doc ID 14580 Rev 3
Figure 6. OFF isolation
Figure 7. Bandwidth
GND
IN
S2
S1
VCC
VOUT
50 Ω
GND
VS
CS00381
CS00371
V
CC
VCC
S1
S2
IN
GND
D
VOUT
STG5678 Test circuit
Doc ID 14580 Rev 3 13/23
Figure 8. Channel-to-channel crosstalk
2. CL= 5/35 pF or equivalent (includes jig and probe capacitance)
3. RL=50Ω or equivalent
4. RT=Z
OUT of pulse generator (typically 50 Ω)
Figure 9. Test circuit
CS14091
Test circuit STG5678
14/23 Doc ID 14580 Rev 3
Figure 10. Break-before-make time delay
Figure 11. Switching time and charge injection (VGEN =0V, R
GEN =0 Ω, RL=1MΩ,
CL= 100 pF)
Figure 12. Turn on, turn off delay time
CS08721
S1
S2
V
CC
D
RLCL
V
OUT
GND
VIN
IN
STG5678 Application hint
Doc ID 14580 Rev 3 15/23
6 Application hint
6.1 Input signal dynamic range
The STG5678 negative analog switch allows input signals that fall below 0 V to pass through
the switch without signal distortion. The input signal dynamic range VI consists of a
positive-region and a negative-region.
The positive-region is limited by the level of VCC. The negative-region is limited by the
difference between VCC and 5.5 V. The effect of this is that, the higher the VCC, the smaller
the operating range in the negative region.
For example, if VCC = 3.6 V, the input signal dynamic range is from -1.9 V to 3.6 V.
Figure 13. Application diagram
0V
VCC
VCC-5.5
Ne
g
ative SW
VCC
VI
Negative region
Package mechanical data STG5678
16/23 Doc ID 14580 Rev 3
7 Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 14. Package outline for Flip-chip 12
D C B A
Bottom view
3
2
1
STG5678 Package mechanical data
Doc ID 14580 Rev 3 17/23
Figure 15. Footprint recommendation
Table 9. Mechanical data for Flip-chip 12
Symbol Millimeters
Min Typ Max
A 0.55 0.605 0.66
A1 0.17 0.205 0.24
A2 0.38 0.4 0.42
b 0.215 0.255 0.295
D 1.568 1.598 1.628
D1 – 1.2 –
E 1.168 1.198 1.228
E1 – 0.8 –
e 0.36 0.4 0.44
f 0.189 0.199 0.209
ccc – 0.05 –
Package mechanical data STG5678
18/23 Doc ID 14580 Rev 3
Figure 16. Package outline for Flip-chip 12 with back side coating
Table 10. Mechanical data for Flip-chip 12 with back side coating
Symbol Millimeters
Min Typ Max
A 0.595 0.65 0.705
A1 0.165 0.20 0.235
A2 0.38 0.4 0.42
b 0.215 0.255 0.295
D 1.568 1.598 1.628
D1 – 1.2 –
E 1.168 1.198 1.228
E1 – 0.8 –
e 0.36 0.4 0.44
f 0.189 0.199 0.209
ccc – 0.05 –
N5_ME
A
B
C
4
$
STG5678 Package mechanical data
Doc ID 14580 Rev 3 19/23
Figure 17. Footprint recommendation
Figure 18. Tape information
N5_FR
1 2 3 4
A
B
C
Package mechanical data STG5678
20/23 Doc ID 14580 Rev 3
Figure 19. Tape orientation
Table 11. Reel measurement
Tape
width
(mm)
AN
W1
W2 W3
Max Min Max Min Max
8 180 54 8.4 +1.5/-0 14.4 7.9 10.9
User direction of feed
AM00745V1
STG5678 Package mechanical data
Doc ID 14580 Rev 3 21/23
Figure 20. Reel information
Revision history STG5678
22/23 Doc ID 14580 Rev 3
8 Revision history
Table 12. Document revision history
Date Revision Changes
01-Apr-2008 1 Initial release.
10-Sep-2008 2 Document status promoted from preliminary data to datasheet.
Modified: Figure 19 on page 20.
Updated: Table 9 on page 17.
04-Jun-2010 3 Added: Flip-chip 12 with back side coating. Document reformatted.
STG5678
Doc ID 14580 Rev 3 23/23
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