FCBS0550 Smart Power Module (SPM) Features General Description * UL Certified No.E209204(SPM27-BA package) It is an advanced smart power module (SPM) that Fairchild has newly developed and designed to provide very compact and high performance ac motor drives mainly targeting low-power inverter-driven application like refrigerator. It combines optimized circuit protection and drive matched to low-loss MOSFETs. System reliability is further enhanced by the integrated under-voltage lock-out and short-circuit protection. The high speed built-in HVIC provides opto-coupler-less single-supply MOSFET gate driving capability that further reduce the overall size of the inverter system design. Each phase current of inverter can be monitored separately due to the divided negative dc terminals. * 500V-5A 3-phase MOSFET inverter bridge including control ICs for gate driving and protection * Divided negative dc-link terminals for inverter current sensing applications * Single-grounded power supply due to built-in HVIC * Isolation rating of 2500Vrms/min. * Very low leakage current due to using ceramic substrate Applications * AC 200V three-phase inverter drive for small power ac motor drives * Home appliances applications like refrigerator. Top View Bottom View 44mm 26.8mm Figure 1. (c)2005 Fairchild Semiconductor Corporation FCBS0550 Rev. A 1 www.fairchildsemi.com FCBS0550 Smart Power Module (SPM) September 8, 2005 FCBS0550 Smart Power Module (SPM) Integrated Power Functions * 500V-5A MOSFET inverter for three-phase DC/AC power conversion (Please refer to Fig. 3) Integrated Drive, Protection and System Control Functions * For inverter high-side MOSFETs: Gate drive circuit, High voltage isolated high-speed level shifting Control circuit under-voltage (UV) protection Note) Available bootstrap circuit example is given in Figs. 10 and 11. * For inverter low-side MOSFETs: Gate drive circuit, Short circuit protection (SC) Control supply circuit under-voltage (UV) protection * Fault signaling: Corresponding to a UV fault (Low-side supply), SC fault * Input interface: 3.3/5V CMOS/LSTTL compatible, Schmitt trigger input Pin Configuration Top View 13.3 (1) (2) (3) (4) (5) (6) (7) (8) V CC(L) COM IN (UL) IN (VL) IN (WL) V FO CFOD CSC (21) N U (22) N V 19.1 (23) N W (9) IN (UH) (10) V CC(UH) (11) V B(U) (12) V S(U) (13) IN (VH) (14) VCC(VH) (15) V B(V) (24) U Case Tem perature (TC) Detecting Point (25) V (16) V S(V) (17) IN (WH) (18) VCC(WH) (26) W Ceramic Substrate (19) V B(W) (27) P (20) V S(W) Figure 2. 2 FCBS0550 Rev. A www.fairchildsemi.com FCBS0550 Smart Power Module (SPM) Pin Descriptions Pin Number Pin Name Pin Description 1 VCC(L) Low-side Common Bias Voltage for IC and MOSFETs Driving 2 COM Common Supply Ground 3 IN(UL) Signal Input for Low-side U Phase 4 IN(VL) Signal Input for Low-side V Phase 5 IN(WL) Signal Input for Low-side W Phase 6 VFO Fault Output 7 CFOD Capacitor for Fault Output Duration Time Selection 8 CSC Capacitor (Low-pass Filter) for Short-Current Detection Input 9 IN(UH) Signal Input for High-side U Phase 10 VCC(UH) High-side Bias Voltage for U Phase IC 11 VB(U) High-side Bias Voltage for U Phase MOSFET Driving 12 VS(U) High-side Bias Voltage Ground for U Phase MOSFET Driving 13 IN(VH) Signal Input for High-side V Phase 14 VCC(VH) High-side Bias Voltage for V Phase IC 15 VB(V) High-side Bias Voltage for V Phase MOSFET Driving 16 VS(V) High-side Bias Voltage Ground for V Phase MOSFET Driving 17 IN(WH) Signal Input for High-side W Phase 18 VCC(WH) High-side Bias Voltage for W Phase IC 19 VB(W) High-side Bias Voltage for W Phase MOSFET Driving 20 VS(W) High-side Bias Voltage Ground for W Phase MOSFET Driving 21 NU Negative DC-Link Input for U Phase 22 NV Negative DC-Link Input for V Phase 23 NW Negative DC-Link Input for W Phase 24 U Output for U Phase 25 V Output for V Phase 26 W Output for W Phase 27 P Positive DC-Link Input 3 FCBS0550 Rev. A www.fairchildsemi.com FCBS0550 Smart Power Module (SPM) Internal Equivalent Circuit and Input/Output Pins (19) VB(W) (18) VCC(WH) (17) IN(WH) (20) VS(W) (15) VB(V) (14) VCC(VH) (13) IN(VH) (16) VS(V) (11) VB(U) (10) VCC(UH) (9) IN(UH) (12) VS(U) (8) CSC (7) CFOD (6) VFO (5) IN(WL) (4) IN(VL) (3) IN(UL) P (27) VB VCC COM IN OUT VS W (26) VB VCC COM IN OUT VS V (25) VB VCC COM IN OUT VS U (24) C(SC) OUT(WL) C(FOD) NW (23) VFO IN(WL) OUT(VL) IN(VL) NV (22) IN(UL) (2) COM COM (1) VCC(L) VCC OUT(UL) VSL NU (21) Note: 1. Inverter low-side is composed of three MOSFETs, and one control IC. It has gate driving and protection functions. 2. Inverter power side is composed of four inverter dc-link input terminals and three inverter output terminals. 3. Inverter high-side is composed of three MOSFETs and three drive ICs for each MOSFET. Figure 3. 4 FCBS0550 Rev. A www.fairchildsemi.com Unless Otherwise Specified) Inverter Part Symbol VPN VPN(Surge) VDSS Parameter Conditions Supply Voltage Applied between P- NU, NV, NW Supply Voltage (Surge) Applied between P- NU, NV, NW Rating Units 400 V Drain-Source Voltage 450 V 500 V ID Each MOSFET Drain Current TC = 25C, Peak Sinusoidal Current 5 A IDP Each MOSFET Drain Current (Peak) TC = 25C, Under 1ms Pulse Width 7 A PC Collector Dissipation TC = 25C per One Chip TJ Operating Junction Temperature (Note 1) 25 W -20 ~ 125 C Note: 1. The maximum junction temperature rating of the power chips integrated within the SPM is 150 C(@TC 100C). However, to insure safe operation of the SPM, the average junction temperature should be limited to TJ(ave) 125C (@TC 100C) Control Part Symbol Parameter Conditions VCC Control Supply Voltage VBS High-side Control Bias Volt- Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) age VS(W) VIN Input Signal Voltage Applied between IN(UH), IN(VH), IN(WH), IN(UL), IN(VL), IN(WL) - COM VFO Fault Output Supply Voltage Applied between VFO - COM IFO Fault Output Current Sink Current at VFO Pin VSC Current Sensing Input Voltage Applied between CSC - COM Rating Units 20 V 20 V -0.3~17 V Applied between VCC(UH), VCC(VH), VCC(WH), VCC(L) COM -0.3~VCC+0.3 V 5 mA -0.3~VCC+0.3 V Total System Symbol Conditions Rating Units TSC Short Circuit Withstanding Time Parameter VCC = VBS = 13.5 ~ 16.5V, TJ =125C, Nonrepetitive, VPN=400V, RShunt=0m 10 s TC Module Case Operation Temperature -20C TJ 125C, See Figure 2 -20 ~ 100 C TSTG Storage Temperature VISO Isolation Voltage -40 ~ 125 C 2500 Vrms 60Hz, Sinusoidal, AC 1 minute, Connection Pins to ceramic substrate Thermal Resistance Symbol Rth(j-c) Parameter Conditions Min. Typ. Max. Junction to Case Thermal Inverter MOSFET part (per 1/6 module) Resistance - - 4 Units C/W Note: 2. For the measurement point of case temperature(TC), please refer to Figure 2. Package Marking and Ordering Information Device Marking Device Package Reel Size Tape Width Quantity FCBS0550 FCBS0550 SPM27BA - - 10 5 FCBS0550 Rev. A www.fairchildsemi.com FCBS0550 Smart Power Module (SPM) Absolute Maximum Ratings (TJ = 25C, Inverter Part Symbol Parameter Conditions Min. Typ. Max. Units On VCC = VBS = 15V VIN = 5V ID =2.5A, TJ = 25C - 1.35 1.75 Drain-Source Diode For- VCC = VBS = 15V ward Voltage VIN = 0V ID =2.5A, TJ = 25C - - 1.20 V - 0.51 - s - 0.16 - s - 0.72 - s tC(OFF) - 0.10 - s trr - 0.16 - s RDS(ON) VSD HS tON Static Drain-Source Resistance Switching Times VPN = 300V, VCC = VBS = 15V ID = 2.5A VIN = 0V 5V, Inductive Load (Note 3) tC(ON) tOFF LS VPN = 300V, VCC = VBS = 15V ID = 2.5A VIN = 0V 5V, Inductive Load (Note 3) tON tC(ON) tOFF tC(OFF) trr Drain - Source Leakage Current IDSS VDS = VDSS - 0.52 - s - 0.18 - s - 0.74 - s - 0.10 - s - 0.16 - s - - 250 A Note: 3. tON and tOFF include the propagation delay time of the internal drive IC. tC(ON) and tC(OFF) are the switching time of IGBT itself under the given gate driving condition internally. For the detailed information, please see Figure 4. Irr 100% of ID 100% of ID VDS ID 90% of ID 10% of VDS ID 10% of ID 10% of ID VDS VIN 10% of VDS VIN tON trr tC(OFF) tC(ON) tOFF (a) Turn-on (b) Turn-off Figure 4. Switching Time Definition 6 FCBS0550 Rev. A www.fairchildsemi.com FCBS0550 Smart Power Module (SPM) Electrical Characteristics (TJ = 25C, Unless Otherwise Specified) Control Part Symbol Parameter IQCCL Quiescent VCC Supply Current IQCCH Conditions Min. Typ. Max. Units VCC = 15V IN(UL, VL, WL) = 0V VCC(L) - COM - - 23 mA VCC = 15V IN(UH, VH, WH) = 0V VCC(UH), VCC(VH), VCC(WH) - COM - - 100 A VB(U) - VS(U), VB(V) -VS(V), VB(W) - VS(W) - - 500 A 4.5 - - V IQBS Quiescent VBS Supply Current VBS = 15V IN(UH, VH, WH) = 0V VFOH Fault Output Voltage VSC = 0V, VFO Circuit: 4.7k to 5V Pull-up - - 0.8 V VSC(ref) Short Circuit Trip Level VCC = 15V (Note 4) 0.45 0.5 0.55 V UVCCD Supply Circuit UnderVoltage Protection Detection Level 10.7 11.9 13.0 V Reset Level 11.2 12.4 13.2 V VSC = 1V, VFO Circuit: 4.7k to 5V Pull-up VFOL UVCCR UVBSD Detection Level 10.1 11.3 12.5 V UVBSR Reset Level 10.5 11.7 12.9 V tFOD Fault-out Pulse Width CFOD = 33nF (Note 5) 1.0 1.8 - ms VIN(ON) ON Threshold Voltage 2.9 - - V VIN(OFF) OFF Threshold Voltage Applied between IN(UH), IN(VH), IN(WH), IN(UL), IN(VL), IN(WL) - COM - - 0.8 V Note: 4. Short-circuit current protection is functioning only at the low-sides. 5. The fault-out pulse width tFOD depends on the capacitance value of CFOD according to the following approximate equation : CFOD = 18.3 x 10-6 x tFOD[F] Recommended Operating Conditions Symbol Parameter Conditions Value Min. Typ. Max. Units VPN Supply Voltage Applied between P - NU, NV, NW - 300 400 V VCC Control Supply Voltage Applied between VCC(UH), VCC(VH), VCC(WH), VCC(L) - COM 13.5 15 16.5 V VBS High-side Bias Voltage Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) - VS(W) 13.0 15 18.5 V dVCC/dt, dVBS/dt Control supply variation -1 - 1 V/s tdead Blanking Time for Preventing For Each Input Signal Arm-short 2 - - s fPWM PWM Input Signal -20C TC 100C, -20C TJ 125C - - 20 kHz VSEN Voltage for Current Sensing Applied between NU, NV, NW - COM (Including surge voltage) -4 4 V 7 FCBS0550 Rev. A www.fairchildsemi.com FCBS0550 Smart Power Module (SPM) Electrical Characteristics (TJ = 25C, Unless Otherwise Specified) Parameter Mounting Torque Device Flatness Limits Conditions Mounting Screw: - M3 Recommended 0.62N*m Note Fig. 5 Weight Units Min. Typ. Max. 0.51 0.62 0.72 N*m 0 - +120 m - 15.4 - g (+) (+) Figure 5. Flatness Measurement Position 8 FCBS0550 Rev. A www.fairchildsemi.com FCBS0550 Smart Power Module (SPM) Mechanical Characteristics and Ratings FCBS0550 Smart Power Module (SPM) Time Charts of SPMs Protective Function Low-Side Input Signal Protection Circuit State RESET SET RESET UVCCR Low-Side Control Supply Voltage a1 a6 UVCCD a3 a2 a7 a4 Low-Side Output Current a5 Fault Output Signal a1 : Control supply voltage rises: After the voltage rises UVCCR, the circuits start to operate when next input is applied. a2 : Normal operation: MOSFET ON and carrying current. a3 : Under voltage detection (UVCCD). a4 : MOSFET OFF in spite of control input condition. a5 : Fault output operation starts. a6 : Under voltage reset (UVCCR). a7 : Normal operation: MOSFET ON and carrying current. Figure 6. Under-Voltage Protection (Low-side) High-Side Input Signal Protection Circuit State RESET SET RESET UVBSR b5 b1 High-Side Control Supply Voltage UVBSD b3 b6 b2 b4 High-Side Output Current Fault Output Signal High-level (no fault output) b1 : Control supply voltage rises: After the voltage reaches UVBSR, the circuits start to operate when next input is applied. b2 : Normal operation: MOSFET ON and carrying current. b3 : Under voltage detection (UVBSD). b4 : MOSFET OFF in spite of control input condition, but there is no fault output signal. b5 : Under voltage reset (UVBSR) b6 : Normal operation: MOSFET ON and carrying current Figure 7. Under-Voltage Protection (High-side) 9 FCBS0550 Rev. A www.fairchildsemi.com c6 Protection circuit state SET FCBS0550 Smart Power Module (SPM) Low-Side input Signal c7 RESET c4 c3 Low-Side Internal IGBT Gate-Emitter Voltage c2 SC c1 Low-Side Output Current c8 Sensing Voltage of the shunt resistance SC Reference Voltage Fault Output Signal c5 CR circuit time constant delay (with the external shunt resistance and CR connection) c1 : Normal operation: MOSFET ON and carrying current. c2 : Short circuit current detection (SC trigger). c3 : Hard MOSFET gate interrupt. c4 : MOSFET turns OFF. c5 : Fault output timer operation starts: The pulse width of the fault output signal is set by the external capacitor CFO. c6 : Input "L" : MOSFET OFF state. c7 : Input "H": MOSFET ON state, but during the active period of fault output the MOSFET doesn't turn ON. c8 : MOSFET OFF state Figure 8. Short-Circuit Current Protection (Low-side Operation only) 10 FCBS0550 Rev. A www.fairchildsemi.com FCBS0550 Smart Power Module (SPM) 5V-Line R PF = SPM 4.7k IN (UH) , IN (VH) , IN(W H) IN (UL) , IN (VL) , IN (W L) CPU 100 1nF VFO C PF = 1nF CO M Note: 1. RC coupling at each input (parts shown dotted) might change depending on the PWM control scheme used in the application and the wiring impedance of the application's printed circuit board. The SPM input signal section integrates 3.3k (typ.) pull-down resistor. Therefore, when using an external filtering resistor, please pay attention to the signal voltage drop at input terminal. 2. The logic input is compatible with standard CMOS or LSTTL outputs. Figure 9. Recommended CPU I/O Interface Circuit These Values depend on PWM Control Algorithm 15V-Line RE(H) RBS DBS One-Leg Diagram of SPM P 22uF 0.1uF Vcc VB IN HO COM VS Inverter Output Vcc 1000uF 1uF IN OUT COM VSL N Note: 1. It would be recommended that the bootstrap diode, DBS, has soft and fast recovery characteristics. 2. The bootstrap resistor (RBS) should be 3 times greater than RE(H). The recommended value of RE(H) is 5.6, but it can be increased up to 20 (maximum) for a slower dv/dt of high-side. 3. The ceramic capacitor placed between VCC-COM should be over 1uF and mounted as close to the pins of the SPM as possible. Fig. 10. Recommended Bootstrap Operation Circuit and Parameters 11 FCBS0550 Rev. A www.fairchildsemi.com 15V line R E(UH) R BS D BS (19) V B(W ) (18) V CC(W H) C BS Gating W H C BSC (17) IN (W H) (20) V S(W ) R BS D BS (15) V B(V) (14) V CC(VH) C BS Gating VH C BSC (13) IN (VH) (16) V S(V) C P U R BS D BS (11) V B(U) (10) V CC(UH) C BS Gating UH C BSC (9) IN (UH) (12) V S(U) P (27) VB VCC OUT COM IN W (26) VS VB VCC OUT COM IN VS V (25) M VB VCC C DCS OUT COM IN Vdc U (24) VS RF 5V line (8) C SC C SC RS R PF (7) C FOD C FOD Fault (6) V FO (5) IN (W L) Gating W L (4) IN (VL) Gating VL (3) IN (UL) Gating UL C(SC) OUT(W L) C(FOD) N W (23) R SW VFO IN(W L) OUT(VL) IN(VL) N V (22) R SV IN(UL) (2) COM C BPF COM C PF (1) V CC(L) C SP15 OUT(UL) VCC V SL N U (21) R SU C SPC15 Input Signal for ShortCircuit Protection R FW W-Phase Current V-Phase Current U-Phase Current R FV R FU C FW C FV C FU Note: 1. To avoid malfunction, the wiring of each input should be as short as possible. (less than 2-3cm) 2. By virtue of integrating an application specific type HVIC inside the SPM, direct coupling to CPU terminals without any opto-coupler or transformer isolation is possible. 3. VFO output is open collector type. This signal line should be pulled up to the positive side of the 5V power supply with approximately 4.7k resistance. Please refer to Figure 9. 4. CSP15 of around 7 times larger than bootstrap capacitor CBS is recommended. 5. VFO output pulse width should be determined by connecting an external capacitor(CFOD) between CFOD(pin7) and COM(pin2). (Example : if CFOD = 33 nF, then tFO = 1.8ms (typ.)) Please refer to the note 5 for calculation method. 6. Input signal is High-Active type. There is a 3.3k resistor inside the IC to pull down each input signal line to GND. When employing RC coupling circuits, set up such RC couple that input signal agree with turn-off/turn-on threshold voltage. 7. To prevent errors of the protection function, the wiring around RF and CSC should be as short as possible. 8. In the short-circuit protection circuit, please select the RFCSC time constant in the range 1.5~2 s. 9. Each capacitor should be mounted as close to the pins of the SPM as possible. 10. To prevent surge destruction, the wiring between the smoothing capacitor and the P&COM pins should be as short as possible. The use of a high frequency non-inductive capacitor of around 0.1~0.22F between the P&COM pins is recommended. 11. Relays are used at almost every systems of electrical equipments of home appliances. In these cases, there should be sufficient distance between the CPU and the relays. 12. CSPC15 should be over 1F and mounted as close to the pins of the SPM as possible. Fig. 11. Typical Application Circuit 12 FCBS0550 Rev. A www.fairchildsemi.com FCBS0550 Smart Power Module (SPM) R E(W H) R E(VH) FCBS0550 Smart Power Module (SPM) Detailed Package Outline Drawings 13 FCBS0550 Rev. A www.fairchildsemi.com FCBS0550 Smart Power Module (SPM) Detailed Package Outline Drawings (Continued) 14 FCBS0550 Rev. A www.fairchildsemi.com FCBS0550 Smart Power Module (SPM) Detailed Package Outline Drawings (Continued) 15 FCBS0550 Rev. A www.fairchildsemi.com The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM ActiveArrayTM BottomlessTM CoolFETTM CROSSVOLTTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM FAST(R) FASTrTM FPSTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM I2CTM i-LoTM ImpliedDisconnectTM Across the board. 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LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I15 16 FCBS0550 Rev. A www.fairchildsemi.com FCBS0550 Smart Power Module (SPM) TRADEMARKS