2014 Microchip Technology Inc. 60001234B-page 1
Highlights
• High performance, low-power, small footprint hub
controller IC with 4 downstream ports
• Fully compliant with the USB 2.0 specification
• Enhanced OEM configuration options available
through either a single serial I2C™ EEPROM or
SMBus Slave Port
• MultiTRAK™ Technology
- High-performance multiple Transaction
Translator which provides one Transaction
Translator per port
•PortMap
- Flexible port mapping and port disable
sequencing
•PortSwap
- Programmable USB differential-pair pin loca-
tions ease PCB design by aligning USB sig-
nal traces directly to connectors
• PHYBoost
- Programmable USB transceiver drive
strength for recovering signal integrity due to
compromised system environment
• AEC-Q100 compliant
- Microchip’s parts are tested to meet or
exceed the requirements of the AEC-Q100
automotive qualification standards
Target Applications
• Automotive head unit
• Automotive breakout box
• Automotive media player dock
• Portable device charging via USB
• Rear seat infotainment access
Key Benefits
• Over 30 port configuration options
• Full power management with individual or ganged
power control of each downstream port
• Integrated 1.8 V core regulator
• Fully integrated USB termination and pull-up/pull-
down resistors
• On-board 24 MHz crystal driver, resonator, or
external 24 MHz clock input
• Customizable vendor ID, product ID, and device
ID
• Easily configurable as a 2, 3 or 4-Port Hub in
common PCB layout
• 36-pin (6x6 mm2) QFN, RoHS compliant package
- Also available as dimple package
• Temperature range: -40ºC to +85ºC
USB82514
Automotive Grade USB 2.0 Hi-Speed 4-Port Hub
USB82514
60001234B-page 2 2014 Microchip Technology Inc.
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2014 Microchip Technology Inc. 60001234B-page 3
USB82514
Table of Contents
1.0 Introduction ..................................................................................................................................................................................... 4
2.0 Acronyms ........................................................................................................................................................................................ 6
3.0 Pin Configuration ............................................................................................................................................................................ 7
4.0 Pin Table ......................................................................................................................................................................................... 8
5.0 Block Diagram ................................................................................................................................................................................. 9
6.0 Pin Descriptions ............................................................................................................................................................................ 10
7.0 Configuration Options ................................................................................................................................................................... 15
8.0 DC Parameters ............................................................................................................................................................................. 39
9.0 AC Specifications .......................................................................................................................................................................... 44
10.0 Package Outline .......................................................................................................................................................................... 45
Appendix A: Data Sheet Revision History ........................................................................................................................................... 47
The Microchip Web Site ...................................................................................................................................................................... 49
Customer Change Notification Service ............................................................................................................................................... 49
Customer Support ............................................................................................................................................................................... 49
Product Identification System ............................................................................................................................................................. 50
USB82514
60001234B-page 4 2014 Microchip Technology Inc.
1.0 INTRODUCTION
The Microchip Automotive Grade USB 2.0 4-Port Hub is a low-power, OEM configurable, MTT (Multi- Transaction Trans-
lator) hub controller IC with 4 downstream ports for embedded USB solutions. It is designed, fabricated, tested, charac-
terized and qualified for automotive applications. The 4-port hub is fully compliant with the USB 2.0 Specification. The
USB82514 will attach to an upstream port as a full-speed hub or as a full-/hi-speed hub. The 4-port hub supports low-
speed, full-speed, and hi-speed (if operating as a hi-speed hub) downstream devices on all of the enabled downstream
ports.
All required resistors on the USB ports are integrated into the hub. This includes all series termination resistors on D+
and D- pins and all required pull-down and pull-up resistors on D+ and D- pins. The over-current sense inputs for the
downstream facing ports have internal pull-up resistors.
The USB82514 includes over 30 programmable features including:
MultiTRAK™ Technology which utilizes a dedicated TT per port to maintain consistent full-speed data throughput
regardless of the number of active downstream connections. MultiTRAK outperforms conventional USB 2.0 hubs with
a single TT in USB full-speed data transfers.
PortMap which provides flexible port mapping and disable sequences. The down-
stream ports of a USB82514 hub can be reordered or disabled in any sequence to
support multiple platform designs with minimum effort. For any port that is disabled,
the USB82514 automatically reorders the remaining ports to match the USB host
controller’s port numbering scheme.
PortSwap which adds per-port programmability to USB differential-pair pin loca-
tions. PortSwap allows direct alignment of USB signals (D+/D-) to connectors avoid-
ing uneven trace length or crossing of the USB differential signals on the PCB.
PHYBoost which enables four programmable levels of USB signal drive strength in
downstream port transceivers. PHYBoost attempts to restore USB signal integrity
that has been compromised by system level variables such as poor PCB layout, long
cables, etc. The boost graphic shows an example of hi-speed USB eye diagrams
before (PHYBoost at 0%) and after (PHYBoost at 12%) signal integrity restoration in
a compromised system environment.
The USB82514 is specifically tailored for use in automotive applications requiring
automotive grade robustness starting with the comprehension of proprietary design for reliability techniques within the
silicon IC itself as well as for the package design. Automotive qualified technologies and processes are used to fabricate
the products with enhanced monitors to continuously drive improvements in accordance with our zero-dpm methodol-
ogy. Product qualification is focused on customer expectations and exceeds many of the automotive reliability standards
including AEC-Q100.
Microchip automotive services are provided during the life of the product from a dedicated organization composed of
operations, quality, and product support personnel specialized in meeting the requirements of the automotive customer.
Card Reader
L1
L2
L3
L4
2014 Microchip Technology Inc. 60001234B-page 5
USB82514
1.1 OEM Selectable Features
A default configuration is available in the USB82514 following a reset. This configuration may be sufficient for some
applications. Strapping option pins make it possible to modify a limited sub-set of the configuration options.
The USB82514 may also be configured by an external EEPROM or a microcontroller. When using the microcontroller
interface, the hub appears as an SMBus slave device. If the hub is pin-strapped for external EEPROM configuration but
no external EEPROM is present, then a value of ‘0’ will be written to all configuration data bit fields (the hub will attach
to the host with all ‘0’ values).
The USB82514 supports several OEM selectable features:
• Optional OEM configuration via I2C EEPROM or via the industry standard SMBus interface from an external
SMBus host or microcontroller, see Table 7-1, "Hub Configuration Options" to configure the serial port interface
behavior via the CFG_SEL1 and CFG_SEL0 pins.
• Compound device support (port is permanently hardwired to a downstream USB peripheral device), on a port-by-
port basis, see "Register 07h: Configuration Data Byte 2", bit COMPOUND.
• Select Single-Transaction Translator (STT) or Multi-Transaction Translator (MTT), see "Register 06h: Configura-
tion Data Byte 1", bit MTT_ENABLE.
• Select over-current sensing and port power control on an individual (port-by-port) or ganged (all ports together)
basis to match the OEM’s choice of circuit board component selection, see "Register 06h: Configuration Data Byte
1", bits CURRENT_SNS and PORT_PWR.
• Customize vendor ID, product ID, and device ID, see "Register 00h: Vendor ID (LSB)", "Register 01h: Vendor ID
(MSB)", "Register 02h: Product ID (LSB)", "Register 03h: Product ID (MSB)", "Register 04h: Device ID (LSB)" and
"Register 05h: Device ID (MSB)".
• Easily configure as a 2, 3 or 4-Port Hub in common PCB layout, see "Register 0Ah: Port Disable for Self-Powered
Operation" and "Register 0Bh: Port Disable for Bus-Powered Operation".
• PortMap: Flexible port mapping and disable sequence. Ports can be disabled/reordered in any sequence to sup-
port multiple platforms with a single design. The hub will automatically reorder the remaining ports to match the
host controller's numbering scheme, see "Register FBh: PortMap 12" and "Register FCh: PortMap 34".
• PortSwap: Programmable USB differential-pair pin location.
- Eases PCB layout by aligning USB signal lines directly to connectors, see "Register FAh: PortSwap".
• PhyBoost: Programmable USB signal drive strength. Recover USB signal integrity due to compromised system
environments using 4 levels of signal drive strength, see "Register F6h: Boost_Up" and "Register F8h: Boost_4:0".
• Configure the delay time for filtering the over-current sense inputs, see "Register 07h: Configuration Data Byte 2",
bit OC_TIMER.
• Configure the downstream port power-on time reported to the host, see "Register 10h: Power-On Time".
• Indicate the maximum current that the 4-port hub consumes from the USB upstream port, see "Register 0Eh: Hub
Controller Max Current for Self-Powered Operation" and "Register 0Fh: Hub Controller Max Current for Bus-Pow-
ered Operation".
• Indicate the maximum current required for the hub controller, see "Register 0Ch: Max Power for Self-Powered
Operation" and "Register 0Dh: Max Power for Bus-Powered Operation".
• Support custom string descriptor up to 31 characters in length for:
- Manufacturer string, see "Register 16h-53h: Manufacturer String".
- Product string, see "Register 54h-91h: Product String".
- Serial number string, see "Register 92h-CFh: Serial String".
• Pin selectable options for default configuration:
- Downstream ports as non-removable ports, see "Register 09h: Non-Removable Device".
- Downstream ports as disabled ports, see "Register 0Ah: Port Disable for Self-Powered Operation" and "Reg-
ister 0Bh: Port Disable for Bus-Powered Operation".
USB82514
60001234B-page 6 2014 Microchip Technology Inc.
2.0 ACRONYMS
The following is a list of the general terms used throughout this document:
TABLE 2-1: ACRONYMS
Acronym Description
ACK Handshake packet indicating a positive acknowledgment
EOF End of (micro) Frame
EOP End of Packet
I2CTM Inter-Integrated Circuit, I2CTM is a trademark of Philips Corporation
MTT Multi-Transaction Translator
OCS Over-current Sense
PCB Printed Circuit Board
PHY Physical Layer
PLL Phase-Locked Loop
QFN Quad Flat No Leads
RoHS Restriction of Hazardous Substances directive
SMBus System Management Bus
STT Single-Transaction Translator
TT Transaction Translator
2014 Microchip Technology Inc. 60001234B-page 7
USB82514
3.0 PIN CONFIGURATION
The package designators are:
• x - Kind of package (refer to Section , "Product Identification System," on page 50)
• lll - Lot Sequence Code
• r - Chip Revision Number
• yy - last two digits of Assembly Year
• ww - Assembly Work Week
• tttttttttttt - Tracking Number (up to 12 characters)
• cc - Country of Original Abbreviation (Optional - up to 2 characters)
FIGURE 3-1: USB82514 36-PIN QFN (TOP VIEW)
USB82514Ax
lllryyww
tttttttttttt
cc
Indicates pins on the bottom of the device.
VDDA33
1USBDN1_DM/PRT_DIS_M1
2USBDN1_DP/PRT_DIS_P1
3USBDN2_DM/PRT_DIS_M2
4USBDN2_DP/PRT_DIS_P2
5
USBDN3_DM/PRT_DIS_M3 6
USBDN3_DP/PRT_DIS_P3 7
USBDN4_DM/PRT_DIS_M4 8
USBDN4_DP/PRT_DIS_P4 9
SDA/SMBDATA/NON_REM1
26
VDD33
25
RESET_N
24
HS_IND/CFG_SEL1
23
SCL/SMBCLK/CFG_SEL0
22
21 OCS4_N
20 PRTPWR4
19
VBUS_DET
27
OCS3_N
18 PRTPWR3
17 OCS2_N
16 PRTPWR2
15
OCS1_N
14
VDD33
13
VDD18
12 PRTPWR1
11 TEST
10 VDDA33
SUSP_IND/LOCAL_PWR/NON_REM0 28
VDDA33 29
USBUP_DP 31
XTAL2 32
XTAL1/CLKIN 33
RBIAS
36VDD33PLL
35
VDD18PLL 34
USBUP_DM 30
Ground Pad
(must be connected
to VSS)
USB82514
60001234B-page 8 2014 Microchip Technology Inc.
4.0 PIN TABLE
TABLE 4-1: USB82514 36-PIN TABLE
Upstream USB Interfaces (3 Pins)
USBUP_DP USBUP_DM VBUS_DET
Downstream USB 2.0 Interfaces (17 Pins)
USBDN1_DP/
PRT_DIS_P1
USBDN2_DP/
PRT_DIS_P2
USBDN3_DP/
PRT_DIS_P3
USBDN4_DP/
PRT_DIS_P4
USBDN1_DM/
PRT_DIS_M1
USBDN2_DM/
PRT_DIS_M2
USBDN3_DM/
PRT_DIS_M3
USBDN4_DM/
PRT_DIS_M4
PRTPWR1 PRTPWR2 PRTPWR3 PRTPWR4
OCS1_N OCS2_N OCS3_N OCS4_N
RBIAS
Serial Port Interfaces (3 Pins)
SDA/
SMBDATA/
NON_REM1
SCL/
SMBCLK/
CFG_SEL0
HS_IND/
CFG_SEL1
Misc (5 Pins)
XTAL1/CLKIN XTAL2 RESET_N SUSP_IND/
LOCAL_PWR/
NON_REM0
TEST
Analog / Digital Power (8 Pins)
(2) VDD33 (3) VDDA33 VDD18 VDD18PLL
VDD33PLL
Total 36 Pins
2014 Microchip Technology Inc. 60001234B-page 9
USB82514
5.0 BLOCK DIAGRAM
.
FIGURE 5-1: USB82514 BLOCK DIAGRAM
To Upstream
VBUS
3.3 V
Upstream
PHY
Upstream USB
Data
Repeater Controller
Serial
Interface
Engine
Serial
Interface
To EEPROM or
SMBus Master
SCL
SDA
TT #4 Port
Controller
PHY#1
Port #1
OC
Sense
&
Switch
Driver
USB Data
Downstream
OC
Sense
Switch
Bus-Power
Detect
1.8 V
TT #3TT #2
PHY#2
Port #2
OC
Sense
&
Switch
Driver
PHY#4
Port #4
OC
Sense
&
Switch
Driver
TT #1
PHY#3
Port #3
OC
Sense
&
Switch
Driver
USB Data
Downstream
OC
Sense
Switch
USB Data
Downstream
OC
Sense
Switch
USB Data
Downstream
OC
Sense
Switch
Port
Power
Port
Power
3.3 V
PLL
24 MHz
Crystal
Routing & Port Re-Ordering Logic
1.8 V Reg
1.8 V Reg
VDDA
VDDCR
Port
Power
Port
Power
USB82514
60001234B-page 10 2014 Microchip Technology Inc.
6.0 PIN DESCRIPTIONS
This section provides a detailed description of each signal. The signals are arranged in functional groups according to
their associated interface.
The “N” symbol in the signal name indicates that the active, or asserted, state occurs when the signal is at a low voltage
level. When “N” is not present after the signal name, the signal is asserted when at the high voltage level.
The terms assertion and negation are used exclusively. This is done to avoid confusion when working with a mixture of
“active low” and “active high” signals. The term assert, or assertion, indicates that a signal is active, independent of
whether that level is represented by a high or low voltage. The term negate, or negation, indicates that a signal is inac-
tive.
TABLE 6-1: USB82514 PIN DESCRIPTIONS
Symbol 36 QFN Buffer
Type Description
UPSTREAM USB INTERFACES
USBUP_DP
USBUP_DM
31
30
IO-U USB Bus Data
These pins connect to the upstream USB bus data signals (host port or
upstream hub).
VBUS_DET 27 I Detect Upstream VBUS Power
Detects state of upstream VBUS power. The Microchip hub monitors
VBUS_DET to determine when to assert the internal D+ pull-up resis-
tor (signaling a connect event).
When designing a detachable hub, this pin must be connected to the
VBUS on the upstream port via a 2 to 1 voltage divider.
For self-powered applications with a permanently attached host, this
pin must be connected to 3.3 V (typically VDD33).
DOWNSTREAM USB 2.0 INTERFACE
USBDN[4:1]_DP/
PRT_DIS_P[4:1]
&
USBDN[4:1]_DM/
PRT_DIS_M[4:1]
9
7
4
2
IO-U Hi-Speed USB Data
These pins connect to the downstream USB peripheral devices
attached to the hub’s port.
8
6
3
1
Downstream Port Disable Strap Option
If this strap is enabled by package and configuration settings (see
Table 7-1, "Hub Configuration Options"), this pin will be sampled at
RESET_N negation to determine if the port is disabled.
Both USB data pins for the corresponding port must be tied to the
VDDA33 to disable the associated downstream port.
PRTPWR[4:1] 20
18
16
12
O12 USB Port Power Enable
Enables power to downstream USB peripheral devices.
Note: The hub will only support active high power controllers.
2014 Microchip Technology Inc. 60001234B-page 11
USB82514
OCS_N[4:1] 21
19
17
13
IPU Over-current Sense
Input from external current monitor indicating an over-current condition.
RBIAS 35 I-R USB Transceiver Bias
A 12.0 kΩ (+/- 1%) resistor is attached from ground to this pin to set the
transceiver’s internal bias settings.
SERIAL PORT INTERFACE
SDA/
SMBDATA/
NON_REM1
22 I/OSD12 Serial Data
SMB Data
NON_REM1: Non-removable port strap option.
If this strap is enabled by package and configuration settings (see
Table 7-1, "Hub Configuration Options"), this pin will be sampled (in
conjunction with SUSP_IND/LOCAL_PWR/NON_REM0) at RESET_N
negation to determine if ports [4:1] contain permanently attached (non-
removable) devices:
NON_REM[1:0] = ‘00’, All ports are removable,
NON_REM[1:0] = ‘01’, Port 1 is non-removable,
NON_REM[1:0] = ‘10’, Ports 1 & 2 are non-removable,
NON_REM[1:0] = ‘11’, Ports 1, 2 & 3 are non-removable.
SCL/
SMBCLK/
CFG_SEL0
24 I/OSD12 Serial Clock (SCL)
SMBus Clock (SMBCLK)
Configuration Select_SEL0: The logic state of this multifunction pin is
internally latched on the rising edge of RESET_N (RESET_N negation)
and will determine the hub configuration method as described in
Table 7-1, "Hub Configuration Options".
TABLE 6-1: USB82514 PIN DESCRIPTIONS (CONTINUED)
Symbol 36 QFN Buffer
Type Description
USB82514
60001234B-page 12 2014 Microchip Technology Inc.
HS_IND/
CFG_SEL1
25 I/O12 Hi-Speed Upstream Port Indicator Configuration Programming Select
HS_IND: Hi-Speed Indicator for upstream port connection speed.
The active state of HS_IND will be determined as follows:
CFG_SEL1 = ‘0’, Configuration Programming Select
HS_IND is active high,
CFG_SEL1 = ‘1’,
HS_IND is active low,
‘Asserted’ = Hub is connected at HS
‘Negated’ = Hub is connected at FS
Note: An LED can be attached to this signal for visual indication.
CFG_SEL1: The logic state of this pin is internally latched on the rising
edge of RESET_N (RESET_N negation), and will determine the hub
configuration method as described in Table 7-1, "Hub Configuration
Options".
MISC
XTAL1/
CLKIN
33 ICLKx Crystal Input/External Clock Input
This pin connects to either one terminal of the crystal or to an external
24 MHz clock when a crystal is not used. When used with an external
clock, the signal level must comply with the ICLK buffer levels.
XTAL2 32 OCLKx Crystal Output
24 MHz Crystal
This is the other terminal of the crystal, or it is left disconnected when
an external clock source is used to drive XTAL1/CLKIN.
Note: This output must not be used to drive any external circuitry
other than the crystal circuit.
RESET_N 26 IS RESET Input
The system can reset the chip by driving this input low. The minimum
active low pulse is 1 µs after all power supply voltages are at nominal
levels.
TABLE 6-1: USB82514 PIN DESCRIPTIONS (CONTINUED)
Symbol 36 QFN Buffer
Type Description
2014 Microchip Technology Inc. 60001234B-page 13
USB82514
SUSP_IND/
LOCAL_PWR/
NON_REM0
28 I/O12 Active/Suspend Status Signal lndicator or Local-Power & Non-Remov-
able Strap Option
Suspend Indicator: Indicates USB state of the hub.
‘negated’ = Unconfigured, or configured and in USB suspend
‘asserted’ = Hub is configured, and is active (i.e., not in suspend)
Note: An LED can be attached to this signal for visual indication.
Local Power: Detects availability of local self-power source
Low = Self/local power source is NOT available (i.e., hub gets all power
from Upstream USB VBus).
High = Self/local power source is available.
NON_REM0 Strap Option:
If this strap is enabled by package and configuration settings (see
Table 7-1, "Hub Configuration Options"), this pin will be sampled (in
conjunction with NON_REM1) at RESET_N negation to determine if
ports [4:1] contain permanently attached (non-removable) devices.
Also, the active state of the signal will be determined as follows:
NON_REM[1:0] = ‘00’, All ports are removable, and the SUSP_IND sig-
nal is active high,
NON_REM[1:0] = ‘01’, Port 1 is non-removable, and the SUSP_IND
signal is active low,
NON_REM[1:0] = ‘10’, Ports 1 & 2 are non-removable, and the SUS-
P_IND signal is active high,
NON_REM[1:0] = ‘11’, Ports 1, 2 & 3 are non-removable, and the SUS-
P_IND signal is active low.
TEST 11 IPD TEST pin
Tie this pin to ground for normal operation.
POWER / GROUND
VDD18 14 VDD Core
+1.8 V core power. This pin must have a 1.0 µF (or greater) ±20%
(ESR <0.1 Ω) capacitor to VSS.
VDD33PLL 36 VDD 3.3 PLL Regulator Reference
+3.3 V power supply for the PLL.
TABLE 6-1: USB82514 PIN DESCRIPTIONS (CONTINUED)
Symbol 36 QFN Buffer
Type Description
USB82514
60001234B-page 14 2014 Microchip Technology Inc.
VDD18PLL 34 VDD PLL
+1.8 V Filtered analog power for internal PLL. This pin must have a 1.0
µF (or greater) ±20% (ESR <0.1 Ω) capacitor to VSS.
VDDA33 5
10
29
VDD Analog I/O
+3.3 V Filtered analog PHY power, shared between adjacent ports.
VDD33 23
15
VDDIO/VDD 3.3 Core Regulator Reference
+3.3 V power supply for the digital I/O. VDD33 acts as the regulator
input.
VSS VSS
Ground (The thermal slug must be connected to VSS.)
TABLE 6-2: USB82514 BUFFER TYPE DESCRIPTIONS
Buffer Description
I Input
IPD Input with internal weak pull-down resistor
IPU Input with internal weak pull-up resistor
IS Input with Schmitt trigger
O12 Output 12 mA
I/O12 Input/Output buffer with 12 mA sink and 12 mA source
I/OSD12 Open drain with Schmitt trigger 12 mA sink. Meets I2C-Bus specification version 2.1
requirements
ICLKx XTAL clock input
OCLKx XTAL clock output
I-R RBIAS
IO-U Analog input/output as defined in USB specification
TABLE 6-1: USB82514 PIN DESCRIPTIONS (CONTINUED)
Symbol 36 QFN Buffer
Type Description
2014 Microchip Technology Inc. 60001234B-page 15
USB82514
7.0 CONFIGURATION OPTIONS
7.1 4-Port Hub
Microchip’s Automotive Grade USB 2.0 4-Port Hub is fully compliant to the Universal Serial Bus Specification available
from the USB Implementer’s Forum found at http://www.usb.org/developers/docs/ (Revision 2.0 from April 27, 2000 and
the 12/7/2000 and 5/28/2002 Errata). Please refer to Chapter 11 (Hub Specification) for general details regarding hub
operation and functionality.
For performance reasons, the 4-Port Hub provides 1 Transaction Translator (TT) per port (defined as Multi-TT configu-
ration), and each TT has 1512 bytes of periodic buffer space and 272 bytes of non- periodic buffer space (divided into
4 non-periodic buffers per TT), for a total of 1784 bytes of buffer space for each Transaction Translator.
7.1.1 HUB CONFIGURATION OPTIONS
The Microchip hub supports a large number of features (some are mutually exclusive), and must be configured in order
to correctly function when attached to a USB host controller. There are three principal ways to configure the hub: SMBus,
EEPROM, or by internal default settings (with or without pin strapping option overrides). In all cases, the configuration
method will be determined by the CFG_SEL1 and CFG_SEL0 pins immediately after RESET_N negation.
If the SMBus or EEPROM is selected using the CFG_SEL pins, then the data read in from the EEPROM/SMBus will
take precedence over the pin strapping options. If the internal default setting is selected, the options come from the inter-
nal ROM. These values can be selectively overridden using the pin strapping options.
7.1.2 SMBus OR EEPROM INTERFACE
7.1.2.1 Power Switching Polarity
The hub will only support active high power controllers.
7.1.3 VBus DETECT
According to section 7.2.1 of the USB 2.0 Specification, a downstream port can never provide power to its D+ or D- pull
up resistors unless the upstream port’s VBUS is in the asserted (powered) state. The VBUS_DET pin on the hub mon-
itors the state of the upstream VBUS signal and will not pull up the D+ resistor if VBUS is not active. If VBUS goes from
an active to an inactive state (not powered), the hub will remove power from the D+ pull-up resistor within 10 seconds.
TABLE 7-1: HUB CONFIGURATION OPTIONS
CFG_SEL1 CFG_SEL0 SMBUS OR EEPROM INTERFACE BEHAVIOR
0 0 Internal default configuration
• Strap options enabled
• Self-powered operation enabled
0 1 Configured as an SMBus slave for external download of user-
defined descriptors.
• SMBus slave address 58 (0101100x)
• Strap options disabled
• All settings controlled by registers
1 0 Internal default configuration
• Strap options enabled
• Bus power operation
112-Wire I2C EEPROMS are supported
• Strap options disabled
• All settings controlled by registers
USB82514
60001234B-page 16 2014 Microchip Technology Inc.
7.2 EEPROM Interface
The Microchip hub can be configured via a 2-wire (I2C) EEPROM (256x8). (Please see Table 7-1, "Hub Configuration
Options" for specific details on how to enable configuration via an I2C EEPROM).
When configured for EEPROM support, the internal state machine will read the external EEPROM for configuration
data. The hub will then “attach” to the upstream USB host.
Each register has R/W capability. SMBUS and EEPROM Reset Values are 0x00. Reserved registers should be written
to ‘0’ unless otherwise specified.
7.2.1 INTERNAL REGISTER SET (COMMON TO EEPROM AND SMBus)
Note: The hub does not have the capacity to write, or “Program,” an external EEPROM. The hub only has the
capability to read external EEPROMs. The external EEPROM will be read (even if it is blank or non-popu-
lated), and the hub will be “configured” with the values that are read.
Reg Addr Register Name Internal
Default ROM
00h Vendor ID (LSB) 24h
01h Vendor ID (MSB) 04h
02h Product ID (LSB) 14h
03h Product ID (MSB) 25h
04h Device ID (LSB) A0h
05h Device ID (MSB) 80h
06h Configuration Data Byte 1 9Bh
07h Configuration Data Byte 2 20h
08h Configuration Data Byte 3 02h
09h Non-Removable Device 00h
0Ah Port Disable for Self-Powered Operation 00h
0Bh Port Disable for Bus-Powered Operation 00h
0Ch Max Power for Self-Powered Operation 01h
0Dh Max Power for Bus-Powered Operation 32h
0Eh Hub Controller Max Current for Self-Powered Operation 01h
0Fh Hub Controller Max Current for Bus-Powered Operation 32h
10h Power-on Time 32h
11h Language ID High 00h
12h Language ID Low 00h
13h Manufacturer String Length 00h
14h Product String Length 00h
15h Serial String Length 00h
16h-53h Manufacturer String 00h
54h-91h Product String 00h
2014 Microchip Technology Inc. 60001234B-page 17
USB82514
7.2.1.1 Register 00h: Vendor ID (LSB)
7.2.1.2 Register 01h: Vendor ID (MSB)
7.2.1.3 Register 02h: Product ID (LSB)
92h-Cfh Serial String 00h
D0h-F5h Reserved 00h
F6h Boost_Up 00h
F7h Reserved 00h
F8h Boost_4:0 00h
F9h Reserved 00h
FAh PortSwap 00h
FBh PortMap 12 00h
FCh PortMap 34 00h
FDh Reserved 00h
FFh Status/Command
Note: SMBus register only
00h
Bit
Number Bit Name Description
7:0 VID_LSB Least Significant Byte of the Vendor ID: This is a 16-bit value that uniquely
identifies the Vendor of the user device (assigned by USB-Interface Forum).
This field is set by the OEM using either the SMBus or EEPROM interface
options.
Bit
Number Bit Name Description
7:0 VID_MSB Most Significant Byte of the Vendor ID: This is a 16-bit value that uniquely iden-
tifies the Vendor of the user device (assigned by USB-Interface Forum). This
field is set by the OEM using either the SMBus or EEPROM interface options.
Bit
Number Bit Name Description
7:0 PID_LSB Least Significant Byte of the Product ID: This is a 16-bit value that the Vendor
can assign that uniquely identifies this particular product (assigned by OEM).
This field is set by the OEM using either the SMBus or EEPROM interface
options.
Reg Addr Register Name Internal
Default ROM
USB82514
60001234B-page 18 2014 Microchip Technology Inc.
7.2.1.4 Register 03h: Product ID (MSB)
7.2.1.5 Register 04h: Device ID (LSB)
7.2.1.6 Register 05h: Device ID (MSB)
Bit
Number Bit Name Description
7:0 PID_MSB Most Significant Byte of the Product ID: This is a 16-bit value that the Vendor
can assign that uniquely identifies this particular product (assigned by OEM).
This field is set by the OEM using either the SMBus or EEPROM interface
options.
Bit
Number Bit Name Description
7:0 DID_LSB Least Significant Byte of the Device ID: This is a 16-bit device release number
in BCD format (assigned by OEM). This field is set by the OEM using either
the SMBus or EEPROM interface options.
Bit
Number Bit Name Description
7:0 DID_MSB Most Significant Byte of the Device ID: This is a 16-bit device release number
in BCD format (assigned by OEM). This field is set by the OEM using either
the SMBus or EEPROM interface options.
2014 Microchip Technology Inc. 60001234B-page 19
USB82514
7.2.1.7 Register 06h: Configuration Data Byte 1
Bit
Number Bit Name Description
7 SELF_BUS_PWR Self or Bus-Power: Selects between self and bus-powered operation.
The hub is either self-powered (draws less than 2 mA of upstream bus power)
or bus-powered (limited to a 100 mA maximum of upstream power prior to
being configured by the host controller).
When configured as a bus-powered device, the Microchip hub consumes less
than 100 mA of current prior to being configured. After configuration, the bus-
powered Microchip hub (along with all associated hub circuitry, any embedded
devices if part of a compound device, and 100 mA per externally available
downstream port) must consume no more than 500 mA of upstream VBUS
current. The current consumption is system dependent, and the OEM must
ensure that the USB 2.0 specifications are not violated.
When configured as a self-powered device, <1 mA of upstream VBUS current
is consumed and all ports are available, with each port being capable of sourc-
ing 500 mA of current.
This field is set by the OEM using either the SMBus or EEPROM interface
options.
See description of the DYNAMIC bit (reg 07h, bit 7) for the self-/bus-power
functionality when dynamic power switching is enabled.
‘0’ = Bus-powered operation
‘1’ = Self-powered operation
Note: If dynamic power switching is enabled, this bit is ignored and the
LOCAL_PWR pin is used to determine if the hub is operating from
self or bus power.
6 Reserved Reserved
5 HS_DISABLE Hi-Speed Disable: Disables the capability to attach as either a Hi-/Full-speed
device, and forces attachment as Full-speed only (i.e., no Hi-Speed support).
‘0’ = Hi-/Full-Speed
‘1’ = Full-Speed-Only (Hi-Speed is disabled!)
4 MTT_ENABLE Multi-TT enable: Enables one Transaction Translator per port operation.
Selects between a mode where only one Transaction Translator is available
for all ports (Single-TT), or each port gets a dedicated Transaction Translator
(Multi-TT) {Note: The host may force Single-TT mode only}.
‘0’ = Single TT for all ports
‘1’ = One TT per port (multiple TT’s supported)
USB82514
60001234B-page 20 2014 Microchip Technology Inc.
7.2.1.8 Register 07h: Configuration Data Byte 2
3 EOP_DISABLE EOP Disable: Disables EOP generation of EOF1 when in Full-Speed mode.
During FS operation only, this permits the hub to send EOP if no downstream
traffic is detected at EOF1. See Section 11.3.1 of the USB 2.0 Specification for
additional details. Note: generation of an EOP at the EOF1 point may prevent
a host controller (operating in FS mode) from placing the USB bus in suspend.
‘0’ = EOP generation is normal
‘1’ = EOP generation is disabled
2:1 CURRENT_SNS Over-current Sense: Selects current sensing on a port-by-port basis, all ports
ganged, or none (only for bus-powered hubs). The ability to support current
sensing on a port or ganged basis is hardware implementation dependent.
‘00’ = Ganged sensing (all ports together)
‘01’ = Individual port-by-port
‘1x’ = Over-current sensing not supported (must only be used with bus-pow-
ered configurations!)
0 PORT_PWR Port Power Switching: Enables power switching on all ports simultaneously
(ganged), or port power is individually switched on and off on a port-by-port
basis (individual). The ability to support power enabling on a port or ganged
basis is hardware implementation dependent.
‘0’ = Ganged switching (all ports together)
‘1’ = Individual port-by-port switching
Bit
Number Bit Name Description
7 DYNAMIC Dynamic Power Switching Enable: Controls the ability of the hub to automati-
cally change from self-powered operation to bus-powered operation if the local
power source is removed or is unavailable (and from bus-powered to self-pow-
ered if the local power source is restored). {Note: If the local power source is
available, the hub will always switch to self-powered operation.}
When dynamic power switching is enabled, the hub detects the availability of a
local power source by monitoring the external LOCAL_PWR pin. If the hub
detects a change in power source availability, the hub immediately discon-
nects and removes power from all downstream devices and disconnects the
upstream port. The hub will then re-attach to the upstream port as either a bus-
powered hub (if local-power is unavailable) or a self-powered hub (if local
power is available).
‘0’ = No dynamic auto-switching
‘1’ = Dynamic auto-switching capable
6 Reserved Reserved
Bit
Number Bit Name Description
2014 Microchip Technology Inc. 60001234B-page 21
USB82514
7.2.1.9 Register 08h: Configuration Data Byte 3
5:4 OC_TIMER Over-Current Timer: Over-current timer delay
‘00’ = 0.1 ms
‘01’ = 4.0 ms
‘10’ = 8.0 ms
‘11’ = 16.0 ms
3 COMPOUND Compound Device: Allows the OEM to indicate that the hub is part of a com-
pound device (see the USB Specification for definition) . The applicable port(s)
must also be defined as having a "non-removable device".
Note: When configured via strapping options, declaring a port as non-
removable automatically causes the hub controller to report that it
is part of a compound device.
‘0’ = No
‘1’ = Yes, the hub is part of a compound device
2:0 Reserved Reserved
Bit
Number Bit Name Description
7:4 Reserved Reserved
3 PRTMAP_EN Port Re-mapping Enable: Selects the method used by the hub to assign port
numbers and disable ports.
‘0’ = Standard mode
‘1’ = Port re-map mode
2:1 Reserved Reserved
0 STRING_EN Enables string descriptor support
‘0’ = String support disabled
‘1’ = String support enabled
Bit
Number Bit Name Description
USB82514
60001234B-page 22 2014 Microchip Technology Inc.
7.2.1.10 Register 09h: Non-Removable Device
7.2.1.11 Register 0Ah: Port Disable for Self-Powered Operation
Bit
Number Bit Name Description
7:0 NR_DEVICE Non-Removable Device: Indicates which port(s) include non-removable
devices.
‘0’ = port is removable
‘1’ = port is non-removable
Informs the host if one of the active ports has a permanent device that is unde-
tachable from the hub. (Note: The device must provide its own descriptor
data.)
When using the internal default option, the NON_REM[1:0] pins will designate
the appropriate ports as being non-removable.
Bit 7 = Reserved
Bit 6 = Reserved
Bit 5 = Reserved
Bit 4 = Controls physical port 4
Bit 3 = Controls physical port 3
Bit 2 = Controls physical port 2
Bit 1 = Controls physical port 1
Bit 0 = Reserved
Bit
Number Bit Name Description
7:0 PORT_DIS_SP Port Disable Self-Powered: Disables 1 or more contiguous ports.
‘0’ = port is available
‘1’ = port is disabled
During self-powered operation when remapping mode is disabled (PRT-
MAP_EN = '0'), this selects the ports which will be permanently disabled, and
are not available to be enabled or enumerated by a host controller. The ports
can be disabled in any order, the internal logic will automatically report the cor-
rect number of enabled ports to the USB host, and will reorder the active ports
in order to ensure proper function.
Bit 7 = Reserved
Bit 6 = Reserved
Bit 5 = Reserved
Bit 4 = Controls physical port 4
Bit 3 = Controls physical port 3
Bit 2 = Controls physical port 2
Bit 1 = Controls physical port 1
Bit 0 = Reserved
2014 Microchip Technology Inc. 60001234B-page 23
USB82514
7.2.1.12 Register 0Bh: Port Disable for Bus-Powered Operation
7.2.1.13 Register 0Ch: Max Power for Self-Powered Operation
Bit
Number Bit Name Description
7:0 PORT_DIS_BP Port Disable Bus-Powered: Disables 1 or more contiguous ports.
‘0’ = port is available
‘1’ = port is disabled
During self-Powered operation when remapping mode is disabled (PRT-
MAP_EN = '0'), this selects the ports which will be permanently disabled, and
are not available to be enabled or enumerated by a host controller. The ports
can be disabled in any order, the internal logic will automatically report the cor-
rect number of enabled ports to the USB host, and will reorder the active ports
in order to ensure proper function.
When using the internal default option, the PRT_DIS_P[4:1] and
PRT_DIS_M[4:1] pins will disable the appropriate ports.
Bit 7 = Reserved
Bit 6 = Reserved
Bit 5 = Reserved
Bit 4 = Controls physical port 4
Bit 3 = Controls physical port 3
Bit 2 = Controls physical port 2
Bit 1 = Controls physical port 1
Bit 0 = Reserved
Bit
Number Bit Name Description
7:0 MAX_PWR_SP Max Power Self_Powered: Value in 2 mA increments that the hub consumes
from an upstream port (VBUS) when operating as a self-powered hub. This
value includes the hub silicon along with the combined power consumption
(from VBUS) of all associated circuitry on the board. This value also includes
the power consumption of a permanently attached peripheral if the hub is con-
figured as a compound device, and the embedded peripheral reports 0 mA in
its descriptors.
Note: The USB 2.0 Specification does not permit this value to exceed
100 mA.
USB82514
60001234B-page 24 2014 Microchip Technology Inc.
7.2.1.14 Register 0Dh: Max Power for Bus-Powered Operation
7.2.1.15 Register 0Eh: Hub Controller Max Current for Self-Powered Operation
7.2.1.16 Register 0Fh: Hub Controller Max Current for Bus-Powered Operation
7.2.1.17 Register 10h: Power-On Time
Bit
Number Bit Name Description
7:0 MAX_PWR_BP Max Power Bus_Powered: Value in 2 mA increments that the hub consumes
from an upstream port (VBUS) when operating as a bus-powered hub. This
value includes the hub silicon along with the combined power consumption
(from VBUS) of all associated circuitry on the board. This value also includes
the power consumption of a permanently attached peripheral if the hub is con-
figured as a compound device, and the embedded peripheral reports 0 mA in
its descriptors.
A value of 50 (decimal) indicates 100 mA, which is the default value.
Bit
Number Bit Name Description
7:0 HC_MAX_C_SP Hub Controller Max Current Self-Powered: Value in 2 mA increments that the
hub consumes from an upstream port (VBUS) when operating as a self-pow-
ered hub. This value includes the hub silicon along with the combined power
consumption (from VBUS) of all associated circuitry on the board. This value
does NOT include the power consumption of a permanently attached periph-
eral if the hub is configured as a compound device.
Note: The USB 2.0 Specification does not permit this value to exceed
100 mA.
Bit
Number Bit Name Description
7:0 HC_MAX_C_BP Hub Controller Max Current Bus-Powered: Value in 2 mA increments that the
hub consumes from an upstream port (VBUS) when operating as a bus-pow-
ered hub. This value will include the hub silicon along with the combined
power consumption (from VBUS) of all associated circuitry on the board. This
value will NOT include the power consumption of a permanently attached
peripheral if the hub is configured as a compound device.
A value of 50 (decimal) would indicate 100 mA, which is the default value.
Bit
Number Bit Name Description
7:0 POWER_ON_TIME Power-On Time: The length of time that it takes (in 2 ms intervals) from the
time the host initiated power-on sequence begins on a port until power is sta-
ble on that port.
2014 Microchip Technology Inc. 60001234B-page 25
USB82514
7.2.1.18 Register 11h: Language ID High
7.2.1.19 Register 12h: Language ID Low
7.2.1.20 Register 13h: Manufacturer String Length
7.2.1.21 Register 14h: Product String Length
7.2.1.22 Register 15h: Serial String Length
Bit
Number Bit Name Description
7:0 LANG_ID_H USB LANGUAGE ID (Upper 8 bits of a 16-bit ID field)
Bit
Number Bit Name Description
7:0 LANG_ID_L USB LANGUAGE ID (Lower 8 bits of a 16-bit ID field)
Bit
Number Bit Name Description
7:0 MFR_STR_LEN Manufacturer String Length
Maximum string length is 31 characters.
Bit
Number Bit Name Description
7:0 PRD_STR_LEN Product String Length
Maximum string length is 31 characters.
Bit
Number Bit Name Description
7:0 SER_STR_LEN Serial String Length
Maximum string length is 31 characters.
USB82514
60001234B-page 26 2014 Microchip Technology Inc.
7.2.1.23 Register 16h-53h: Manufacturer String
7.2.1.24 Register 54h-91h: Product String
7.2.1.25 Register 92h-CFh: Serial String
Bit
Number Bit Name Description
7:0 MFR_STR Manufacturer String, UNICODE UTF-16LE per USB 2.0 Specification
Maximum string length is 31 characters (62 bytes).
Note: The string consists of individual 16-bit UNICODE UTF-16LE char-
acters. The characters will be stored starting with the LSB at the
least significant address and the MSB at the next 8-bit location
(subsequent characters must be stored in sequential contiguous
address in the same LSB, MSB manner). Some EEPROM pro-
grammers may transpose the MSB and LSB, thus reversing the
byte order. Please pay careful attention to the byte ordering for your
selected programming tools.
Bit
Number Bit Name Description
7:0 PRD_STR Product String, UNICODE UTF-16LE per USB 2.0 Specification
Maximum string length is 31 characters (62 bytes).
Note: The string consists of individual 16-bit UNICODE UTF-16LE char-
acters. The characters will be stored starting with the LSB at the
least significant address and the MSB at the next 8-bit location
(subsequent characters must be stored in sequential contiguous
address in the same LSB, MSB manner). Some EEPROM pro-
grammers may transpose the MSB and LSB, thus reversing the
byte order. Please pay careful attention to the byte ordering for your
selected programming tools.
Bit
Number Bit Name Description
7:0 SER_STR Serial String, UNICODE UTF16LE per USB 2.0 Specification
Maximum string length is 31 characters (62 bytes).
Note: The string consists of individual 16-bit UNICODE UTF-16LE char-
acters. The characters will be stored starting with the LSB at the
least significant address and the MSB at the next 8-bit location
(subsequent characters must be stored in sequential contiguous
address in the same LSB, MSB manner). Some EEPROM pro-
grammers may transpose the MSB and LSB, thus reversing the
byte order. Please pay careful attention to the byte ordering for your
selected programming tools.
2014 Microchip Technology Inc. 60001234B-page 27
USB82514
7.2.1.26 Register F6h: Boost_Up
7.2.1.27 Register F8h: Boost_4:0
Bit
Number Bit Name Description
7:2 Reserved Reserved
1:0 BOOST_IOUT USB electrical signaling drive strength Boost Bit for Upstream Port.
‘00’ = Normal electrical drive strength = No boost
‘01’ = Elevated electrical drive strength = Low (approximately 4% boost)
‘10’ = Elevated electrical drive strength = Medium (approximately 8% boost)
‘11’ = Elevated electrical drive strength = High (approximately 12% boost)
Note: “Boost” could result in non-USB Compliant parameters, the OEM
should use a ‘00’ value unless specific implementation issues
require additional signal boosting to correct for degraded USB sig-
naling levels.
Bit
Number Bit Name Description
7:6 BOOST_IOUT_4 Upstream USB electrical signaling drive strength Boost Bit for Downstream
Port ‘4’.
‘00’ = Normal electrical drive strength = No boost
‘01’ = Elevated electrical drive strength = Low (approximately 4% boost)
‘10’ = Elevated electrical drive strength = Medium (approximately 8% boost)
‘11’ = Elevated electrical drive strength = High (approximately 12% boost)
Note: “Boost” could result in non-USB Compliant parameters, the OEM
should use a ‘00’ value unless specific implementation issues
require additional signal boosting to correct for degraded USB sig-
naling levels.
5:4 BOOST_IOUT_3 USB electrical signaling drive strength Boost Bit for Downstream Port ‘3’.
‘00’ = Normal electrical drive strength = No boost
‘01’ = Elevated electrical drive strength = Low (approximately 4% boost)
‘10’ = Elevated electrical drive strength = Medium (approximately 8% boost)
‘11’ = Elevated electrical drive strength = High (approximately 12% boost)
Note: “Boost” could result in non-USB Compliant parameters, the OEM
should use a ‘00’ value unless specific implementation issues
require additional signal boosting to correct for degraded USB sig-
naling levels.
USB82514
60001234B-page 28 2014 Microchip Technology Inc.
7.2.1.28 Register FAh: PortSwap
3:2 BOOST_IOUT_2 USB electrical signaling drive strength Boost Bit for Downstream Port ‘2’.
‘00’ = Normal electrical drive strength = No boost
‘01’ = Elevated electrical drive strength = Low (approximately 4% boost)
‘10’ = Elevated electrical drive strength = Medium (approximately 8% boost)
‘11’ = Elevated electrical drive strength = High (approximately 12% boost)
Note: “Boost” could result in non-USB Compliant parameters, the OEM
should use a ‘00’ value unless specific implementation issues
require additional signal boosting to correct for degraded USB sig-
naling levels.
1:0 BOOST_IOUT_1 USB electrical signaling drive strength Boost Bit for Downstream Port ‘1’.
‘00’ = Normal electrical drive strength = No boost
‘01’ = Elevated electrical drive strength = Low (approximately 4% boost)
‘10’ = Elevated electrical drive strength = Medium (approximately 8% boost)
‘11’ = Elevated electrical drive strength = High (approximately 12% boost)
Note: “Boost” could result in non-USB Compliant parameters, the OEM
should use a ‘00’ value unless specific implementation issues
require additional signal boosting to correct for degraded USB sig-
naling levels.
Bit
Number Bit Name Description
7:0 PRTSP PortSwap: Swaps the upstream and downstream USB DP and DM Pins for
ease of board routing to devices and connectors.
‘0’ = USB D+ functionality is associated with the DP pin and D- functionality is
associated with the DM pin.
‘1’ = USB D+ functionality is associated with the DM pin and D- functionality is
associated with the DP pin.
Bit 7 = Reserved
Bit 6 = Reserved
Bit 5 = Reserved
Bit 4 = ‘1’; Port 4 DP/DM is swapped.
Bit 3 = ‘1’; Port 3 DP/DM is swapped.
Bit 2 = ‘1’; Port 2 DP/DM is swapped.
Bit 1 = ‘1’; Port 1 DP/DM is swapped.
Bit 0 = ‘1’; Upstream Port DP/DM is swapped.
Bit
Number Bit Name Description
2014 Microchip Technology Inc. 60001234B-page 29
USB82514
7.2.1.29 Register FBh: PortMap 12
Bit
Number Bit Name Description
7:0 PRTR12 PortMap register for ports 1 & 2
When a hub is enumerated by a USB host controller, the hub is only permitted
to report how many ports it has; the hub is not permitted to select a numerical
range or assignment. The host controller will number the downstream ports of
the hub starting with the number '1' up to the number of ports that the hub rec-
ognizes.
The host's port number is referred to as "logical port number" and the physical
port on the hub is the “physical port number". When the remapping mode is
enabled (see PRTMAP_EN in Register 08h: Configuration Data Byte 3) the
hub's downstream port numbers can be remapped to different logical port
numbers (assigned by the host).
Note: The OEM must ensure that contiguous logical port numbers are
used, starting from #1 up to the maximum number of enabled ports;
this ensures that the hub's ports are numbered in accordance with
the way a host will communicate with the ports.
TABLE 7-2: PORTMAP REGISTER FOR PORTS 1 & 2
Bit [7:4] ‘0000’ Physical Port 2 is disabled
‘0001’ Physical Port 2 is mapped to Logical Port 1
‘0010’ Physical Port 2 is mapped to Logical Port 2
‘0011’ Physical Port 2 is mapped to Logical Port 3
‘0100’ Physical Port 2 is mapped to Logical Port 4
‘0101’
to
‘1111’
Illegal; Do Not Use
Bit [3:0] ‘0000’ Physical Port 1 is disabled
‘0001’ Physical Port 1 is mapped to Logical Port 1
‘0010’ Physical Port 1 is mapped to Logical Port 2
‘0011’ Physical Port 1 is mapped to Logical Port 3
‘0100’ Physical Port 1 is mapped to Logical Port 4
‘0101’
to
‘1111’
Illegal; Do Not Use
USB82514
60001234B-page 30 2014 Microchip Technology Inc.
7.2.1.30 Register FCh: PortMap 34
Bit
Number Bit Name Description
7:0 PRTR34 PortMap register for ports 3 & 4
When a hub is enumerated by a USB host controller, the hub is only permitted
to report how many ports it has; the hub is not permitted to select a numerical
range or assignment. The host controller will number the downstream ports of
the hub starting with the number '1’ up to the number of ports that the hub rec-
ognizes.
The host's port number is referred to as "logical port number" and the physical
port on the hub is the “physical port number". When remapping mode is
enabled (see PRTMAP_EN in Register 08h: Configuration Data Byte 3) the
hub's downstream port numbers can be remapped to different logical port
numbers (assigned by the host).
Note: The OEM must ensure that contiguous logical port numbers are
used, starting from #1 up to the maximum number of enabled ports;
this ensures that the hub's ports are numbered in accordance with
the way a host will communicate with the ports.
TABLE 7-3: PORTMAP REGISTER FOR PORTS 3 & 4
Bit [7:4] ‘0000’ Physical Port 4 is disabled
‘0001’ Physical Port 4 is mapped to Logical Port 1
‘0010’ Physical Port 4 is mapped to Logical Port 2
‘0011’ Physical Port 4 is mapped to Logical Port 3
‘0100’ Physical Port 4 is mapped to Logical Port 4
‘0101
to
‘1111’
Illegal: Do Not Use
Bit [3:0] ‘0000’ Physical Port 3 is disabled
‘0001’ Physical Port 3 is mapped to Logical Port 1
‘0010’ Physical Port 3 is mapped to Logical Port 2
‘0011’ Physical Port 3 is mapped to Logical Port 3
‘0100’ Physical Port 3 is mapped to Logical Port 4
‘0101
to
‘1111’
Illegal; Do Not Use
2014 Microchip Technology Inc. 60001234B-page 31
USB82514
7.2.1.31 Register FFh: Status/Command
7.2.2 I2C EEPROM
The I2C EEPROM interface implements a subset of the I2C Master Specification (Please refer to the Philips Semicon-
ductor Standard I2C-Bus Specification for details on I2C bus protocols). The hub’s I2C EEPROM interface is designed
to attach to a single “dedicated” I2C EEPROM, and conforms to the Standard-mode I2C Specification (100 kbit/s transfer
rate and 7-bit addressing) for protocol and electrical compatibility.
7.2.2.1 Implementation Characteristics
The hub will only access an EEPROM using the sequential read protocol.
7.2.2.2 Pull-Up Resistor
The circuit board designer is required to place external pull-up resistors (10 kΩ recommended) on the SDA/SMBDATA/
NON_REM1 and SCL/SMBCLK/CFG_SEL0 lines (per SMBus 1.0 Specification, and EEPROM manufacturer guide-
lines) to VDD in order to assure proper operation.
7.2.2.3 I2C EEPROM Slave Address
Slave address is 1010000.
7.2.3 IN-CIRCUIT EEPROM PROGRAMMING
The EEPROM can be programmed via ATE (Automatic Test Equipment) by pulling RESET_N low (which tri-states the
hub’s EEPROM interface and allows an external source to program the EEPROM).
Bit
Number Bit Name Description
7:3 Reserved Reserved
2 INTF_PW_DN SMBus Interface Power Down
‘0’ = Interface is active
‘1’ = Interface power down after ACK has completed
1 RESET Reset the SMBus Interface and internal memory back to RESET_N assertion
default settings.
‘0’ = Normal Run/Idle State
‘1’ = Force a reset of registers to their default state
0 USB_ATTACH USB Attach (and write protect)
‘0’ = SMBus slave interface is active
‘1’ = Hub will signal a USB attach event to an upstream device. The internal
memory (address range 00h-FEh) is “write-protected” to prevent unintentional
data corruption.
Note: Extensions to the I2C Specification are not supported. The hub acts as the master and generates the serial
clock SCL, controls the bus access (determines which device acts as the transmitter and which device acts
as the receiver), and generates the START and STOP conditions.
Note: 10-bit addressing is NOT supported.
USB82514
60001234B-page 32 2014 Microchip Technology Inc.
7.3 SMBus Slave Interface
Instead of loading user-defined descriptor data from an external EEPROM, the Microchip hub can be configured to
receive a code load from an external processor via an SMBus interface. The SMBus interface shares the same pins as
the EEPROM interface; if CFG_SEL1 & CFG_SEL0 activates the SMBus interface, external EEPROM support is no
longer available (and the user-defined descriptor data must be downloaded via the SMBus). The Microchip hub waits
indefinitely for the SMBus code load to complete and only “appears” as a newly connected device on USB after the code
load is completed.
The hub’s SMBus implementation is a slave-only SMBus device. The implementation only supports read block and write
block protocols. The hub responds to other protocols as described in Section 7.3.2, "Invalid Protocol Response Behav-
ior," on page 33. Reference to the System Management Bus Specification, Rev 1.0.
The SMBus interface is used to read and write the registers in the device. The register set is shown in Section 7.2.1,
"Internal Register Set (Common to EEPROM and SMBus)," on page 16.
7.3.1 BUS PROTOCOLS
Typical write block and read block protocols are shown below. Register accesses are performed using 7-bit slave
addressing, an 8-bit register address field, and an 8-bit data field. The shading indicates the hub driving data on the
SMBDATA line; otherwise, host data is on the SDA/SMBDATA/NON_REM1 line.
The slave address is the unique SMBus Interface Address for the hub that identifies it on SMBus. The register address
field is the internal address of the register to be accessed. The register data field is the data that the host is attempting
to write to the register or the contents of the register that the host is attempting to read.
7.3.1.1 Block Read/Write
The block write begins with a slave address and a write condition. After the command code, the host issues a byte count,
which describes how many more bytes will follow in the message. If a slave had 20 bytes to send, the first byte would
be the number 20 (14h), followed by the 20 bytes of data. The byte count may not be 0. A block read or write is allowed
to transfer a maximum of 32 data bytes.
Note: Data bytes are transferred MSB first.
Note: For the following SMBus tables:
FIGURE 7-1: BLOCK WRITE
Denotes Master-to-Slave Denotes Slave-to-Master
181
SSlave Address Register AddressWr A
17118
A
1
...
Byte Count = N AData byte 1 AData byte 2
81 1 188
Data byte N A P
Block Write
A
2014 Microchip Technology Inc. 60001234B-page 33
USB82514
7.3.1.2 Block Read
A block read differs from a block write in that the repeated start condition exists to satisfy the I2C specification’s require-
ment for a change in the transfer direction.
7.3.2 INVALID PROTOCOL RESPONSE BEHAVIOR
Registers accessed with an invalid protocol are not updated. A register is only updated following a valid protocol. The
only valid protocols are write block and read block, which are described above.
The hub only responds to the hardware selected Slave Address (0101100x).
Attempting to communicate with the hub over SMBus with an invalid slave address or invalid protocol results in no
response, and the SMBus Slave Interface returns to the idle state.
The only valid registers that are accessible by the SMBus slave address are the registers defined in the Registers Sec-
tion. The hub does not respond to undefined registers.
7.3.3 GENERAL CALL ADDRESS RESPONSE
The hub does not respond to a general call address of 0000_000b.
7.3.4 SLAVE DEVICE TIME-OUT
According to the SMBus Specification, version 1.0 devices in a transfer can abort the transfer in progress and release
the bus when any single clock low interval exceeds 25 ms (TTIMEOUT, MIN). Devices that have detected this condition
must reset their communication and be able to receive a new START condition no later than 35 ms (TTIMEOUT, MAX).
7.3.5 STRETCHING THE SCLK SIGNAL
The hub supports stretching of the SCLK by other devices on the SMBus. The hub does not stretch the SCLK.
FIGURE 7-2: BLOCK READ
Note: Some simple devices do not contain a clock low drive circuit; this simple kind of device typically resets its
communications port after a start or stop condition. The slave device time-out must be implemented.
Block Read
1
SS Slave Address Register AddressWr A
17118
A
1
Slave Address Rd A
711
81 1 188
P
181
A AAA
Byte Count = N Data byte 1 Data byte 2 Data byte N
...
USB82514
60001234B-page 34 2014 Microchip Technology Inc.
7.3.6 SMBus/I2C TIMING
The SMBus slave interface complies with the SMBus AC Timing Specification.
7.3.7 BUS RESET SEQUENCE
The SMBus slave interface resets and returns to the idle state upon a START field followed immediately by a STOP field.
7.3.7.1 Undefined Registers
The registers shown in Tab le 7- 2 are the defined registers in the hub. Reads to undefined registers return to 00h. Writes
to undefined registers have no effect and do not return an error.
7.3.7.2 Reserved Registers
Only a ‘0’ should be written to all reserved registers or bits.
FIGURE 7-3: SMBus/I2C TIMING PARAMETERS
Symbol Parameter Min Typ Max Unit
fSCL SCL Clock Frequency - - 100 kHz
tBUF Bus Free Time 4.7 - - µs
tSU;STA START Condition Set-Up Time 4.7 - - µs
tHD;STA START Condition Hold Time 4.0 - - µs
tLOW SCL LOW Time 4.7 - - µs
tHIGH SCL HIGH Time 4.0 - - µs
tR SCL and SDA Rise Time - - 1.0 µs
tF SCL and SDA Fall Time - - 0.3 µs
tSU;DAT Data Set-Up Time 0.25 - - µs
tHD;DAT Data Hold Time 0.25 - - µs
tSU;STO STOP Condition Set-Up Time 4.0 - - µs
tHD;STA
tSU;STO
tSU;STA
tSU;DAT
tHIGH
tF
tR
tLOW
tHD;DAT
tHD;STA
tBUF
AB_DATA
AB_CLK
SDA
SCL
2014 Microchip Technology Inc. 60001234B-page 35
USB82514
7.4 Default Configuration Option
To configure the hub in its default configuration, strap the CFG_SEL1 to 0 and CFG_SEL0 to 0. This configures the hub
to the internal defaults and enables the strapping options. (Please see Section 7.2.1, "Internal Register Set (Common
to EEPROM and SMBus)" for the list of the default values.) For specific pin strapping options, please see Chapter 6.0,
Pin Descriptions for instructions on how to modify the default values. Options include port disable and non-removable
pin strapping.
7.5 Reset
There are two different resets that the hub experiences. One is a hardware reset via the external RESET_N pin and the
second is via the USB Bus Reset.
7.5.1 EXTERNAL HARDWARE RESET_N
A valid hardware reset is defined as assertion of RESET_N for a minimum of 1μs after all power supplies are within
operating range. While reset is asserted, the hub (and its associated external circuitry) consumes less than 500 μA of
current from the upstream USB power source.
Assertion of RESET_N (external pin) causes the following:
1. All downstream ports are disabled, and PRTPWR power to downstream devices is removed.
2. The PHYs are disabled, and the differential pairs will be in a high-impedance state.
3. All transactions immediately terminate; no states are saved.
4. All internal registers return to the default state (in most cases, 00(h)).
5. The external crystal oscillator is halted.
6. The PLL is halted.
The hub is “operational” 500 µs after RESET_N is negated. Once operational, the hub configures itself based on the
settings of pins CFG_SEL[1:0]. See Table 7-1, “Hub Configuration Options,” on page 15.
FIGURE 7-4: RESET_N TIMING FOR DEFAULT/STRAP OPTION MODE
t1
t4
t5 t6 t7 t8
Valid Don’t Care
Don’t Care Driven by Hub if strap is an output.
RESET_N
VSS
Strap Pins
VSS
Hardware
reset
asserted
Read Strap
Options
Drive Strap
Outputs to
inactive
levels
Attach
USB
Upstream
USB Reset
recovery Idle
Start
completion
request
response
t2 t3
USB82514
60001234B-page 36 2014 Microchip Technology Inc.
Note 1: In bus-powered mode, the hub and its associated circuitry must not consume more than 100 mA from the
upstream USB power source during t1+t5.
2: All power supplies must have reached the operating levels mandated in Chapter 8.0, DC Parameters prior
to (or coincident with) the assertion of RESET_N.
Name Description Min Typ Max Unit
t1 RESET_N Asserted 1 - - µsec
t2 Strap Setup Time 16.7 - - nsec
t3 Strap Hold Time 16.7 - 1400 nsec
t4 Hub outputs driven to inactive logic states - 1.5 2 µsec
t5 USB Attach (see Note 1: and 2:) - - 100 msec
t6 Host acknowledges attach and signals USB Reset 100 - - msec
t7 USB Idle - undefined - msec
t8 Completion time for requests (with or without data
stage)
- - 5 msec
2014 Microchip Technology Inc. 60001234B-page 37
USB82514
7.5.1.1 RESET_N for EEPROM Configuration
Note 1: When in bus-powered mode, the hub and its associated circuitry must not consume more than 100 mA from
the upstream USB power source during t4+t5+t6+t7.
2: All power supplies must have reached the operating levels mandated in Chapter 8.0, DC Parameters, prior
to (or coincident with) the assertion of RESET_N.
FIGURE 7-5: RESET_N TIMING FOR EEPROM MODE
Name Description Min Typ Max Units
t1 RESET_N Asserted 1 - - µsec
t2 Hub Recovery/Stabilization - - 500 µsec
t3 EEPROM Read / Hub Config - 2.0 99.5 msec
t4 USB Attach (see Note 1: and 2:) - - 100 msec
t5 Host acknowledges attach and signals USB Reset 100 - - msec
t6 USB Idle - undefined - msec
t7 Completion time for requests (with or without data
stage)
- - 5 msec
t1 t2 t4 t5 t6 t7
RESET_N
VSS
Hardware
reset
asserted
Read Strap
Options
Read EEPROM
+
Set Options
Attach
USB
Upstream
USB Reset
recovery Idle
Start
completion
request
response
t3
USB82514
60001234B-page 38 2014 Microchip Technology Inc.
7.5.1.2 RESET_N for SMBus Slave Configuration
Note 1: For bus-powered configurations the maximum time is 99.5 ms, and the hub and its associated circuitry must
not consume more than 100 mA from the upstream USB power source during t2+t3+t4+t5+t6+t7. For Self-
Powered configurations, t3 MAX is not applicable and the time to load the configuration is determined by
the external SMBus host.
2: All power supplies must have reached the operating levels mandated in Chapter 8.0, DC Parameters, prior
to (or coincident with) the assertion of RESET_N.
7.5.2 USB BUS RESET
In response to the upstream port signaling a reset to the hub, the hub does the following:
1. Sets default bus address to ‘0’.
2. Sets configuration to: Unconfigured.
3. Negates PRTPWR[4:1] to all downstream ports.
4. Clears all TT buffers.
5. Moves device from suspended to active (if suspended).
6. Complies with Section 11.10 of the USB 2.0 Specification for behavior after completion of the reset sequence.
The host then configures the hub and the hub’s downstream port devices in accordance with the USB Specifica-
tion.
FIGURE 7-6: RESET_N TIMING FOR SMBUS MODE
Name Description Min Typ Max Units
t1 RESET_N Asserted 1 - - µsec
t2 Hub Recovery/Stabilization - - 500 µsec
t3 SMBus Code Load - 250 300 msec
t4 Hub Configuration and USB Attach (see Note 1: and 2:) - - 100 msec
t5 Host acknowledges attach and signals USB Reset 100 - - msec
t6 USB Idle - Undefined - msec
t7 Completion time for requests (with or without data stage) - - 5 msec
Note: The hub does not propagate the upstream USB reset to downstream devices.
t1 t2 t4 t5 t6 t7
RESET_N
VSS
Hardware
reset
asserted
Reset
Negation SMBus Code
Load
Attach
USB
Upstream
USB Reset
recovery Idle
Start
completion
request
response
t3
Hub PHY
Stabilization
2014 Microchip Technology Inc. 60001234B-page 39
USB82514
8.0 DC PARAMETERS
8.1 Maximum Guaranteed Ratings
Note 1: Stresses above the specified parameters could cause permanent damage to the device. This is a stress rat-
ing only and functional operation of the device at any condition above those indicated in the operation sec-
tions of this specification is not implied.
2: When powering this device from laboratory or system power supplies, it is important that the Absolute Max-
imum Ratings not be exceeded or device failure can result. Some power supplies exhibit voltage spikes on
their outputs when the AC power is switched on or off. In addition, voltage transients on the AC power line
may appear on the DC output. When this possibility exists, it is suggested to use a clamp circuit.
Parameter Symbol Min Max Units Comments
Storage Tem-
perature
TSTOR -55 150 °C -
3.3 V supply
voltage
VDDA33,
VDD33PLL,
VDD33
-0.5 4.0 V -
Voltage on any
I/O pin
--0.5 V
DD33 + 0.3 V -
Voltage on
XTAL1
--0.5 3.6 V -
Voltage on
XTAL2
--0.5 2.0 V -
USB82514
60001234B-page 40 2014 Microchip Technology Inc.
8.2 Operating Conditions
Note 1: The Tj (junction temperature) must not exceed 125°C.
2: The rise time for the 3.3 V supply can be extended to 500 ms max if RESET_N is actively driven low, typi-
cally by another IC, until 1 µs after all supplies are within operating range.
Parameter Symbol Min Max Units Comments
36-pin package
Operating Temperature
TA-40 85 °C Ambient temperature in still air.
(See Note 1: )
3.3 V supply voltage VDDA33
VDD33PLL
VDD33
3.0 3.6 V -
3.3 V supply rise time tRT - 400 µs (See Figure 8-1, "Supply Rise
Time Models")
(See 2: )
Voltage on any I/O pin - -0.3 3.6 V If any 3.3 V supply voltage drops
below 3.0 V, then the MAX
becomes:
(3.3 V supply voltage) + 0.5 V
Voltage on XTAL1 - -0.3 2.0 V -
Voltage on XTAL2 - -0.3 2.0 V -
FIGURE 8-1: SUPPLY RISE TIME MODELS
t10%
10%
90%
Voltage tRT
t90% Time
100%
3.3 V
VSS
VDD33
2014 Microchip Technology Inc. 60001234B-page 41
USB82514
8.3 Package Thermal Specifications
8.4 DC Electrical Characteristics
TABLE 8-1: 36-PIN QFN PACKAGE THERMAL PARAMETERS
Parameter Symbol Value Unit Comments
Thermal Resistance ΘJA 39 °C/W Measured from the die to the ambient air.
Junction-to-Top-of-Package ΨJT 0.3 °C/W -
Note: Thermal parameters are measured or estimated for devices with the exposed pad soldered to thermal vias
in a multilayer 2S2P PCB per JESD51.
TABLE 8-2: DC ELECTRICAL CHARACTERISTICS
Parameter Symbol Min Typ Max Units Comments
I, IS Type Input Buffer
Low Input Level
High Input Level
Input Leakage
Hysteresis (‘IS’ Only)
-
VILI
VIHI
IIL
VHYSI
-
-
2.0
-10
250
-
-
-
-
-
-
0.8
-
+10
600
-
V
V
µA
mV
TTL Levels
VIN = 0 to VDD33
Input Buffer with Pull-Up
(IPU)
Low Input Level
High Input Level
Low Input Leakage
High Input Leakage
IPU Buffer Float Voltage
VILI
VIHI
IILL
IIHL
VIPUF
-
2.0
+20
-10
-
-
-
-
2.0
0.8
-
+110
+10
V
V
µA
µA
V
TTL Levels
-
VIN = 0
VIN = VDD33
Voltage at the IPU pin when
floated. (Note 3:)
Input Buffer with Pull-
Down (IPD)
Low Input Level
High Input Level
Low Input Leakage
High Input Leakage
VILI
VIHI
IILL
IIHL
-
2.0
+10
-20
-
-
-
-
0.8
-10
-100
V
V
µA
µA
TTL Levels
-
VIN = 0
VIN = VDD33
USB82514
60001234B-page 42 2014 Microchip Technology Inc.
Note 1: Output leakage is measured with the current pins in high impedance.
2: See USB 2.0 Specification for USB DC Electrical Characteristics.
3: When the IPU type pin is floated, the internal logic will interpret this as logic high. IPU buffer pins include an
internal pull up and level shifter. IPU pins float to ~2.0 V with external loads less than 10 µA. This ensures
the internal level shifted voltage is above the high level threshold for the internal logic.
ICLK Input Buffer
Low Input Level
High Input Level
Input Leakage
VILCK
VIHCK
IIL
-
1.4
-10
-
-
-
0.5
-
+10
V
V
µA
-
-
VIN = 0 to VDD33
O12, I/O12 & I/OSD12 Type
Buffer
Low Output Level
High Output Level
Output Leakage
Hysteresis (‘SD’ pad only)
VOL
VOH
IOL
VHYSC
-
2.4
-10
250
-
-
-
-
0.4
-
+10
600
V
V
µA
mV
IOL = 12 mA @ VDD33 = 3.3 V
IOH = -12 mA @ VDD33 = 3.3 V
VIN = 0 to VDD33
(Note 1:)
IO-U
( Note 2:)
- --- --
USB82514
Supply Current
Unconfigured
Hi-Speed Host
Full-Speed Host
ICCINTHS
ICCINTFS
-
-
85
72
100
-
mA
mA
No device connected
Supply Current
Configured
(Hi-Speed Host)
1 Port @ HS
2 Ports @ HS
3 Ports @ HS
4 Ports @ HS
IHCH1
IHCH2
IHCH3
IHCH4
-
-
-
-
225
255
260
260
-
-
-
300
mA
mA
mA
mA
All supplies combined
Device connected
Supply Current
Configured
(Full-Speed Host)
1 Port @ FS
2 Ports @ FS
3 Ports @ FS
4 Ports @ FS
IHCH1
IHCH2
IHCH3
IHCH4
-
-
-
-
150
160
160
160
-
-
-
-
mA
mA
mA
mA
All supplies combined
Supply Current
Suspend
ICSBY - 325 - µA All supplies combined
Supply Current
Reset
ICRST - 115 - µA All supplies combined
TABLE 8-2: DC ELECTRICAL CHARACTERISTICS (CONTINUED)
Parameter Symbol Min Typ Max Units Comments
2014 Microchip Technology Inc. 60001234B-page 43
USB82514
8.5 Capacitance
TA = 25°C; fc = 1 MHz; VDD33 = 3.3 V
TABLE 8-3: PIN CAPACITANCE
Limits
Parameter Symbol Min Typ Max Unit Test Condition
Clock Input Capacitance CXTAL - - 2 pF All pins except USB pins (and pins under
test tied to AC ground)
Input Capacitance CIN - - 10 pF
Output Capacitance COUT - - 20 pF
USB82514
60001234B-page 44 2014 Microchip Technology Inc.
9.0 AC SPECIFICATIONS
9.1 Oscillator/Clock
Crystal: Parallel Resonant, Fundamental Mode, 24 MHz ± 350 ppm.
External Clock: 50% Duty cycle ± 10%, 24 MHz ± 350 ppm, Jitter < 100 ps rms.
9.1.1 SMBus INTERFACE
The Microchip hub is designed to meet the specifications as set forth in the SMBus 1.0 Specification for Slave-Only
devices (except as noted in Section 7.3, "SMBus Slave Interface").
9.1.2 I2C EEPROM
Frequency is fixed at 60 kHz ± 20%.
9.1.3 USB 2.0
The Microchip hub is designed to comply with the USB 2.0 Specification (Revision 2.0 from April 27, 2000 and the 12/
7/2000 and 5/28/2002 Errata). Please refer to the USB 2.0 Specification for more information.
FIGURE 9-1: TYPICAL CRYSTAL CIRCUIT
Note: CB equals total board/trace capacitance.
FIGURE 9-2: FORMULA TO FIND VALUE OF C1 AND C2
XTAL1
(CS1 =
CB + CXTAL )
XTAL2
(CS2 =
CB + CXTAL )
C1
C2
CL1Meg
Crystal
(C1 + CS1) x (C2 + CS2)
(C1 + CS1 + C2 + CS2)
CL =
USB82514
60001234B-page 46 2014 Microchip Technology Inc.
FIGURE 10-2: 36-PIN QFN, 6X6 mm2 BODY, 0.5 mm PITCH
Note: For the most current package drawings,
see the Microchip Packaging Specification at
http://www.microchip.com/packaging
2014 Microchip Technology Inc. 60001234B-page 47
USB82514
APPENDIX A: DATA SHEET REVISION HISTORY
TABLE A-1: CUSTOMER REVISION HISTORY
REVISION LEVEL & DATE SECTION/FIGURE/ENTRY CORRECTION
DS-60001234B All Version migrated to Microchip template
Cover Sheet Trueauto remark removed, dimple package added
Chapter 3.0, Pin
Configuration
Figure 3-1 improved: USB82514AM ->
USB82514Ax (generalized description), added in
legend
Chapter 10.0, Package
Outline
Normal QFN package (no dimple) corrected (56
pins -> 36 pins)
DS-60001234A All Microchip DS number inserted.
Revision A replaces the previous SMSC version
Rev. 1.4
Trademark and last page according to Microchip
guidelines.
SMSC branding removed
Page 2 Order numbers added for both packages
Chapter 3.0, Pin
Configuration
PB free information removed in Figure 3-1.
Chapter 10.0, Package
Outline
New version includes both packages
Rev. 1.4
(08-14-13)
Chapter 10.0, Package
Outline
New package added
Rev. 1.3
(06-10-13)
All Order numbers modified according to Microchip
guideline.
All ‘Lead-free’ remark removed in the document
Rev. 1.3
(04-04-13)
Section 7.2.1.14, "Register
0Dh: Max Power for Bus-
Powered Operation"
Added sentence:
A value of 50 (decimal) indicates 100 mA, which is
the default value.
Section 7.2.1.15, "Register
0Eh: Hub Controller Max
Current for Self-Powered
Operation"
Removed sentence:
A value of 50 (decimal) indicates 100 mA, which is
the default value.
Section 8.1, "Maximum
Guaranteed Ratings"
Row 3.3 V supply voltage: Min value added: -0.5 V
Rev. 1.2
(09-26-12)
All Microchip style implemented (logo and legend).
Section 7.5.1, "External
Hardware RESET_N"
CFG_SEL[2:0] -> CFG_SEL[1:0]
Rev. 1.1
(11-18-11)
Section 8.4, "DC Electrical
Characteristics"
VIPUF (IPU Buffer Float Voltage) added in Ta b le 8-
3.
Rev. 1.1
(11-17-11)
Chapter 3.0, Pin
Configuration
Figure 3-1 improved:
USB82514
60001234B-page 48 2014 Microchip Technology Inc.
Rev. 1.1
(11-09-11)
Chapter 3.0, Pin
Configuration
Topmark information added in Figure 3-1. Package
designators described.
Section 8.2, "Operating
Conditions"
Max value corrected for ‘voltage on any I/O pin’:
3.6 V
Section 8.5, "Capacitance" VDD18, VDDPLL 0 1.8 V replaced by VDD33 =
3.3 V
Rev. 1.1
(07-19-11)
Section 8.2, "Operating
Conditions"
In the table: Added Note 8.4 under Note 8.3.
Added reference to Note 8.4 in the comments
column for 3.3 V rise time parameter.
Rev. 1.1
(05-30-11)
Chapter 6.0, Pin
Descriptions
VBUS_DET is an input. Buffer type changed from
“I/O12” to “I”.
Rev. 1.1
(05-04-11)
Section 8.2, "Operating
Conditions"
Max value corrected for XTAL1 and XTAL2: 2.0 V
Rev. 1.1
(03-21-11)
Chapter 6.0, Pin
Descriptions
The internal regulator cannot be turned off.
Section 8.1, "Maximum
Guaranteed Ratings"
The chip does not have an external 1.8 V supply.
Max value of 3.3 V supply voltages changed from
4.6 V to 4.0 V.
Section 8.2, "Operating
Conditions"
The chip does not have an external 1.8 V supply.
Rev. 1.0
(10-19-10)
Section 8.1, "Maximum
Guaranteed Ratings"
Max value corrected for ‘voltage on any I/O pin’:
5.5 -> VDD33 + 0.3
Rev. 1.0
(10-12-10)
Page 2 Order information completed.
Rev. 1.0
(09-02-09)
Section 8.3, "Package
Thermal Specifications"
TBD values have been specified.
Rev. 0.8
(08-28-09)
Section 8.4, "DC Electrical
Characteristics"
TBD values have been specified.
Rev. 0.7
(03-13-09)
All Confidential designation removed from document.
Rev. 0.7
(12-01-08)
Initial Release
TABLE A-1: CUSTOMER REVISION HISTORY (CONTINUED)
REVISION LEVEL & DATE SECTION/FIGURE/ENTRY CORRECTION
2014 Microchip Technology Inc. 60001234B-page 49
USB82514
THE MICROCHIP WEB SITE
Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make
files and information easily available to customers. Accessible by using your favorite Internet browser, the web site con-
tains the following information:
•Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s
guides and hardware support documents, latest software releases and archived software
•General Technical Support – Frequently Asked Questions (FAQ), technical support requests, online discussion
groups, Microchip consultant program member listing
•Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of semi-
nars and events, listings of Microchip sales offices, distributors and factory representatives
CUSTOMER CHANGE NOTIFICATION SERVICE
Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive
e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or
development tool of interest.
To register, access the Microchip web site at www.microchip.com. Under “Support”, click on “Customer Change Notifi-
cation” and follow the registration instructions.
CUSTOMER SUPPORT
Users of Microchip products can receive assistance through several channels:
• Distributor or Representative
• Local Sales Office
• Field Application Engineer (FAE)
• Technical Support
Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales
offices are also available to help customers. A listing of sales offices and locations is included in the back of this docu-
ment.
Technical support is available through the web site at: http://microchip.com/support
USB82514
60001234B-page 50 2014 Microchip Technology Inc.
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Device: USB82514
Temperature
Range:
A= -40°C to +85°C
Package: M = QFN (36-pin)
F = QFN Dimple Package (36-pin)
Tape and Reel
Option:
Blank = Standard packaging (tray)
R = Tape and Reel(1)
Pattern A = Product Version
B = Product Version
Examples:
a) USB82514AMR-A
-40°C to + 85°C,
QFN (36-pin),
Tape & Reel,
A
b) USB82514AF-B
-40°C to + 85°C,
QFN dimple package (36-pin),
Tray,
B
Note 1: Tape and Reel identifier only appears in the
catalog part number description. This
identifier is used for ordering purposes and is
not printed on the device package. Check
with your Microchip Sales Office for package
availability with the Tape and Reel option.
Reel size is 3,000.
PART NO. [X] X
PackageTemperature
Range
Device
[X]
(1)
- X
Tape and Reel Pattern
Option
2014 Microchip Technology Inc. 60001234B-page 51
USB82514
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is provided only for your convenience and may be
superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO
REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,
MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of
Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implic-
itly or otherwise, under any Microchip intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC, FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PIC32
logo, rfPIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and
other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor, MTP, SEEVAL and The Embedded Control Solutions Company are
registered trademarks of Microchip Technology Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net,
dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM,
MPF, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O, Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA and Z-
Scale are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
flexPWR, JukeBlox, Kleer, KleerNet, MediaLB, and MOST
The preceding is a non-exhaustive list of trademarks in use in the US and other countries. For a complete list of trademarks, email a
request to legal.department@microchip.com. The absence of a trademark (name, logo, etc.) from the list does not constitute a waiver
of any intellectual property rights that SMSC has established in any of its trademarks.
All other trademarks mentioned herein are property of their respective companies.
© 2014, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
ISBN: 978-1-63276-040-1
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITY MANAGEMENT S
YSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
60001234B-page 52 2014 Microchip Technology Inc.
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03/25/14
