LMR62014 www.ti.com SNVS735B - OCTOBER 2011 - REVISED APRIL 2013 LMR62014 SIMPLE SWITCHER(R) 20Vout, 1.4A Step-Up Voltage Regulator in SOT-23 Check for Samples: LMR62014 FEATURES DESCRIPTION * * * * * * * * * The LMR62014 switching regulator is a current-mode boost converter operating at fixed frequency of 1.6 MHz. 1 23 Input Voltage Range of 2.7V to 14V Output Voltage up to 20V Switch Current up to 1.4A 1.6 MHz Switching Frequency Low Shutdown Iq, <1 A Cycle-by-Cycle Current Limiting Internally Compensated 5-Pin SOT-23 Packaging (2.92 x 2.84 x 1.08mm) Fully Enabled for WEBENCH(R) Power Designer PERFORMANCE BENEFITS * * Extremely Easy to Use Tiny Overall Solution Reduces System Cost The use of SOT-23 package, made possible by the minimal power loss of the internal 1.4A switch, and use of small inductors and capacitors result in the industry's highest power density. The LMR62014 is capable of greater than 90% duty cycle, making it ideal for boosting to voltages up to 20V. These parts have a logic-level shutdown pin that can be used to reduce quiescent current and extend battery life. Protection is provided through cycle-by-cycle current limiting and thermal shutdown. Internal compensation simplifies design and reduces component count. APPLICATIONS * * * * * Boost Conversions from 3.3V, 5V, and 12V Rails Space Constrained Applications Embedded Systems LCD Displays LED Applications System Performance Efficiency vs Load Current VIN = 3.3V, VOUT = 12V Efficiency vs Load Current VIN = 5V, VOUT = 12V 80 100 70 EFFICIENCY (%) EFFICIENCY (%) 60 50 40 30 20 90 80 10 70 0 0 20 40 60 80 100 120 140 160 LOAD (mA) 0 100 200 300 400 500 LOAD CURRENT (mA) 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. SIMPLE SWITCHER, WEBENCH are registered trademarks of Texas Instruments. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2011-2013, Texas Instruments Incorporated LMR62014 SNVS735B - OCTOBER 2011 - REVISED APRIL 2013 www.ti.com L1/10 PH 5VIN U1 VIN SHDN GND R3 51k C1 2.2 PF D1 SW LMR62014 SHDN GND R1/117k FB R2 13.3k CF 220 pF 12V OUT 500 mA (TYP) C2 4.7 PF Connection Diagram Figure 1. 5-Lead SOT-23 (Top View) See DBV Package PIN DESCRIPTIONS 2 Pin Name 1 SW 2 GND 3 FB 4 SHDN 5 VIN Function Drain of the internal FET switch. Analog and power ground. Feedback point that connects to external resistive divider. Shutdown control input. Connect to Vin if the feature is not used. Analog and power input. Submit Documentation Feedback Copyright (c) 2011-2013, Texas Instruments Incorporated Product Folder Links: LMR62014 LMR62014 www.ti.com SNVS735B - OCTOBER 2011 - REVISED APRIL 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) Storage Temperature Range -65C to +150C Operating Junction Temperature Range -40C to +125C Lead Temp. (Soldering, 5 sec.) Power Dissipation 300C (3) Internally Limited FB Pin Voltage -0.4V to +6V SW Pin Voltage -0.4V to +22V -0.4V to +14.5V Input Supply Voltage -0.4V to VIN + 0.3V SHDN Pin Voltage J-A (SOT-23) ESD Rating Human Body Model 265C/W (4) 2 kV For soldering specifications see SNOA549 (1) (2) (3) (4) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the device outside of the limits set forth under the operating ratings which specify the intended range of operating conditions. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. The maximum power dissipation which can be safely dissipated for any application is a function of the maximum junction temperature, TJ(MAX) = 125C, the junction-to-ambient thermal resistance for the SOT-23 package, J-A = 265C/W, and the ambient temperature, TA. The maximum allowable power dissipation at any ambient temperature for designs using this device can be calculated using the formula: If power dissipation exceeds the maximum specified above, the internal thermal protection circuitry will protect the device by reducing the output voltage as required to maintain a safe junction temperature. The human body model is a 100 pF capacitor discharged through a 1.5 k resistor into each pin. Submit Documentation Feedback Copyright (c) 2011-2013, Texas Instruments Incorporated Product Folder Links: LMR62014 3 LMR62014 SNVS735B - OCTOBER 2011 - REVISED APRIL 2013 www.ti.com Electrical Characteristics Limits in standard typeface are for TJ = 25C, and limits in boldface type apply over the full operating temperature range (-40C TJ +125C). Unless otherwise specified: VIN = 5V, VSHDN = 5V, IL = 0A. Symbol VIN Parameter Min (1) Conditions Input Voltage VOUT (MIN) Minimum Output Voltage Under Load Typical (2) 2.7 RL = 43 (3) VIN = 2.7V 5.4 7 VIN = 3.3V 8 10 VIN = 5V RL = 15 (3) VIN = 2.7V VIN = 3.3V VIN = 5V (4) 13 17 3.75 5 5 6.5 8.75 11 1.8 1.4 2 Max (1) Units 14 V V ISW Switch Current Limit See RDS(ON) Switch ON Resistance ISW = 100 mA, Vin = 5V 260 400 500 ISW = 100 mA, Vin = 3.3V 300 450 550 SHDNTH Shutdown Threshold Device ON 1.5 Device OFF ISHDN Shutdown Pin Bias Current A 0.50 VSHDN = 0 0 VSHDN = 5V 0 2 1.230 1.255 m V A VFB Feedback Pin Reference Voltage VIN = 3V IFB Feedback Pin Bias Current VFB = 1.23V 60 500 nA IQ Quiescent Current VSHDN = 5V, Switching 2 3.0 mA 400 500 VSHDN = 0 0.024 1 2.7V VIN 14V 0.02 1.205 VSHDN = 5V, Not Switching VFB VIN FB Voltage Line Regulation FSW Switching Frequency (5) 1 1.6 DMAX Maximum Duty Cycle (5) 86 93 IL Switch Leakage (1) (2) (3) (4) (5) 4 Not Switching VSW = 5V V A %/V 1.85 MHz 1 A % Limits are ensured by testing, statistical correlation, or design. Typical values are derived from the mean value of a large quantity of samples tested during characterization and represent the most likely expected value of the parameter at room temperature. L = 10 H, COUT = 4.7 F, duty cycle = maximum Switch current limit is dependent on duty cycle (see Typical Performance Characteristics). Specified limits are the same for Vin = 3.3V input. Submit Documentation Feedback Copyright (c) 2011-2013, Texas Instruments Incorporated Product Folder Links: LMR62014 LMR62014 www.ti.com SNVS735B - OCTOBER 2011 - REVISED APRIL 2013 Typical Performance Characteristics Unless otherwise specified: VIN = 5V, SHDN pin tied to VIN. Iq Vin (Active) vs Temperature 2.15 1.56 OSCILLATOR FREQUENCY (MHz) 1.58 2.1 IQ VIN ACTIVE (mA) Oscillator Frequency vs Temperature 2.2 2.05 2 1.95 1.9 1.85 1.8 -50 -25 0 25 50 75 VIN = 5V 1.54 1.52 VIN = 3.3V 1.5 1.48 1.46 1.44 1.42 1.4 -50 100 125 150 -25 0 TEMPERATURE ( C) Figure 2. 100 125 150 75 Iq Vin (Idle) vs Temperature 93 380 92.9 375 92.8 370 IQ VIN (IDLE) (PA) MAX DUTY CYCLE (%) 50 Figure 3. Max. Duty Cycle vs Temperature 92.7 92.6 VIN = 5V 92.5 92.4 VIN = 3.3V 365 360 355 92.3 350 92.2 345 92.1 -50 -25 0 25 50 340 -50 75 100 125 150 -25 0 TEMPERATURE ( C) Figure 4. 50 75 100 125 150 Figure 5. Feedback Bias Current vs Temperature Feedback Voltage vs Temperature 1.231 0.08 1.23 FEEDBACK VOLTAGE (V) 0.09 0.07 0.06 0.05 0.04 0.03 0.02 1.229 1.228 1.227 1.226 1.225 1.224 1.223 0.01 0 -50 25 TEMPERATURE (oC) o FEEDBACK BIAS CURRENT (PA) 25 TEMPERATURE (oC) o 1.222 -25 0 25 50 75 100 125 150 TEMPERATURE (oC) -40 -25 0 25 50 75 100 125 TEMPERATURE (oC) Figure 6. Figure 7. Submit Documentation Feedback Copyright (c) 2011-2013, Texas Instruments Incorporated Product Folder Links: LMR62014 5 LMR62014 SNVS735B - OCTOBER 2011 - REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified: VIN = 5V, SHDN pin tied to VIN. RDS(ON) vs Temperature Current Limit vs Temperature 0.5 2.6 0.45 2.5 0.4 CURRENT LIMIT (A) Vin = 3.3V RDS(ON) (:) 0.35 0.3 Vin = 5V 0.25 0.2 0.15 2.4 2.3 2.2 0.1 2.1 0.05 0 2 -40 0 -25 25 50 75 100 125 -40 -25 o 0 25 50 75 100 125 TEMPERATURE (oC) TEMPERATURE ( C) Figure 8. Figure 9. RDS(ON) vs VIN Efficiency vs Load Current VIN = 2.7V, VOUT = 5V 350 100 300 90 80 70 EFFICIENCY (%) RDS_ON (m:) 250 200 150 100 60 50 40 30 20 50 10 0 0 2.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5 0 50 100 150 200 250 300 LOAD (mA) Figure 11. Efficiency vs Load Current VIN = 3.3V, VOUT = 5V Efficiency vs Load Current VIN = 4.2V, VOUT = 5V 100 100 90 90 80 80 EFFICIENCY (%) EFFICIENCY (%) VIN (V) Figure 10. 70 60 50 40 60 50 40 30 30 20 20 10 10 0 0 100 200 300 400 500 600 70 0 0 0 200 400 600 800 1000 1200 1400 LOAD (mA) LOAD (mA) Figure 12. 6 70 Figure 13. Submit Documentation Feedback Copyright (c) 2011-2013, Texas Instruments Incorporated Product Folder Links: LMR62014 LMR62014 www.ti.com SNVS735B - OCTOBER 2011 - REVISED APRIL 2013 Typical Performance Characteristics (continued) Unless otherwise specified: VIN = 5V, SHDN pin tied to VIN. Efficiency vs Load Current VIN = 2.7V, VOUT = 12V 80 70 70 60 60 50 EFFICIENCY (%) EFFICIENCY (%) 80 Efficiency vs Load Current VIN = 3.3V, VOUT = 12V 40 30 50 40 30 20 20 10 10 0 10 20 30 40 0 50 0 20 40 60 80 100 120 140 160 LOAD (mA) LOAD (mA) Figure 14. Figure 15. Efficiency vs Load Current VIN = 5V, VOUT = 12V Efficiency vs Load Current VIN = 5V, VOUT = 18V 100 100 90 90 80 80 70 70 EFFICIENCY (%) EFFICIENCY (%) 0 60 50 40 30 60 50 40 30 20 20 10 10 0 0 0 100 200 300 400 500 600 LOAD (mA) 0 50 100 150 200 250 300 350 LOAD (mA) Figure 16. Figure 17. Submit Documentation Feedback Copyright (c) 2011-2013, Texas Instruments Incorporated Product Folder Links: LMR62014 7 LMR62014 SNVS735B - OCTOBER 2011 - REVISED APRIL 2013 www.ti.com Block Diagram 8 Submit Documentation Feedback Copyright (c) 2011-2013, Texas Instruments Incorporated Product Folder Links: LMR62014 LMR62014 www.ti.com SNVS735B - OCTOBER 2011 - REVISED APRIL 2013 THEORY OF OPERATION The LMR62014 is a switching converter IC that operates at a fixed frequency (1.6 MHz) for fast transient response over a wide input voltage range and incorporates pulse-by-pulse current limiting protection. Because this is current mode control, a 33 m sense resistor in series with the switch FET is used to provide a voltage (which is proportional to the FET current) to both the input of the pulse width modulation (PWM) comparator and the current limit amplifier. At the beginning of each cycle, the S-R latch turns on the FET. As the current through the FET increases, a voltage (proportional to this current) is summed with the ramp coming from the ramp generator and then fed into the input of the PWM comparator. When this voltage exceeds the voltage on the other input (coming from the Gm amplifier), the latch resets and turns the FET off. Since the signal coming from the Gm amplifier is derived from the feedback (which samples the voltage at the output), the action of the PWM comparator constantly sets the correct peak current through the FET to keep the output voltage in regulation. Q1 and Q2 along with R3 - R6 form a bandgap voltage reference used by the IC to hold the output in regulation. The currents flowing through Q1 and Q2 will be equal, and the feedback loop will adjust the regulated output to maintain this. Because of this, the regulated output is always maintained at a voltage level equal to the voltage at the FB node "multiplied up" by the ratio of the output resistive divider. The current limit comparator feeds directly into the flip-flop that drives the switch FET. If the FET current reaches the limit threshold, the FET is turned off and the cycle terminated until the next clock pulse. The current limit input terminates the pulse regardless of the status of the output of the PWM comparator. Application Hints SELECTING THE EXTERNAL CAPACITORS The best capacitors for use with the LMR62014 are multi-layer ceramic capacitors. They have the lowest ESR (equivalent series resistance) and highest resonance frequency which makes them optimum for use with high frequency switching converters. When selecting a ceramic capacitor, only X5R and X7R dielectric types should be used. Other types such as Z5U and Y5F have such severe loss of capacitance due to effects of temperature variation and applied voltage, they may provide as little as 20% of rated capacitance in many typical applications. Always consult capacitor manufacturer's data curves before selecting a capacitor. SELECTING THE OUTPUT CAPACITOR A single ceramic capacitor of value 4.7 F to 10 F will provide sufficient output capacitance for most applications. If larger amounts of capacitance are desired for improved line support and transient response, tantalum capacitors can be used. Aluminum electrolytics with ultra low ESR such as Sanyo Oscon can be used, but are usually prohibitively expensive. Typical AI electrolytic capacitors are not suitable for switching frequencies above 500 kHz due to significant ringing and temperature rise due to self-heating from ripple current. An output capacitor with excessive ESR can also reduce phase margin and cause instability. In general, if electrolytics are used, it is recommended that they be paralleled with ceramic capacitors to reduce ringing, switching losses, and output voltage ripple. SELECTING THE INPUT CAPACITOR An input capacitor is required to serve as an energy reservoir for the current which must flow into the coil each time the switch turns ON. This capacitor must have extremely low ESR, so ceramic is the best choice. We recommend a nominal value of 2.2 F, but larger values can be used. Since this capacitor reduces the amount of voltage ripple seen at the input pin, it also reduces the amount of EMI passed back along that line to other circuitry. Submit Documentation Feedback Copyright (c) 2011-2013, Texas Instruments Incorporated Product Folder Links: LMR62014 9 LMR62014 SNVS735B - OCTOBER 2011 - REVISED APRIL 2013 www.ti.com FEED-FORWARD COMPENSATION Although internally compensated, the feed-forward capacitor Cf is required for stability (see Basic Application Circuit). Adding this capacitor puts a zero in the loop response of the converter. The recommended frequency for the zero fz should be approximately 6 kHz. Cf can be calculated using the formula: Cf = 1 / (2 X X R1 X fz) (1) SELECTING DIODES The external diode used in the typical application should be a Schottky diode.The diode must be rated to handle the maximum output voltage and load current. A 20V diode such as the MBR0520 is recommended. The MBR05XX series of diodes are designed to handle a maximum average current of 0.5A. For applications exceeding 0.5A average, a Toshiba CRS08 can be used. LAYOUT HINTS High frequency switching regulators require very careful layout of components in order to get stable operation and low noise. All components must be as close as possible to the LMR62014 device. It is recommended that a 4-layer PCB be used so that internal ground planes are available. As an example, a recommended layout of components is shown: Figure 18. Recommended PCB Component Layout Some additional guidelines to be observed: 1. Keep the path between L1, D1, and C2 extremely short. Parasitic trace inductance in series with D1 and C2 will increase noise and ringing. 2. The feedback components R1, R2 and CF must be kept close to the FB pin of U1 to prevent noise injection on the FB pin trace. 3. If internal ground planes are available (recommended) use vias to connect directly to ground at pin 2 of U1, as well as the negative sides of capacitors C1 and C2. 10 Submit Documentation Feedback Copyright (c) 2011-2013, Texas Instruments Incorporated Product Folder Links: LMR62014 LMR62014 www.ti.com SNVS735B - OCTOBER 2011 - REVISED APRIL 2013 SETTING THE OUTPUT VOLTAGE The output voltage is set using the external resistors R1 and R2 (see Basic Application Circuit). A value of approximately 13.3 k is recommended for R2 to establish a divider current of approximately 92 A. R1 is calculated using the formula: R1 = R2 X (VOUT/1.23 - 1) (2) Figure 19. Basic Application Circuit DUTY CYCLE The maximum duty cycle of the switching regulator determines the maximum boost ratio of output-to-input voltage that the converter can attain in continuous mode of operation. The duty cycle for a given boost application is defined as: VOUT + VDIODE - VIN Duty Cycle = VOUT + VDIODE - VSW (3) This applies for continuous mode operation. INDUCTANCE VALUE The first question we are usually asked is: "How small can I make the inductor?" (because they are the largest sized component and usually the most costly). The answer is not simple and involves trade-offs in performance. Larger inductors mean less inductor ripple current, which typically means less output voltage ripple (for a given size of output capacitor). Larger inductors also mean more load power can be delivered because the energy stored during each switching cycle is: E = L/2 X (lp)2 where * "lp" is the peak inductor current. (4) An important point to observe is that the LMR62014 will limit its switch current based on peak current. This means that since lp(max) is fixed, increasing L will increase the maximum amount of power available to the load. Conversely, using too little inductance may limit the amount of load current which can be drawn from the output. Best performance is usually obtained when the converter is operated in "continuous" mode at the load current range of interest, typically giving better load regulation and less output ripple. Continuous operation is defined as not allowing the inductor current to drop to zero during the cycle. It should be noted that all boost converters shift over to discontinuous operation as the output load is reduced far enough, but a larger inductor stays "continuous" over a wider load current range. Submit Documentation Feedback Copyright (c) 2011-2013, Texas Instruments Incorporated Product Folder Links: LMR62014 11 LMR62014 SNVS735B - OCTOBER 2011 - REVISED APRIL 2013 www.ti.com To better understand these trade-offs, a typical application circuit (5V to 12V boost with a 10 H inductor) will be analyzed. We will assume: VIN = 5V, VOUT = 12V, VDIODE = 0.5V, VSW = 0.5V (5) Since the frequency is 1.6 MHz (nominal), the period is approximately 0.625 s. The duty cycle will be 62.5%, which means the ON time of the switch is 0.390 s. It should be noted that when the switch is ON, the voltage across the inductor is approximately 4.5V. Using the equation: V = L (di/dt) (6) We can then calculate the di/dt rate of the inductor which is found to be 0.45 A/s during the ON time. Using these facts, we can then show what the inductor current will look like during operation: Figure 20. 10 H Inductor Current, 5V-12V Boost (LMR62014X) During the 0.390 s ON time, the inductor current ramps up 0.176A and ramps down an equal amount during the OFF time. This is defined as the inductor "ripple current". It can also be seen that if the load current drops to about 33 mA, the inductor current will begin touching the zero axis which means it will be in discontinuous mode. A similar analysis can be performed on any boost converter, to make sure the ripple current is reasonable and continuous operation will be maintained at the typical load current values. 12 Submit Documentation Feedback Copyright (c) 2011-2013, Texas Instruments Incorporated Product Folder Links: LMR62014 LMR62014 www.ti.com SNVS735B - OCTOBER 2011 - REVISED APRIL 2013 MAXIMUM SWITCH CURRENT The maximum FET switch current available before the current limiter cuts in is dependent on duty cycle of the application. This is illustrated in the graphs below which show typical values of switch current as a function of effective (actual) duty cycle: 3000 SW CURRENT LIMIT (mA) 2500 VIN = 5V 2000 VIN = 3.3V 1500 1000 VIN = 2.7V 500 VIN = 3V 0 20 30 40 50 60 70 80 90 100 DUTY CYCLE (%) = [1 - EFF*(VIN / VOUT)] Figure 21. Switch Current Limit vs Duty Cycle CALCULATING LOAD CURRENT As shown in Figure 20 which depicts inductor current, the load current is related to the average inductor current by the relation: ILOAD = IIND(AVG) x (1 - DC) where * "DC" is the duty cycle of the application. (7) The switch current can be found by: ISW = IIND(AVG) + 1/2 (IRIPPLE) (8) Inductor ripple current is dependent on inductance, duty cycle, input voltage and frequency: IRIPPLE = DC x (VIN-VSW) / (f x L) (9) combining all terms, we can develop an expression which allows the maximum available load current to be calculated: ILOAD(max) = (1 - DC) x (ISW(max) - DC (VIN - VSW)) 2fL (10) The equation shown to calculate maximum load current takes into account the losses in the inductor or turn-OFF switching losses of the FET and diode. For actual load current in typical applications, we took bench data for various input and output voltages that displayed the maximum load current available for a typical device in graph form: Submit Documentation Feedback Copyright (c) 2011-2013, Texas Instruments Incorporated Product Folder Links: LMR62014 13 LMR62014 SNVS735B - OCTOBER 2011 - REVISED APRIL 2013 www.ti.com MAX LOAD CURRENT (mA) 1200 1000 800 VOUT = 5V 600 VOUT = 8V 400 VOUT = 10V VOUT = 12V 200 VOUT = 18V 0 2 3 4 5 6 7 8 9 10 11 VIN (V) Figure 22. Max. Load Current (typ) vs VIN DESIGN PARAMETERS VSW AND ISW The value of the FET "ON" voltage (referred to as VSW in the equations) is dependent on load current. A good approximation can be obtained by multiplying the "ON Resistance" of the FET times the average inductor current. FET on resistance increases at VIN values below 5V, since the internal N-FET has less gate voltage in this input voltage range (see Typical Performance Characteristics curves). Above VIN = 5V, the FET gate voltage is internally clamped to 5V. The maximum peak switch current the device can deliver is dependent on duty cycle. For higher duty cycles, see Typical Performance Characteristics curves. THERMAL CONSIDERATIONS At higher duty cycles, the increased ON time of the FET means the maximum output current will be determined by power dissipation within the LMR62014 FET switch. The switch power dissipation from ON-state conduction is calculated by: P(SW) = DC x IIND(AVE)2 x RDS(ON) (11) There will be some switching losses as well, so some derating needs to be applied when calculating IC power dissipation. INDUCTOR SUPPLIERS Recommended suppliers of inductors for this product include, but are not limited to Sumida, Coilcraft, Panasonic, TDK and Murata. When selecting an inductor, make certain that the continuous current rating is high enough to avoid saturation at peak currents. A suitable core type must be used to minimize core (switching) losses, and wire power losses must be considered when selecting the current rating. SHUTDOWN PIN OPERATION The device is turned off by pulling the shutdown pin low. If this function is not going to be used, the pin should be tied directly to VIN. If the SHDN function will be needed, a pull-up resistor must be used to VIN (approximately 50k-100k recommended). The SHDN pin must not be left unterminated. 14 Submit Documentation Feedback Copyright (c) 2011-2013, Texas Instruments Incorporated Product Folder Links: LMR62014 LMR62014 www.ti.com SNVS735B - OCTOBER 2011 - REVISED APRIL 2013 L1/10 PH 3.3 VIN U1 VIN SHDN R3 51k D1 SW LMR62014 C1 2.2 PF SHDN GND R1/84k FB R2 13.3k GND 9V OUT 240 mA (typ) CF 330 pF D2 D4 D3 D5 C2 4.7 PF R4 R5 EFFICIENCY (%) Efficiency vs Load Current 100 90 80 70 60 50 40 30 20 10 0 3.3 - 9V Boost 0 50 100 150 200 250 300 LOAD (mA) Figure 23. Flash LED Application Submit Documentation Feedback Copyright (c) 2011-2013, Texas Instruments Incorporated Product Folder Links: LMR62014 15 LMR62014 SNVS735B - OCTOBER 2011 - REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Revision A (April 2013) to Revision B * 16 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 15 Submit Documentation Feedback Copyright (c) 2011-2013, Texas Instruments Incorporated Product Folder Links: LMR62014 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (C) Device Marking (3) (4/5) (6) LMR62014XMF/NOPB ACTIVE SOT-23 DBV 5 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 SH1B LMR62014XMFE/NOPB ACTIVE SOT-23 DBV 5 250 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 SH1B LMR62014XMFX/NOPB ACTIVE SOT-23 DBV 5 3000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 SH1B (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based flame retardants must also meet the <=1000ppm threshold requirement. (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2016 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) LMR62014XMF/NOPB SOT-23 DBV 5 1000 178.0 8.4 LMR62014XMFE/NOPB SOT-23 DBV 5 250 178.0 LMR62014XMFX/NOPB SOT-23 DBV 5 3000 178.0 3.2 3.2 1.4 4.0 8.0 Q3 8.4 3.2 3.2 1.4 4.0 8.0 Q3 8.4 3.2 3.2 1.4 4.0 8.0 Q3 Pack Materials-Page 1 W Pin1 (mm) Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 20-Dec-2016 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMR62014XMF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMR62014XMFE/NOPB SOT-23 DBV 5 250 210.0 185.0 35.0 LMR62014XMFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 Pack Materials-Page 2 PACKAGE OUTLINE DBV0005A SOT-23 - 1.45 mm max height SCALE 4.000 SMALL OUTLINE TRANSISTOR C 3.0 2.6 1.75 1.45 PIN 1 INDEX AREA 1 0.1 C B A 5 2X 0.95 1.9 1.45 0.90 3.05 2.75 1.9 2 4 0.5 5X 0.3 0.2 3 (1.1) C A B 0.15 TYP 0.00 0.25 GAGE PLANE 8 TYP 0 0.22 TYP 0.08 0.6 TYP 0.3 SEATING PLANE 4214839/E 09/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. Refernce JEDEC MO-178. 4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. www.ti.com EXAMPLE BOARD LAYOUT DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X (0.95) 3 4 (R0.05) TYP (2.6) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:15X SOLDER MASK OPENING METAL SOLDER MASK OPENING METAL UNDER SOLDER MASK EXPOSED METAL EXPOSED METAL 0.07 MIN ARROUND 0.07 MAX ARROUND NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED SOLDER MASK DETAILS 4214839/E 09/2019 NOTES: (continued) 5. Publication IPC-7351 may have alternate designs. 6. Solder mask tolerances between and around signal pads can vary based on board fabrication site. www.ti.com EXAMPLE STENCIL DESIGN DBV0005A SOT-23 - 1.45 mm max height SMALL OUTLINE TRANSISTOR PKG 5X (1.1) 1 5 5X (0.6) SYMM (1.9) 2 2X(0.95) 4 3 (R0.05) TYP (2.6) SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE:15X 4214839/E 09/2019 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 8. 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