(MA) MOTOROLA High Performance Current Mode Controllers The UC3844B, UC3845B series are high performance fixed frequency current mode controllers. They are specifically designed for Off-Line and dc-to-de converter applications offering the designer a cost-effective solution with minimal external components. These integrated circuits feature an oscillator, a temperature compensated reference, high gain error amplifier, current sensing comparator, and a high current totem pole output ideally suited for driving a power MOSFET. Also included are protective features consisting of input and reference undervoltage lockouts each with hysteresis, cycle-bycycle current limiting, a latch for single pulse metering, and a flip-flop which blanks the output off every other oscillator cycle, allowing output deadtimes to be programmed from 50% to 70%. These devices are available in an 8pin dual-inline and surface mount (SO-8) plastic package as well as the 14~pin plastic surface mount (SO-14). The SO-14 package has separate power and ground pins for the totem pole output stage. The UCX844B has UVLO thresholds of 16 V (on) and 10 V (off), ideally suited for off-line converters. The UCX845B is tailored for lower voltage applications having UVLO thresholds of 8.5 V (on) and 7.6 V (off). Trimmed Oscillator for Precise Frequency Control Oscillator Frequency Guaranteed at 250 kHz Current Mode Operation to 500 kHz Output Switching Frequency Output Deadtime Adjustable from 50% to 70% Automatic Feed Forward Compensation Latching PWM for Cycle-ByCycle Current Limiting Internally Trimmed Reference with Undervoltage Lockout High Current Totem Pole Output @ Undervoltage Lockout with Hysteresis Low Startup and Operating Current Simplified Block Diagram Veco 7(12) fC vce It ox nt Fe I Under age | V Lockout Pi c | mer 47) _ Latching PL Te) Feedback Input 263) Error | 58) oupw | Amplitier i | curent Compensation O- Sense Input Wp t= ee 4 Gnd 5(9) Pin numbers in parenthesis are for the D suffix SO-14 package. Order this document by UC3844B/D UC3844B, 45B UC2844B, 45B HIGH PERFORMANCE CURRENT MODE CONTROLLERS N SUFFIX PLASTIC PACKAGE CASE 626 D1 SUFFIX PLASTIC PACKAGE CASE 751 (SO-8) D SUFFIX PLASTIC PACKAGE CASE 751A (SO-14) g wie PIN CONNECTIONS Compensation [1 | 8 | Vref Voltage Feedback [2 | 7 Vec Current Sense | 3 | | 6 | Output RriCr [4 | | 5] Gnd (Top View) Compensation[t]o [14] Vrot NG [2 !13] NG Voltage Feedback | 3 | 112] Voc NC | 4 | It] Vo Current Sense | 5 | 10] Output NC [6 | 19] Gnd Rr/Cy [7| | 8 | Power Ground (Top View) ORDERING INFORMATION Device Tem pevature Range Package UC384XBD SO-14 UC384XBD1 Ta = 0 to + 70C sSo-8 UC384XBN Plastic UC284XBD SO-14 UC284XBD1 | TA= 25 to+ 85C So-8 UC284XBN Plastic UC384XBVD SO-14 UC384xBVD1 | TA= 40 to +105C | so_g UC384XBVN Plastic X indicates either a 4 or 5 to define specific device part numbers. Motorola, Inc. 1996 Rev 1UC3844B, 45B UC2844B, 45B MAXIMUM RATINGS Rating Symbol Value Unit Total Power Supply and Zener Current (Ioc + Iz) 30 mA Output Current, Source or Sink (Note 1) lo 1.0 A Output Energy (Capacitive Load per Cycle) WwW 5.0 pd Current Sense and Voltage Feedback Inputs Vin -0.3t0+5.5 v Error Amp Output Sink Current lo 10 mA Power Dissipation and Thermal Characteristics D Suffix, Plastic Package, SO-14 Case 751A Maximum Power Dissipation @ Ta = 25C PD 862 mW Thermal Resistance, JunctiontoAir ReJA 145 C/W D1 Suffix, Plastic Package, SO-8 Case 751 Maximum Power Dissipation @ Ta = 25C Pp 702 mW Thermal Resistance, JunctiontoAir R@JA 178 C/W N Suffix, Plastic Package, Case 626 Maximum Power Dissipation @ Ta = 25C Pp 1.25 WwW Thermal Resistance, JunctiontoAir R@JA 100 C/W Operating Junction Temperature TJ +150 C Operating Ambient Temperature TA C UC3844B, UC3845B Oto + 70 UC2844B, UC2845B 25 to+ 85 Storage Temperature Range Tstg 65 to +150 C ELECTRICAL CHARACTERISTICS (Vcc = 15 V [Note 2], RT = 10k, CT = 3.3 nF. For typical values Ta = 25C, for min/max values Ta is the operating ambient temperature range that applies [Note 3], unless otherwise noted.) UC284XB UC384XB, XBV Characteristic Symbol Min | Typ | Max Min | Typ | Max Unit REFERENCE SECTION Reference Output Voltage (Io = 1.0 mA, Ty = 25C) Vref 4.95 5.0 5.05 49 5.0 5.1 Vv Line Regulation (Vcc = 12 V to 25 V) ReJline - 2.0 20 - 2.0 20 mV Load Regulation (lo = 1.0 mA to 20 mA) Regload - 3.0 25 - 3.0 25 mV Temperature Stability Ts - 0.2 - - 0.2 - mvV/C Total Output Variation over Line, Load, and Temperature Vref 4.9 - 5.1 4.82 - 5.18 Vv Output Noise Voltage (f = 10 Hz to 10 kHz, Ty = 25C) Vn - 50 - - 50 - pV Long Term Stability (Ta = 125C for 1000 Hours) $s - 5.0 - - 5.0 - mV Output Short Circuit Current Isc 30 -85 | -180 | 30 -85 | 180 mA OSCILLATOR SECTION Frequency fosc kHz Ty = 25C 49 52 55 49 52 55 TA = Tlow to Thigh 48 - 56 48 - 56 Ty = 25C (Ry =6.2k, Cy = 1.0 nF) 225 250 275 225 250 275 Frequency Change with Voltage (Vcc = 12 V to 25 V) Afosc/AV - 0.2 1.0 - 0.2 1.0 % Frequency Change with Temperature Afosc/AT - 1.0 - - 0.5 - % TA = Tlow to Thigh Oscillator Voltage Swing (PeaktoPeak) Vosc - 1.6 - - 1.6 - Vv Discharge Current (Vogc = 2.0 V) Idischg mA Ty = 25C 78 8.3 8.8 78 8.3 8.8 TA = Tlow to Thigh (UC284XB, UC384XB) 75 - 8.8 7.6 - 8.8 (UC384XBV) - - - 7.2 - 8.8 NOTES: 1. Maximum package power dissipation limits must be observed. 2. Adjust Vcc above the Startup threshold before setting to 15 V. 3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. Tlow = 0C for UC3844B, UC3845B Thigh = + 70C for UC3844B, UC3845B 25C for UC2844B, UC2845B + 85C for UC2844B, UC2845B 40C for UC3844BV, UC3845BV +105C for UC3844BV, UC3845BV 2 MOTOROLA ANALOG IC DEVICE DATAUC3844B, 45B UC2844B, 45B ELECTRICAL CHARACTERISTICS (Vcc = 15 V [Note 2], RT = 10k, CT = 3.3 nF. For typical values Ta = 25C, for min/max values Ta is the operating ambient temperature range that applies [Note 3], unless otherwise noted.) UC284XB UC384XB, XBV Characteristic Symbol Min | Typ | Max Min | Typ | Max Unit ERROR AMPLIFIER SECTION Voltage Feedback Input (Vo = 2.5 V) VFB 2.45 2.5 2.55 2.42 2.5 2.58 v Input Bias Current (VFB = 5.0 V) iB - -0.1 -1.0 - -01 | -20 pA Open Loop Voltage Gain (Vo = 2.0 V to 4.0 V) AVOL 65 90 - 65 90 - dB Unity Gain Bandwidth (Ty = 25C) BW 0.7 1.0 - 0.7 1.0 - MHz Power Supply Rejection Ratio (Vcc = 12 V to 25 V) PSRR 60 70 - 60 70 - dB Output Current mA Sink (Vo = 1.1 V, VFB = 2.7 V) ISink 2.0 12 - 2.0 12 - Source (Vo = 5.0 V, VFB = 2.3 V) ISource -0.5 | -1.0 - -05 | -1.0 - Output Voltage Swing Vv High State (RL = 15 k to ground, VFB = 2.3 V) VOH 5.0 6.2 - 5.0 6.2 - Low State (Ri = 15k to Vref, VFB = 2.7 V) VOL (UC284XB, UC384XB) - 0.8 1.1 - 0.8 (UC384XBV) - - - - 0.8 CURRENT SENSE SECTION Current Sense Input Voltage Gain (Notes 4 & 5) Ay VV (UC284XB, UC384XB) 2.85 3.0 3.15 2.85 3.0 3.15 (UC384XBV) - - - 2.85 3.0 3.25 Maximum Current Sense Input Threshold (Note 4) Vth Vv (UC284XB, UC384XB) 0.9 1.0 1.1 0.9 1.0 1.1 (UC384XBV) - - - 0.85 1.0 1.1 Power Supply Rejection Ratio PSRR - 70 - - 70 - dB (Vcc = 12 V to 25 V) (Note 4) Input Bias Current iB - -2.0 -10 - -2.0 -10 pA Propagation Delay (Current Sense Input to Output) tPLH(In/Out) - 150 300 - 150 300 ns OUTPUT SECTION Output Voltage v Low State (Isjnk = 20 mA) VOL - 0.1 0.4 - 0.1 0.4 (ISink = 200 mA, UC284XB, UC384XB) - 1.6 2.2 - 1.6 2.2 (ISink = 200 mA, UC384XBV) - - - - 1.6 2.3 High State (ISource = 20 mA, UC284XB, UC384XB) VOH 13 13.5 - 13 13.5 - (ISource = 20 mA, UC384XBV) - - - 12.9 - - (ISource = 200 mA) 12 13.4 - 12 13.4 - Output Voltage with UVLO Activated VOL(UVLO) - 0.1 1.1 - 0.1 1.1 Vv Voc = 6.0 V, Isink = 1.0 mA Output Voltage Rise Time (CL = 1.0 nF, Ty = 25C) tr - 50 150 - 50 150 ns Output Voltage Fall Time (CL = 1.0 nF, Ty = 25C) tt - 50 150 - 50 150 ns UNDERVOLTAGE LOCKOUT SECTION Startup Threshold Vth Vv UCX844B, BV 15 16 17 14.5 16 17.5 UCX845B, BV 78 8.4 9.0 78 8.4 9.0 Minimum Operating Voltage After TurnOn Voec(min) v UCX844B, BV 9.0 10 11 8.5 10 11.5 UCX845B, BV 7.0 7.6 8.2 7.0 7.6 8.2 NOTES: 2. Adjust Voc above the Startup threshold before setting to 15 V. 3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. Tlow = 0C for UC3844B, UC3845B Thigh = + 70C for UC3844B, UC3845B = 25C for UC2844B, UC2845B = + 85C for UC2844B, UC2845B = 40C for UC3844BV, UC3845BV = +105C for UC3844BV, UC33845BV 4. This parameter is measured at the latch trip point with VFp = 0 V. . . . AV Output/Compensation 5. Comparator gain is defined as: Ay = AV Current Sense Input input MOTOROLA ANALOG IC DEVICE DATA 3UC3844B, 45B UC2844B, 45B ELECTRICAL CHARACTERISTICS (Vcc = 15 V [Note 2], RT = 10k, CT = 3.3 nF. For typical values Ta = 25C, for min/max values Ta is the operating ambient temperature range that applies [Note 3], unless otherwise noted.) UC284XB UC384XB, XBV Characteristic Symbol Min | Typ | Max Min | Typ | Max Unit PWM SECTION Duty Cycle % Maximum (UC284XB, UC384XB) DO(max) 47 48 50 47 48 50 (UC384XBV) - - - 46 48 50 Minimum DC(min) - - 0 - - 0 TOTAL DEVICE Power Supply Current loc mA Startup (Vcc = 6.5 V for UCX845B, - 0.3 0.5 - 0.3 0.5 14 V for UCX844B, BV) Operating (Note 2) - 12 17 - 12 17 Power Supply Zener Voltage (Icc = 25 mA) Vz 30 36 - 30 36 - Vv NOTES: 2. Adjust Vcc above the Startup threshold before setting to 15 V. 3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible. = 0C for UC3844B, UC3845B 25C for UC2844B, UC2845B = 40C for UC3844BV, UC3845BV = Tlow Figure 1. Timing Resistor versus Oscillator Frequency Voc = 15 Ta = 25C RT, TIMING RESISTOR (k 22) NOTE: Output at 1/2 the oscillator frequency 40k 20k 50k 100k 200k fosc, OSCILLATOR FREQUENCY (kHz) 500 k Figure 3. Error Amp Small Signal Transient Response 2.55 V 2.5V 2.45 V 0.5 ys/DIV 1.0M 75 70 65 60 55 % DT, PERCENT OUTPUT DEADTIME 50 10k 3.0 V 2.5V 2.0V Thigh = + 70C for UC3844B, UC3845B = + 85C for UC2844B, UC2845B +105C for UC3844BV, UC3845BV Figure 2. Output Deadtime versus Oscillator Frequency . Cp =10nF . Cp =5.0 nF . Cp =2.0 nF . Cp =1.0nF . CT = 500 pF . CT = 200 pF . CT = 100 pF 5 | 6 20k 50k 100k 200 k fosc, OSCILLATOR FREQUENCY (kHz) 500k 1.0M Figure 4. Error Amp Large Signal Transient Response SAARDADRRAY BARRA RAN 1.0 us/DIV MOTOROLA ANALOG IC DEVICE DATAUC3844B, 45B UC2844B, 45B Figure 5. Error Amp Open Loop Gain and Figure 6. Current Sense Input Threshold Phase versus Frequency _ versus Error Amp Output Voltage 100 | 0 = 3 S| Veg =15V A Voc = 15V Z 90 Vo=20Vt040V | 30g = S N\ Ri = 100k Wt WW \ Gain Ta = 25C 60 oe = =z 60 wo 5 a5 S ws a 40 902 WW 2 Phase = QB > 20 108 @ Ww od oO Q2 5 \ 7g 1 0 150 & Q a) < e. = -20 \ 180 10 100 1.0k 10k 100 k 1.0M 10M 0 2.0 40 6.0 8.0 f, FREQUENCY (Hz) Vo, ERROR AMP OUTPUT VOLTAGE (Vo) Figure 7. Reference Voltage Change Figure 8. Reference Short Circuit Current > versus Source Current = versus Temperature = BN Voc = 15V = a CC = Vec= 15V re RL <0.12 = s a o a E S 2 90 BS : 2 oN oO S Ta =-55C te ~ S Ta = 125C 2 IN a Ly 70 oc Ww = D Ww = Ta = 25C Wi 3 50 0 20 40 60 80 100 120 3 -55 -25 0 25 50 75 100 125 lref, REFERENCE SOURCE CURRENT (mA) Ta, AMBIENT TEMPERATURE (C) Figure 9. Reference Load Regulation Figure 10. Reference Line Regulation a: Veco = 15 V IQ = 1.0 mA to 20 mA Ta = 25C AVg, OUTPUT VOLTAGE CHANGE (2.0 mV/DIV) AVg, OUTPUT VOLTAGE CHANGE (2.0 mV/DIV) 2.0 ms/DIV 2.0 ms/DIV MOTOROLA ANALOG IC DEVICE DATA 5Vgat, OUTPUT SATURATION VOLTAGE (V) UC3844B, 45B UC2844B, 45B Figure 11. Output Saturation Voltage Ta = 25C versus Load Current Source (Load to Ta =55C Sink Saturation (Load to Vcc) - Voc 80 ps Pulsed Load Figure 12. Output Waveform =15V 120 Hz Rate 90% Ta = 25C Gnd 0 200 400 600 800 50 ns/DIV | Q, OUTPUT LOAD CURRENT (mA) 6 Figure 13. Output Cross Conduction Figure 14. Supply Current versus Supply Voltage = 25 = | ie z a 2 a = 20 3 ane J N 3 ce 15 A > 3 7 IT | i 2 40 14 Z | o 2 ca ! ca Rt = 10k o y Ts) | =a _ x = 3 Siiy & Cy =3.3 nF 3 = 5 sHt_x VFB =0V 7 E -lsAy] > lSense = 9 V a S | | Ta = 25C a ~ 0 0 10 20 30 40 oO 2 100 ns/DIV Vcc, SUPPLY VOLTAGE (V) PIN FUNCTION DESCRIPTION Pin 8Pin 14Pin Function Description 1 1 Compensation This pin is the Error Amplifier output and is made available for loop compensation. 2 3 Voltage This is the inverting input of the Error Amplifier. It is normally connected to the switching power Feedback supply output through a resistor divider. 3 5 Current Sense A voltage proportional to inductor current is connected to this input. The PWM uses this information to terminate the output switch conduction. 4 7 RtT/CT The Oscillator frequency and maximum Output duty cycle are programmed by connecting resistor RT to Vref and capacitor C7 to ground. Oscillator operation to 1.0 kHz is possible. 5 Gnd This pin is the combined control circuitry and power ground. 6 10 Output This output directly drives the gate of a power MOSFET. Peak currents up to 1.0 A are sourced and sunk by this pin. The output switches at one-half the oscillator frequency. 7 12 Voc This pin is the positive supply of the control IC. 8 14 Vref This is the reference output. It provides charging current for capacitor C7 through resistor RT. 8 Power This pin is a separate power ground return that is connected back to the power source. It is used Ground to reduce the effects of switching transient noise on the control circuitry. 11 Vc The Output high state (VOH) is set by the voltage applied to this pin. With a separate power source connection, it can reduce the effects of switching transient noise on the control circuitry. 9 Gnd This pin is the control circuitry ground return and is connected back to the power source ground. 2,4,6,13 NC No connection. These pins are not internally connected. 6 MOTOROLA ANALOG IC DEVICE DATAUC3844B, 45B UC2844B, 45B OPERATING DESCRIPTION The UC3844B, UC3845B series are high performance, fixed frequency, current mode controllers. They are specifically designed for Off-Line and dc-todce converter applications offering the designer a cost-effective solution with minimal external components. A representative block diagram is shown in Figure 15. Oscillator The oscillator frequency is programmed by the values selected for the timing components RT and Cry. Capacitor CT is charged from the 5.0 V reference through resistor RT to approximately 2.8 V and discharged to 1.2 V by an internal current sink. During the discharge of Cy, the oscillator generates an internal blanking pulse that holds the center input of the NOR gate high. This causes the Output to be in a low state, thus producing a controlled amount of output deadtime. An internal flipflop has been incorporated in the UCX844/5B which blanks the output off every other clock cycle by holding one of the inputs of the NOR gate high. This in combination with the C7 discharge period yields output deadtimes programmable from 50% to 70%. Figure 1 shows RT versus Oscillator Frequency and Figure 2, Output Deadtime versus Frequency, both for given values of CT. Note that many values of RT and CT will give the same oscillator frequency but only one combination will yield a specific output deadtime at a given frequency. The oscillator thresholds are temperature compensated to within +6% at 50 kHz. Also, because of industry trends moving the UC384X into higher and higher frequency applications, the UC384XB is guaranteed to within +10% at 250 kHz. In many noise-sensitive applications it may be desirable to frequencylock the converter to an external system clock. This can be accomplished by applying a clock signal to the circuit shown in Figure 17. For reliable locking, the free-running oscillator frequency should be set about 10% less than the clock frequency. A method for multi-unit synchronization is shown in Figure 18. By tailoring the clock waveform, accurate Output duty cycle clamping can be achieved to realize output deactimes of greater than 70%. Error Amplifier A fully compensated Error Amplifier with access to the inverting input and output is provided. It features a typical dc voltage gain of 90 dB, and a unity gain bandwidth of 1.0 MHz with 57 degrees of phase margin (Figure 5). The non-inverting input is internally biased at 2.5 V and is not pinned out. The converter output voltage is typically divided down and monitored by the inverting input. The maximum input bias current is 2.0 wA which can cause an output voltage error that is equal to the product of the input bias current and the equivalent input divider source resistance. The Error Amp Output (Pin 1) is provided for external loop compensation (Figure 28). The output voltage is offset by two diode drops (=1.4 V) and divided by three before it connects to the inverting input of the Current Sense Comparator. This guarantees that no drive pulses appear at the Output (Pin 6) when Pin 1 is at its lowest state (VOL). This occurs when the power supply is operating and the load is removed, or at the beginning of a soft-start interval (Figures 20, 21). The Error Amp minimum feedback resistance is limited by the amplifiers source current (0.5 mA) and the required output voltage (VQH) to reach the comparators 1.0 V clamp level: 3.0 (1.0 V)+1.4V 0.5 mA Rf(min) ~ = 8800 2 Current Sense Comparator and PWM Latch The UC3844B, UC3845B operate as a current mode controller, whereby output switch conduction is initiated by the oscillator and terminated when the peak inductor current reaches the threshold level established by the Error Amplifier Output/Compensation (Pin 1). Thus the error signal controls the peak inductor current on a cycle-bycycle basis. The Current Sense Comparator PWM Latch configuration used ensures that only a single pulse appears at the Output during any given oscillator cycle. The inductor current is converted to a voltage by inserting the ground-referenced sense resistor Rg in series with the source of output switch Q1. This voltage is monitored by the Current Sense Input (Pin 3) and compared to a level derived from the Error Amp Output. The peak inductor current under normal operating conditions is controlled by the voltage at Pin 1 where: V(Pin 1) 1.4 V pk = 3Rs Abnormal operating conditions occur when the power supply output is overloaded or if output voltage sensing is lost. Under these conditions, the Current Sense Comparator threshold will be internally clamped to 1.0 V. Therefore the maximum peak switch current is: 1.0V lbk(max) Rs When designing a high power switching regulator it becomes desirable to reduce the internal clamp voltage in order to keep the power dissipation of Rs to a reasonable level. A simple method to adjust this voltage is shown in Figure 19. The two external diodes are used to compensate the internal diodes, yielding a constant clamp voltage over temperature. Erratic operation due to noise pickup can result if there is an excessive reduction of the Ipk(max) clamp voltage. A narrow spike on the leading edge of the current waveform can usually be observed and may cause the power supply to exhibit an instability when the output is lightly loaded. This spike is due to the power transformer interwinding capacitance and output rectifier recovery time. The addition of an RC filter on the Current Sense Input with a time constant that approximates the spike duration will usually eliminate the instability (refer to Figure 23). MOTOROLA ANALOG IC DEVICE DATAUC3844B, 45B UC2844B, 45B Figure 15. Representative Block Diagram Voc Reference RT Internal Bias Regulator Vin I Qi TIT Voltage Feedback 5(8) Input Latch = nput 2(8) Error Current Sense Input Amplifier Output/ Current Sense | 3(6) Compensation 1(1) | Comparator | Rs a a Gnd = Pin numbers adjacent to terminals are for the 8-pin dualinHine package. = Sink Only Positive True Logic Pin numbers in parenthesis are for the D suffix SO-14 package. Figure 16. Timing Diagram mapas LKLKK wn NAN AN NAN AN AN Input Output/ Current Sense Input Latch Reset | Input Latch Set Output | Compensation Nee qb || Large Rt/Small CT pL Small Ry/Large CT MOTOROLA ANALOG IC DEVICE DATAUC3844B, 45B UC2844B, 45B Undervoltage Lockout Two undervoltage lockout comparators have been incorporated to guarantee that the IC is fully functional before the output stage is enabled. The positive power supply terminal (VGC) and the reference output (Vref) are each monitored by separate comparators. Each has built-in hysteresis to prevent erratic output behavior as their respective thresholds are crossed. The Vcc comparator upper and lower thresholds are 16 V/10 V for the UCX844B, and 8.4 V/7.6 V for the UCX845B. The Vref comparator upper and lower thresholds are 3.6 V/3.4 V. The large hysteresis and low startup current of the UCX844B makes it ideally suited in off-line converter applications where efficient bootstrap startup techniques are required (Figure 29). The UCX845B is intended for lower voltage dctode converter applications. A 36 V zener is connected as a shunt regulator from Vcc to ground. Its purpose is to protect the IC from excessive voltage that can occur during system startup. The minimum operating voltage for the UCX844B is 11 V and 8.2 V for the UCX845B. Output These devices contain a single totem pole output stage that was specifically designed for direct drive of power MOSFETs. It is capable of up to+1.0 A peak drive current and has a typical rise and fall time of 50 ns with a 1.0 nF load. Additional internal circuitry has been added to keep the Output in a sinking mode whenever an undervoltage lockout is active. This characteristic eliminates the need for an external pull-down resistor. The SO-14 surface mount package provides separate pins for Vc (output supply) and Power Ground. Proper implementation will significantly reduce the level of switching transient noise imposed on the control circuitry. This becomes particularly useful when reducing the lpk(max) clamp level. The separate Vc supply input allows the designer Figure 17. External Clock Synchronization External Syne Input The diode clamp is required if the Sync amplitude is large enough to cause the bottom side of CT to go more than 300 mV below ground. added flexibility in tailoring the drive voltage independent of Voc. A zener clamp is typically connected to this input when driving power MOSFETs in systems where Vcc is greater than 20 V. Figure 22 shows proper power and control ground connections in a current-sensing power MOSFET application. Reference The 5.0 V bandgap reference is trimmed to +1.0% tolerance at Ty = 25C on the UC284XB, and +2.0% on the UC384xXB. Its primary purpose is to supply charging current to the oscillator timing capacitor. The reference has short-circuit protection and is capable of providing in excess of 20 mA for powering additional control system circuitry. Design Considerations Do not attempt to construct the converter on wirewrap or plug-in prototype boards. High frequency circuit layout techniques are imperative to prevent pulse-width jitter. This is usually caused by excessive noise pick-up imposed on the Current Sense or Voltage Feedback inputs. Noise immunity can be improved by lowering circuit impedances at these points. The printed circuit layout should contain a ground plane with low-current signal and highcurrent switch and output grounds returning on separate paths back to the input filter capacitor. Ceramic bypass capacitors (0.1 uF) connected directly to Vcc, Vc, and Vref may be required depending upon circuit layout. This provides a low impedance path for filtering the high frequency noise. All high current loops should be kept as short as possible using heavy copper runs to minimize radiated EMI. The Error Amp compensation circuitry and the converter output voltage divider should be located close to the IC and as far as possible from the power switch and other noisegenerating components. Figure 18. External Duty Cycle Clamp and Multi-Unit Synchronization To Additional UCX84XBs -_ 144 - Ra a + 2Age max) = Bay OR MOTOROLA ANALOG IC DEVICE DATAUC3844B, 45B UC2844B, 45B Figure 19. Adjustable Reduction of Clamp Level . 1.67 -3 (R1R2_) where:o<V <1.0V Velamp~ 7 Rp 7 +0.33x10-3 (x + =) camp Ry ~ Clamp lpk(max) Rs Figure 21. Adjustable Buffered Reduction of Clamp Level with Soft-Start 1.67 VClamp ~ [Ro Wd Where: 0 < Vclamp <10V Ry =- VG__} _R1 Re ~ VClam tSoft-Start nf We] Ri + Ro Ipk(max) Rs Figure 20. SoftStart Circuit > BQ 2 oz tSoft-Start = 3600C in wF Figure 22. Current Sensing Power MOSFET Voc (12) oT 1 | 3 et -+ | Vin VPin 5 = Rg pk 'DS(on) 'DM(on) + Rg It SENSEFET = MTP10N10M Rg = 200 Then: VPin 5 = 0.075 Ipk D|_SENSEFET v Power Ground: Ss To Input Source 4W Return Control Circuitry Ground: To Pin (9) Virtually lossless current sensing can be achieved with the implementation of aSENSEFET power switch. For proper operation during overcurrent conditions, a reduction of the Ink(max) clamp level must be implemented. Refer to Figures 19 and 21. 10 MOTOROLA ANALOG IC DEVICE DATAUC3844B, 45B UC2844B, 45B Figure 23. Current Waveform Spike Suppression Figure 24. MOSFET Parasitic Oscillations 9 Vin ai Rg Series gate resistor Rg will damp any high frequency parasitic oscillations caused by the MOSFET input capacitance and any series wiring inductance in the gate-source circuit. The addition of the RC filter will eliminate instability caused by the leading edge spike on the current waveform. M1 Figure 25. Bipolar Transistor Drive lp + Vin Base Charge _ Removal | ! | C1 | 6(10) The totem pole output can furnish negative base current for enhanced transistor turnoff, with the addition of capacitor C1. MOTOROLA ANALOG IC DEVICE DATA 11UC3844B, 45B UC2844B, 45B Figure 26. Isolated MOSFET Drive Voc Vin Isolation Boundary : {| Vas Waveforms ! ai | * *T ; les aa F txt ' - k y 50% DC 25% DC The MCR101 SCR must be selected for a holding of < 0.5 MA @ TA(min). The simple two transistor circuit can be used in place of the SCR as shown. All resistors are 10 k. Figure 28. Error Amplifier Compensation From Vo 1 25V Error Amp compensation circuit for stabilizing any current mode topology except Error Amp compensation circuit for stabilizing current mode boost for boost and flyback converters operating with continuous inductor current. and flyback topologies operating with continuous inductor current. 12 MOTOROLA ANALOG IC DEVICE DATAUC3844B, 45B UC2844B, 45B Figure 29. 7 W Off-Line Flyback Regulator mg L 3300 pF 1N4935 | 1N4935 . Is 1 e 100 47 MBR1635 4.79, e MDA 1 202 2200 115 Vac MUR110 1N4937 @ u + 1000 5.0V/4.0A 5.0V RTN 12V/0.3A +12V RTN -12V/0.3A MUR110 3 680pF an ; 1N4937 < -4 => MTP 4N50 18k 47k 0.5 TTT a TT > T1Primary: 45 Turns #26 AWG Li - 15 pH at 5.0 A, Coilcraft 27156 Secondary +12 V: 9 Turns #30 AWG (2 Strands) Bifiliar Wound L2, L3 25 pH at 5.0 A, Coilcraft 77157 Secondary 5.0 V: 4 Turns (six strands) #26 Hextfiliar Wound Secondary Feedback: 10 Turns #30 AWG (2 strands) Bifiliar Wound Core: Ferroxcube EC35-3C8 Bobbin: Ferroxcube EC35PCB1 Gap: = 0.10 for a primary inductance of 1.0 mH Test Conditions Results Line Regulation: 5.0 V Vin = 95 Vac to 130 Vac A=50 mV or 40.5% H2V A= 24 mV or t0.1% Load Regulation: 5.0 V Vin = 115 Vac, loupt=1.0Ato4.0A A= 300 mV or 43.0% H2V Vin = 115 Vac, lout = 100 mA to 300 mA | A= 60 mV or 40.25% Output Ripple: 5.0 V Vin = 115 Vac 40 mVpp H2V 80 mV pp Efficiency Vin = 115 Vac 70% All outputs are at nominal load currents unless otherwise noted. MOTOROLA ANALOG IC DEVICE DATA 13UC3844B, 45B UC2844B, 45B Figure 30. StepUp Charge Pump Converter Vio 15V Output Load Regulation ? ine (Open Loop Configuration) UC3845B Q 7(12) A Io (mA) Vo (V) TT 0 29.9 Reference ~ 2 28.8 1 Regulator 9 28.3 R IN5819% Internal j 18 27.4 6(10) pe 1N5819 H sg #0 Vo ~2 (Vin) 1.0nF: Lt ub Connect to 47 Pin 2 for Sree closed loop ~ [ | Error operation. | |__Ampltier t (1) | Current Sense RI - Comparator L____ 4} ae _ R2 5(9) Vo =25 (2 +1) = The capacitors equivalent series resistance must limit the Drive Output current to 1.0 A. An additional series resistor may be required when using tantalum or other low ESR capacitors. The converters output can provide excellent line and load regulation by connecting the R2/R1 resistor divider as shown. Figure 31. VoltageInverting Charge Pump Converter Output Load Regulation UC3845B Ee Io (mA) Vo (V) 47 0 -14.4 Reference 2 13.2 R Y Regulator 9 125 Internal 18 -11.7 Bias 32 -10.6 mk 4 1N5819 Vo~-Vin 1N5819 th yy [ | Error | |___Ampltier +L Current Sense = 1) | Comparator bee eee 4 The capacitors equivalent series resistance must limit the Drive Output current to 1.0 A. An additional series resistor may be required when using tantalum or other low ESR capacitors. OUTLINE DIMENSIONS 14 MOTOROLA ANALOG IC DEVICE DATAUC3844B, 45B UC2844B, 45B N SUFFIX PLASTIC PACKAGE CASE 626-05 ISSUE K NOTES: iL dl, il, a 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 8 5 2, PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). ) 3, DIMENSIONING AND TOLERANCING PER ANSI B- Y14.5M, 1982. MILLIMETERS INCHES NOTE 2 SEATING PLANE |p LK Mm H G [$]o 0.13 (0.005)@] T/A @] BO] D1 SUFFIX PLASTIC PACKAGE CASE 751-05 (SO-8) ISSUE N NOTES: . DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. . CONTROLLING DIMENSION: MILLIMETER. . DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. . MAXIMUM MOLD PROTRUSION 0.15 (0.006) 4x P PER SIDE. . DIMENSION D DOES NOT INCLUDE 4 | 0.25 (0.010) DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 R x 45 yl Le Cc (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL 4+ SEATING ye -T- PLANE NS ce K M sx D [S]025 0010] T]8 O]AG) | a CONDITION. MILLIMETERS INCHES MOTOROLA ANALOG IC DEVICE DATAUC3844B, 45B UC2844B, 45B OUTLINE DIMENSIONS D SUFFIX PLASTIC PACKAGE CASE 751A-03 (SO-14) NOTES: 1. DIMENSIONING AND TOLERANCING PER ISSUE F ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. H HH HH HH 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 14 8 4, MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. [B=] pvp. 7 \ 5, DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR | 0.25 (0.010)@)| B @ PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. | G Le Rx45 =| K- MILLIMETERS | _ INCHES g(h 211 = q@ Vi Ko oO 14 PL 0.25 (0.010) @ Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and alll liability, including without limitation consequential or incidental damages. Typical parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary overtime. Alloperating parameters, including Typicals must be validated for each customer application by customers technical experts. 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Motorola and Ng registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA/EUROPE/ Locations Not Listed: Motorola Literature Distribution; JAPAN: Nippon Motorola Lid.; Tatsumi4+SPD-JLDC, 6F Seibu-ButsuryuCenier, P.O. Box 20912; Phoenix, Arizona 85036. 1-800-441-2447 or 602-303-5454 MFAX: RMFAX0@email.sps.mot.com TOUCHTONE 602-244-6609 INTERNET: http://DesignNET.com 3-14-2 Tatsumi KotoKu, Tokyo 135, Japan. 03-81-3521-8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298 MOTOROLA UC3844B/D