1
LTC1686/LTC1687
52Mbps Precision Delay
RS485 Fail-Safe Transceivers
DESCRIPTION
U
Precision Propagation Delay Over Temperature:
Receiver/Driver: 18.5ns
±
3.5ns
High Data Rate:
52Mbps
Low t
PLH
/t
PHL
Skew:
Receiver/Driver: 500ps Typ
7V to 12V RS485 Input Common Mode Range
Guaranteed Fail-Safe Operation Over the Entire
Common Mode Range
High Input Resistance: 22k, Even When Unpowered
Short-Circuit Protected
Thermal Shutdown Protected
Driver Maintains High Impedance in Three-State or
with Power Off
Single 5V Supply
Pin Compatible with LTC490/LTC491
45dB CMRR at 26MHz
FEATURES
The LTC
®
1686/LTC1687 are high speed, precision delay,
full-duplex RS485 transceivers that can operate at data
rates as high as 52Mbps. The devices also meet the
requirements of RS422.
A unique architecture provides very stable propagation
delays and low skew over a wide common mode and
ambient temperature range.
The driver and receiver feature three-state outputs, with
disabled driver outputs maintaining high impedance over
the entire common mode range. A short-circuit feature
detects shorted outputs and substantially reduces driver
output current. A similar feature also protects the receiver
output from short circuits. Thermal shutdown circuitry
protects from excessive power dissipation.
The receiver has a fail-safe feature that guarantees a high
output state when the inputs are shorted or are left floating.
The LTC1686/LTC1687 RS485 transceivers guarantee
receiver fail-safe operation over the
entire
common mode
range (–7V to 12V). Receiver input resistance remains
22k when the device is unpowered or disabled.
The LTC1686/LTC1687 operate from a single 5V supply
and draw only 7mA of supply current.
APPLICATIONS
U
High Speed RS485/RS422 Full Duplex Transceivers
Level Translator
Backplane Transceiver
STS-1/OC-1 Data Transceiver
Signal Repeaters
, LTC and LT are registered trademarks of Linear Technology Corporation.
10Mbps Data Pulse
400 Feet Category 5 UTP
1686/87 TA02
DRIVER INPUT
RECEIVER
INPUT
RECEIVER
OUTPUT
100ns/DIV
1V/DIV
2V/DIV
5V/DIV
CABLE DELAY
LTC1686/87 • TA01
100100
100100
LTC1686 LTC1686
R
D
R
D3
2
7
8
6
5
400 FT OF CATEGORY 5 UTP
RECEIVER
DRIVER RECEIVER
DRIVER
TYPICAL APPLICATION
U
2
LTC1686/LTC1687
A
U
G
W
A
W
U
W
ARBSOLUTEXI T
IS
(Note 1)
Supply Voltage (V
DD
) .............................................. 10V
Control Input Currents .................... 100mA to 100mA
Control Input Voltages .................. 0.5V to V
DD
+ 0.5V
Driver Input Voltages .................... 0.5V to V
DD
+ 0.5V
Driver Output Voltages ................................. +12V/–7V
Receiver Input Voltages ................................ +12V/–7V
Receiver Output Voltages ............. 0.5V to V
DD
+ 0.5V
Receiver Input Differential ...................................... 10V
Driver Short-Circuit Duration
(V
OUT
: –7V to 10V) ..................................... Indefinite
Receiver Short-Circuit Duration
(V
OUT
: 0V to V
DD
) ........................................ Indefinite
Operating Temperature Range
LTC1686C/LTC1687C ............................. 0°C to 70°C
LTC1686I/LTC1687I .......................... 40°C to 85°C
Storage Temperature Range ................ 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
OD1
Differential Driver Output (Unloaded) I
OUT
= 0 V
DD
V
V
OD2
Differential Driver Output (With Load) R = 50 (RS422) 2.0 V
R = 27 (RS485), Figure 1 1.5 V
DD
V
V
OD
Change in Magnitude of Driver Differential R = 27 or 50, Figure 1 0.2 V
Output Voltage for Complementary
Output States
V
OC
Driver Common Mode Output Voltage R = 27 or 50, V
DD
= 5V, Figure 1 23V
∆V
OC
Change in Magnitude of Driver Common R = 27 or 50, Figure 1 0.2 V
Mode Output Voltage for Complementary
Output States
V
IH
Input High Voltage D, DE, RE 2V
V
IL
Input Low Voltage D, DE, RE 0.8 V
I
IN1
Input Current D, DE, RE –1 1 µA
I
IN2
Input Current (A, B) V
A
, V
B
= 12V, V
DD
= 0V or 5.25V 500 µA
V
A
, V
B
= – 7V, V
DD
= 0V or 5.25V 500 µA
V
TH
Differential Input Threshold Voltage 7V V
CM
12V 0.3 0.3 V
for Receiver
V
TH
Receiver Input Hysteresis V
CM
= 0V 25 mV
V
OH
Receiver Output High Voltage I
OUT
= – 4mA, V
ID
= 300mV 3.5 4.8 V
Consult factory for Industrial and Military grade parts.
VDD = 5V ± 5% unless otherwise noted (Notes 2, 3).
DC ELECTRICAL CHARACTERISTICS
T
JMAX
= 125°C, θ
JA
= 150°C/W
WU
U
PACKAGE/ORDER I FOR ATIO
LTC1687CS
LTC1687IS
T
JMAX
= 125°C, θ
JA
= 90°C/ W
ORDER PART
NUMBER
14
13
12
11
10
9
87
6
5
4
3
2
1
TOP VIEW
S PACKAGE
14-LEAD PLASTIC SO
NC
Y
NC
Z
B
NC
V
DD
D
GND
GND
R
RE
DE
A
R
D
ORDER PART
NUMBER
LTC1686CS8
LTC1686IS8
S8 PART MARKING
S8 PACKAGE
8-LEAD PLASTIC SO
1
2
3
4
8
7
6
5
TOP VIEW
V
DD
R
D
GND
A
B
Z
Y
R
D
1686
1686I
3
LTC1686/LTC1687
DC ELECTRICAL CHARACTERISTICS
VDD = 5V ±5% unless otherwise noted (Notes 2, 3).
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
OL
Receiver Output Low Voltage I
OUT
= 4mA, V
ID
= – 300mV 0.4 V
I
OZR
Three-State (High Impedance) Output 0.4V V
OUT
2.4V –1 1 µA
Current at Receiver
I
OZD
Three-State (High Impedance) Output V
OUT
= – 7V to 12V 200 200 µA
Current at Driver
C
LOAD
Receiver and Driver Output Load Capacitance (Note 4) 500 pF
I
DD
Supply Current No Load, Pins D, DE, RE = 0V or V
DD
712 mA
I
OSD1
Driver Short-Circuit Current, V
OUT
= HIGH V
OUT
= – 7V or 10V (Note 5) 20 mA
I
OSD2
Driver Short-Circuit Current, V
OUT
= LOW V
OUT
= – 7V or 10V (Note 5) 20 mA
I
OSR
Receiver Short-Circuit Current V
OUT
= 0V or V
DD
(Note 5) 20 mA
R
IN
Input Resistance 7V V
CM
12V 22 k
C
IN
Input Capacitance A, B, D, DE, RE Inputs (Note 4) 3 pF
Open-Circuit Input Voltage V
DD
= 5V (Note 4), Figure 5 3.2 3.3 3.4 V
Fail-Safe Time to Detect Fail-Safe Condition 2 µs
Time
CMRR Receiver Input Common Mode V
CM
= 2.5V, f = 26MHz 45 dB
Rejection Ratio
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
t
PLH
, t
PHL
Driver Input-to-Output Propagation Delay R
DIFF
= 54, Figures 3, 5 LTC1686C/LTC1687C 15 18.5 22 ns
C
L1
= C
L2
= 100pF LTC1686I/LTC1687I 13 18.5 25 ns
t
SKEW
Driver Output A-to-Output B Skew R
DIFF
= 54, C
L1
= C
L2
= 100pF, 500 ps
Figures 3, 5
t
r
, t
f
Driver Rise/Fall Time R
DIFF
= 54, C
L1
= C
L2
= 100pF, 3.5 ns
Figures 3, 5
t
ZH
Driver Enable to Output High C
L
= 100pF, S2 Closed, Figures 4, 6 25 50 ns
t
ZL
Driver Enable to Output Low C
L
= 100pF, S1 Closed, Figures 4, 6 25 50 ns
t
LZ
Driver Disable from Low C
L
= 15pF, S1 Closed, Figures 4, 6 25 50 ns
t
HZ
Driver Disable from High C
L
= 15pF, S2 Closed, Figures 4, 6 25 50 ns
t
PLH
, t
PHL
Receiver Input-to-Output Propagation Delay C
L
= 15pF, Figures 3, 7 LTC1686C/LTC1687C 15 18.5 22 ns
LTC1686I/LTC1687I 13 18.5 25 ns
t
SQD
Receiver Skew t
PLH
– t
PHL
C
L
= 15pF, Figures 3, 7 500 ps
t
ZL
Receiver Enable to Output Low C
L
= 15pF, S1 Closed, Figures 2, 8 25 50 ns
t
ZH
Receiver Enable to Output High C
L
= 15pF, S2 Closed, Figures 2, 8 25 50 ns
t
LZ
Receiver Disable from Low C
L
= 15pF, S1 Closed, Figures 2, 8 25 50 ns
t
HZ
Receiver Disable from High C
L
= 15pF, S2 Closed, Figures 2, 8 25 50 ns
Maximum Receiver Input (Note 4) 2000 ns
Rise/Fall Times
t
PKG-PKG
Package-to-Package Skew C
L
= 15pF, Same Temperature (Note 4) 1.5 ns
SWITCHING CHARACTERISTICS
U
VDD = 5V, unless otherwise noted (Notes 2, 3).
4
LTC1686/LTC1687
The denotes specifications which apply over the full operating
temperature range.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: All currents into the device pins are positive; all currents out of the
device pins are negative.
Note 3: All typicals are given for V
DD
= 5V, T
A
= 25°C.
Note 4: Guaranteed by design, but not tested.
Note 5: Short-circuit current does not represent output drive capability.
When the output detects a short-circuit condition, output drive current is
significantly reduced (from hundreds of mA to 20mA max) until the short
is removed.
TYPICAL PERFORMANCE CHARACTERISTICS
UW
FREQUENCY (Hz)
10
42.0
COMMON MODE REJECTION RATIO (dB)
42.5
43.5
44.0
44.5
46.5
1686/87 G01
43.0
1k 100k 1M
45.0
45.5
46.0
T
A
= 25°C
Receiver Input CMRR
TEMPERATURE (°C)
–25
SUPPLY CURRENT (mA)
53
54
55
50 100
1686/87 G03
52
51
50 025 75
56
57
58
BOTH DRIVER AND RECEIVER
ENABLED AND LOADED
25Mbps DATA RATE
DATA RATE (Mbps)
1
50
60
70
4030
1686/87 G02
40
30
10 20 50
20
10
0
SUPPLY CURRENT (mA)
BOTH DRIVER AND RECEIVER
ENABLED AND LOADED
TA = 25°C
Supply Current vs Data Rate Supply Current vs Temperature
Receiver Propagation Delay
vs Load Capacitance
Receiver Propagation Delay
vs Common Mode
LOAD CAPACITANCE (pF)
5
0
PROPAGATION DELAY (ns)
5
10
15
20
30
15 25 35 55
1686/87 G04
105 205
25
TA = 25°C
RECEIVER COMMON MODE (V)
–7
0
PROPAGATION DELAY (ns)
5
15
20
25
–2 2412
1686/87 G05
10
–4 0 6810
T
A
= 25°C
Receiver Propagation Delay
vs Input Overdrive
RECEIVER INPUT OVERDRIVE (V)
0.3 0.5
0
RECEIVER PROPAGATION DELAY (ns)
10
25
0.7 1.25 1.5
1686/87 G06
5
20
15
1.0 2.0 2.5
T
A
= 25°C
Minimum Input Pulse Width V
DD
= 5V ±5% (Note 4) LTC1686C/LTC1687C 17 19.2 ns
LTC1686I/LTC1687I 20 25 ns
Maximum Data Rate V
DD
= 5V ±5% (Note 4) LTC1686C/LTC1687C 52 60 Mbps
LTC1686I/LTC1687I 40 50 Mbps
Maximum Input Frequency V
DD
= 5V ±5% (Note 4) LTC1686C/LTC1687C 26 30 MHz
LTC1686I/LTC1687I 20 25 MHz
SWITCHING CHARACTERISTICS
U
VDD = 5V, unless otherwise noted (Notes 2, 3).
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
5
LTC1686/LTC1687
TYPICAL PERFORMANCE CHARACTERISTICS
UW
Receiver Propagation Delay
vs Temperature
TEMPERATURE (°C)
50 –25
0
PROPAGATION DELAY (ns)
10
25
050 75
1686/87 G09
5
20
15
25 100 125
Driver Propagation Delay
vs Temperature
TEMPERATURE (°C)
–20
0
PROPAGATION DELAY (ns)
5
10
15
20
25
020 40 60
1686/87 G07
80 100
Receiver Maximum Data Rate
vs Input Overdrive
RECEIVER INPUT DIFFERENTIAL (V)
0.3
40
50
70
0.6 1.0
1686/87 G10
30
20
0.4 0.5 0.7 1.5 2.5
10
0
60
DATA RATE (Mbps)
TA = 25°C
Driver Propagation Delay
vs Driver Input Voltage
DRIVER INPUT VOLTAGE (V)
2.5
PROPAGATION DELAY (ns)
15
20
25
4.5
1686/87 G08
10
5
03.0 3.5 4.0 5.0
t
LH
V
DD
= 5V
INPUT THRESHOLD = 1.5V
T
A
= 25°Ct
HL
Driver Propagation Delay
vs Capacitive Load
LOAD CAPACITANCE (pF)
5
16.0
PROPAGATION DELAY (ns)
16.5
17.0
17.5
18.0
19.0
15 25 50 75
1686/87 G11
100 150
18.5
TA = 25°C
PIN FUNCTIONS
UUU
LTC1686
V
DD
(Pin 1): Positive Supply, 5V to ±5%. Bypass with
0.1µF ceramic capacitor.
R (Pin 2): Receiver Output. If A B by 300mV, then R will
be high. If A B by 300mV, then R will be low.
D (Pin 3): Driver Input. Controls the states of the Y and Z
outputs. Do not float.
GND
(Pin 4): Ground.
Y (Pin 5): Noninverting Driver Output.
Z (Pin 6): Inverting Driver Output.
B (Pin 7): Inverting Receiver Input.
A (Pin 8): Noninverting Receiver Input.
LTC1687
NC (Pins 1, 8, 13): No Connection.
R (Pin 2): Receiver Output. If A B by 300mV, then R will
be high. If A B by 300mV, then R will be low.
RE (Pin 3): Receiver Enable. RE = low enables the receiver.
RE = high forces receiver output into high impedance
state. Do not float.
6
LTC1686/LTC1687
DE (Pin 4): Driver Enable. DE = high enables the driver.
DE = low will force the driver output into a high impedance
state. Do not float.
D (Pin 5): Driver Input. Controls the states of the Y and Z
outputs when DE = high. Do not float.
GND (Pins 6, 7): Ground.
Y (Pin 9): Noninverting Driver Output.
PIN FUNCTIONS
UUU
Z (Pin 10): Inverting Driver Output.
B (Pin 11): Inverting Receiver Input.
A (Pin 12): Noninverting Receiver Input.
V
DD
(Pin 14): Positive Supply, 5V to ±5%. Bypass with
0.1µF ceramic capacitor.
Receiving
INPUTS OUTPUT
RE DE A – B R
0X 300mV 1
0X 300mV 0
0 X Inputs Open 1
0 X Inputs Shorted Together 1
A = B = –7V to 12V
1 X X Hi- Z
FU CTIO TABLES
UU
Transmitting
INPUTS LINE OUTPUTS
RE DE D CONDITION Z Y
X 1 1 No Fault 0 1
X 1 0 No Fault 1 0
X 0 X X Hi- Z Hi- Z
X 1 X Fault ±10mA Current
Source
(LTC1687)
TEST CIRCUITS
V
OD
Y
Z
R
RV
OC
1686/87 • F01
Figure 1. Driver DC Test Load
RECEIVER
OUTPUT
C
L
15pF
1k
S1
S2
TEST POINT
V
DD
1k
1686/87 F02
Figure 2. Driver DC Test Load
OUTPUT
UNDER TEST
C
L
S1
S2
V
DD
500
1686/87 F04
Figure 3. Driver/Receiver Timing Test Circuit Figure 4. Driver Timing Test Load #2
3V
DE
Y
Z
DR
DIFF
C
L1
C
L2
R
15pF
A
B
RE
1686/87 F03
7
LTC1686/LTC1687
SWITCHI G TI E WAVEFOR S
UW W
Figure 5. Driver Propagation Delays
D
3V
1.5V
t
PLH
t
r
t
SKEW
1/2 V
O
90%
10%
0V
Z
Y
V
O
–V
O
0V
90%
1.5V
t
PHL
t
SKEW
1/2 V
O
f = 1MHz, t
r
3ns, t
f
3ns
10%
t
f
V
DIFF
= V(Y) – V(Z)
1686/87 F05
V
O
1.5V
t
ZL
2.5V
2.5V
t
ZH
1.5V
t
LZ
0.5V
0.5V
t
HZ
f = 1MHz, t
r
3ns, t
f
3ns
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
3V
0V
DE
5V
V
OL
V
OH
0V
Y, Z
Y, Z
1686/87 F06
Figure 6. Driver Enable and Disable Times
2.5V
t
PHL
f = 1MHz, t
r
3ns, t
f
3ns
R
–V
OD2
A – B 0V
2.5V
t
PLH
OUTPUT
INPUT
V
OD2
V
OL
V
OH
1686/87 F07
Figure 7. Receiver Propagation Delays
1.5V
t
ZL
2.5V
2.5V
t
ZH
1.5V
t
LZ
0.5V
0.5V
t
HZ
f = 1MHz, t
r
3ns, t
f
3ns
OUTPUT NORMALLY LOW
OUTPUT NORMALLY HIGH
3V
0V
RE
5V
0V
R
R
1686/87 F08
Figure 8. Receiver Enable and Disable Times
8
LTC1686/LTC1687
EQUIVALE T I PUT NETWORKS
UU
Figure 9. Input Thevenin Equivalent
A
B
1686/87 F09
22k
3.3V
22k
3.3V
RE = 0 OR 1, V
DD
= 5V V
DD
= 0V
A
B
22k
22k
APPLICATIONS INFORMATION
WUUU
THEORY OF OPERATION
Unlike typical CMOS transceivers whose propagation
delay can vary by as much as 500% from package to
package and show significant temperature drift, the
LTC1686/LTC1687 employ a novel architecture that pro-
duces a tightly controlled and temperature compensated
propagation delay. The differential timing skew is also
minimized between rising and falling output edges of the
receiver output and the complementary driver outputs.
The precision timing features of the LTC1686/LTC1687
reduce overall system timing constraints by providing a
narrow ±3.5ns window during which valid data appears at
the receiver/driver output. The driver and receiver will
have propagation delays that typically match to within 1ns.
In clocked data systems, the low skew minimizes duty
cycle distortion of the clock signal. The LTC1686/LTC1687
can be used at data rates of 52Mbps with less than 5% duty
cycle distortion (depending on cable length). When a clock
signal is used to retime parallel data, the maximum recom-
mended data transmission rate is 26Mbps to avoid timing
errors due to clock distortion.
FAIL-SAFE FEATURES
The LTC1686/LTC1687 have a fail-safe feature that guar-
antees the receiver output to be in a logic HIGH state when
the inputs are either shorted or left open (note that when
inputs are left open, large external leakage currents might
override the fail-safe circuitry). In order to maintain good
high frequency performance, it is necessary to slow down
the transient response of the fail-safe feature. When a line
fault is detected, the output will go HIGH typically in 2µs.
Note that the LTC1686/LTC1687 guarantee receiver fail-
safe performance over the
entire
(–7V to 12V) common
mode range!
When the inputs are accidentally shorted (by cutting
through a cable, for example), the short circuit fail-safe
feature will guarantee a high output logic level. Note also
that if the line driver is removed and the ground terminated
resistors are left in place, the receiver will see this as a
“short” and output a logic HIGH. Both of these fail-safe
features will keep the receiver from outputting false data
pulses under line fault conditions.
Thermal shutdown and short-circuit protection prevent
latchup damage to the LTC1686/LTC1687 during fault
conditions.
OUTPUT SHORT-CIRCUIT PROTECTION
The LTC1686/LTC1687 employ voltage sensing short-
circuit protection at the output terminals of both the driver
and receiver. For a given input polarity, this circuitry
determines what the correct output level should be. If the
output level is different from the expected, it shuts off the
big output devices. For example, if the driver input is >2V,
it expects the “A” output to be >3.25V and the “B” output
to be <1.75V. If the “A” output is subsequently shorted to
a voltage below V
DD
/2, this circuitry shuts off the big
output devices and turns on a smaller device in its place
9
LTC1686/LTC1687
(the converse applies for the “B” output). The outputs then
appear as ±10mA current sources. Note that under normal
operation, the output drivers can sink/source >50mA. A
time-out period of about 50ns is used in order to maintain
normal high frequency operation, even under heavy ca-
pacitive loads.
If the cable is shorted at a large distance from the device
outputs, it is possible for the short to go unnoticed at the
driver outputs due to parasitic cable resistance. Addition-
ally, when the cable is shorted, it no longer appears as a
simple transmission line impedance, and the parasitic L’s
and C’s might give rise to ringing and even oscillation. All
these conditions disappear once the device comes out of
short-circuit mode.
For cables with the typical RS485 termination (no DC bias
on the cable, such as Figure 10), the LTC1686/LTC1687
will automatically come out of short-circuit mode once the
physical short has been removed.
Cable Termination
The recommended cable termination for the LTC1686/
LTC1687 is a single resistor across the two wires at each
end of the twisted-pair line (see Figure 10). The LTC1687
can also be used with cable terminations with a DC bias
(such as Fast-20 and Fast-40 differential SCSI termina-
tors). When using a biased termination with the LTC1687,
however, the DE pin must be held low for at least 200ns
after the part has been powered up. This ensures proper
start-up into the DC load of the biased termination. Fur-
thermore, when the LTC1687 output is shorted, the DE pin
APPLICATIONS INFORMATION
WUUU
should be pulsed low for at least 200ns after the short has
been removed. Since the LTC1686 driver is always
enabled, the LTC1686 should only be used with single
resistor termination, as shown in Figure 10.
HIGH SPEED TWISTED-PAIR TRANSMISSION
Data rates up to 52Mbps can be transmitted over 100 feet
of category 5 twisted pair. Figure 10 shows the LTC1687
receiving differential data from another LTC1687 trans-
ceiver. Figure 11a shows a 26MHz (52Mbps) square wave
propagated over 100 feet of category 5 UTP. Figure 11b
shows a more stringent case of propagating a 20ns pulse
over 100 feet of category 5 UTP. Figure 12 shows a 2MHz
(4Mbps) square wave propagated over 1000 feet of
category 5 unshielded twisted pair. Note that the LTC1686/
LTC1687 can still perform reliably at this distance and
speed. Very inexpensive unshielded telephone grade
twisted pair is shown in Figure 13. Despite the noticeable
loss at the receiver input, the LTC1686/LTC1687 can still
transfer at 30Mbps over 100 feet of telephone grade UTP.
Note that under all these conditions, the LTC1686/LTC1687
can pass through a single data pulse equal to the inverse
of the data rate (e.g., 20ns for 50Mbps data rate).
TRANSMISSION OVER LONG DISTANCES
1Mbps Over 4000 Feet Category 5 UTP
The LTC1685/LTC1686/LTC1687 family of high speed
transceivers is capable of 1Mbps transmission over 4000
feet of category 5 UTP. High quality cable provides lower
Figure 10
LTC1686/87 • F10
100100
100100
LTC1687
R
D
R
D5
2
11
12
10
9
4
DE
3
RE
DE
RE
CATEGORY 5 UTP
RECEIVER
LTC1687
DRIVER RECEIVER
DRIVER
10
LTC1686/LTC1687
APPLICATIONS INFORMATION
WUUU
1686/87 F11a
DRIVER
INPUT
RECEIVER
OUTPUT
10ns/DIV
2V/DIV
2V/DIV
Figure 11a. 100 Feet of Category 5 UTP: 50Mbps
DC and AC attenuation over long distances. Figure 14a
shows a 1µs pulse propagated down 4000 feet of category
5 UTP. Notice the significant attenuation at the receiver
input and the clean pulse at the receiver output. The DC
attenuation is due to the parasitic resistance of the cable.
Figure 14b shows a 1Mbps square wave over the same
4000 feet of cable.
1686/87 F12
DRIVER
INPUT
RECEIVER
OUTPUT
100ns/DIV
2V/DIV
2V/DIV
Figure 12. 1000 Feet of Category 5 UTP: 4Mbps
1686/87 F13
DRIVER INPUT
DIFFERENTIAL
RECEIVER
INPUT
RECEIVER
OUTPUT
20ns/DIV
2V/DIV
2V/DIV
2V/DIV
1685 F11b
RECEIVER
INPUT
DRIVER
INPUT
RECEIVER
OUTPUT
20ns/DIV
2V/DIV
5V/DIV
2V/DIV CABLE DELAY
Figure 11b. 100 Feet of Category 5 UTP: 20ns Pulse
Figure 13. 100 Feet of Telephone Grade UTP: 30Mbps
1685 F14a
RECEIVER
INPUT
DRIVER
INPUT
RECEIVER
OUTPUT
1µs/DIV
1V/DIV
5V/DIV
2V/DIV CABLE DELAY
Figure 14a. 4000 Feet of Category 5 UTP 1µs Pulse
1685 F14b
DRIVER
INPUT
RECEIVER
OUTPUT
1µs/DIV
5V/DIV
2V/DIV
Figure 14b. 4000 Feet of Category 5 UTP 1Mbps Square Wave
1.6Mbps Over 8000 Feet (1.5 Miles)
Category 5 UTP Using Repeaters
The LTC1686/LTC1687 can be used as repeaters to extend
the effective length of a high speed twisted-pair line. Figure
15a shows a three repeater configuration using 2000 feet
segments of category 5 UTP. Figure 15b shows the
11
LTC1686/LTC1687
APPLICATIONS INFORMATION
WUUU
Figure 15a. 1.6Mbps, 8000 Feet (1.5 Miles) Using Three Repeaters
2V/DIV
5V/DIV
2V/DIV
5V/DIV
DRIVER 1
INPUT
RECEIVER 5
OUTPUT
DRIVER 1
INPUT
RECEIVER 5
OUTPUT
1686/87 F15b
2µs/DIV
DELAY OF 8000 FT
OF CABLE
goes above or below the rails. It is advisable to terminate
the PC traces when approaching maximum speeds. Since
the LTC1686/LTC1687 are not intended to drive parallel
terminated cables with characteristic impedances much
less than that of twisted pair, both ends of the PC trace
must be
series terminated
with the characteristic imped-
ance of the trace. For best results, the signal should be
routed differentially. The true and complement outputs of
the LTC1686/LTC1687 should be routed on adjacent lay-
ers of the PC board. The two traces should be routed very
symmetrically, minimizing and equalizing parasitics to
nearby signal and power/ground layers. For single-ended
transmission, route the series terminated single-ended
trace over an adjacent ground plane. Then set the (by-
passed) negative input of the receiver to roughly 2.5V.
Note that single-ended operation might not reach maxi-
mum speeds.
LAYOUT CONSIDERATIONS
A ground plane is recommended when using high fre-
quency devices like the LTC1686/LTC1687. A 0.1µF ce-
ramic bypass capacitor less than 0.25 inch away from the
V
DD
pin is also recommended.
propagation of a 600ns pulse through the network of
Figure 15A. The bottom two traces show a 1.6Mbps
square wave. Notice that the duty cycle does not notice-
ably degrade. For the case of the single pulse, however,
there is a slight degradation of the pulse width.
By slowing down the data rate slightly to 1Mbps, one can
obtain minimal pulse width degradation as the signal
traverses through the repeater network. Figure 16 shows
that the output pulse (bottom trace) is nearly the same
width to the input pulse (top trace). The middle three
traces of Figure 16 show the signal at the end of each of the
first three 2000 feet sections of category 5 UTP. Notice
how the LTC1687 repeaters are able to regenerate the
signal with little loss. This implies that we can cascade
more repeater networks and potentially achieve 1Mbps
operation at total distances of over 10,000 feet! A higher
data rate can be achieved if the repeaters are spaced closer
together.
HIGH SPEED BACKPLANE TRANSMISSION
The LTC1686/LTC1687 can also be used in backplane
point-to-point transceiver applications, where the user
wants to assure operation even when the common mode
2V/DIV
1V/DIV
1V/DIV
1V/DIV
5V/DIV
DRIVER 1
INPUT
RECEIVER 2
INPUT
RECEIVER 3
INPUT
RECEIVER 4
INPUT
RECEIVER 5
OUTPUT
1686/87 F16
2µs/DIV
Figure 15b. 1.6Mbps Pulse and Square Wave Signals
Over 8000 Feet Category 5 UTP Using Three Repeaters
Figure 16. Intermediate Signals of a 1µs Pulse
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC1687
LTC1687
REPEATER
2000 FT 2000 FT 2000 FT 2000 FT
1686/87 F15a
LTC1687
REPEATER
LTC1687
REPEATER
LTC1687
DR5R4DR3DR2D1
R
12
LTC1686/LTC1687
LINEAR TECHNOLOGY CORPORATION 1997
16867fs, sn16867 LT/TP 1197 4K • PRINTED IN THE USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
FAX: (408) 434-0507
TELEX: 499-3977
www.linear-tech.com
Long traces bounded by a V
DD
and/or GND planes can add
substantial parasitic capacitance. Parasitic capacitances
on the receiver/driver outputs can also unduly slow down
both the propagation delay and the rise/fall times.
APPLICATIONS INFORMATION
WUUU
The receiver inputs are high bandwidth and high imped-
ance. If they are left floating, any capacitive coupling from
any other signal can cause a glitch at the receiver output.
Thus, if the receiver is not being used, it is advisable to
always ground at least one of the two receiver input pins.
PACKAGE DESCRIPTION
U
Dimensions in inches (millimeters) unless otherwise noted.
S8 Package
8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
PART NUMBER DESCRIPTION COMMENTS
LTC490 Low Power RS485 Full-Duplex Transceiver I
CC
= 300µA (Typ), SO-8 Package
LTC491 Low Power RS485 Full-Duplex Transceiver I
CC
= 300µA (Typ), 14-Lead SO Package
LTC1518 High Speed Quad RS485 Receiver 52Mbps, Pin Compatible with LTC488
LTC1519 High Speed Quad RS485 Receiver 52Mbps, Pin Compatible with LTC489
LTC1520 High Speed Quad Differential Receiver 52Mbps, ±100mV Threshold, Rail-to-Rail Common Mode
LTC1685 High Speed RS485 Transceiver 52Mbps, Pin Compatible with LTC485
RELATED PARTS
SO8 0996
0.016 – 0.050
0.406 – 1.270
0.010 – 0.020
(0.254 – 0.508)× 45°
0°– 8° TYP
0.008 – 0.010
(0.203 – 0.254)
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
TYP
1234
0.150 – 0.157**
(3.810 – 3.988)
8765
0.189 – 0.197*
(4.801 – 5.004)
0.228 – 0.244
(5.791 – 6.197)
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
S Package
14-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
S14 0695
1234
0.150 – 0.157**
(3.810 – 3.988)
14 13
0.337 – 0.344*
(8.560 – 8.738)
0.228 – 0.244
(5.791 – 6.197)
12 11 10 9
567
8
0.016 – 0.050
0.406 – 1.270
0.010 – 0.020
(0.254 – 0.508)× 45°
0° – 8° TYP
0.008 – 0.010
(0.203 – 0.254)
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
TYP
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**