Si9243AEY
Vishay Siliconix
Document Number: 70788
S-40136—Rev. E, 16-Feb-04
www.vishay.com
1
Single-Ended Bus Transceiver
FEATURES
DOperating Power Supply Range 6 V v VBAT v 36 V
DReverse Battery Protection Down to VBAT w −24 V
DStandby Mode With Very Low Current Consumption
IBAT(SB) = 1 A @ VDD = 0.5 V
DLow Quiescent Current in OFF Condition
IBAT = 120 A and IDD v 10 A
DISO 9141 Compatible
DOvertemperature Shutdown Function For K Output
DDefined K Output OFF for Open GND
DDefined Receive Output Status for Open L or K Inputs
DDefined K Output OFF for TX Input Open
D2-kV ESD
DTypical Transmit Speeds of 200 kBaud
DESCRIPTION
The Si9243AEY is a monolithic bus transceiver designed to
provide bidirectional serial communication in automotive
diagnostic applications.
The device incorporates protection against overvoltages and
short circuits to VBAT
. The transceiver pin is protected and can be
driven beyond the VBAT voltage.
The RX output is capable of driving CMOS or 1 LSTTL load.
The Si9243AEY is built on the Vishay Siliconix BiC/DMOS
process. This process supports bipolar transistors, CMOS, and
DMOS. An epitaxial layer prevents latchup.
The Si9243AEY is available in a 8-pin SO package and
operates over the automotive temperature range (−40 to
125_C). The Si9243AEY is available in lead free.
PIN CONFIGURATION AND FUNCTIONAL BLOCK DIAGRAM
TX
RXL
K
L
+
−
L
+
−
K
+
−
VBAT/2
K
Logic and Fault Detect Circuitry
(See State Diagram and Truth Table)
VBAT
VDD
GND
RXK
VDD
VDD
VDD
A = 1 A = 0
Over Temp
Over Temp @TX
B = 1 B = 0
Short Circuit
TX
Power On
Power On
Note: Over Temp is an internal condition, not meant
to be a logic signal.
Si9243AEY
Vishay Siliconix
www.vishay.com
2
Document Number: 70788
S-40136—Rev. E, 16-Feb-04
OUTPUT TABLE AND STATE DIAGRAMS
INPUTS
STATE
VARIABLE
OUTPUT
TABLE
TX L A B K RXKRXLComments
0 0 1 1 0 0 0
1 1 1 1 1 1 1
0 1 1 1 0 0 1
1 0 1 1 1 1 0
X L 0 1 HiZ K L Over Temp
0 L 1 0 HiZ K L Short Circuit
1 1 1 1 1 1 1 Receive Mode
1 0 1 1 0 0 0
X = “1” or “0”
HiZ = High Impedance State
ABSOLUTE MAXIMUM RATINGS
Voltage Referenced to Ground
Voltage On VBAT −24 V to 45 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage K , L −16 V to (VBAT + 1 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage Difference V(VBAT, K, L) 55 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage On Any Pin (Except VBAT , K, L)
or Max. Current −0.3 V to (VDD + 0.3 V) or 10 mA. . . . . . . . . . . . . . . . . . . . . .
Voltage on VDD 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
K Pin Only, Short Circuit Duration (to VBAT or GND) Continuous. . . . . . . . . .
Operating Temperature (TA)−40 to 125_C. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Junction and Storage Temperature -55 to 150_C. . . . . . . . . . . . . . . . . . . . . .
Thermal Resistance JA 125_C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Voltage Referenced to Ground
VDD 4.5 V to 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
VBAT 6 V to 36 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
K, L 6 V to 36 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital Inputs 0 to VDD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Si9243AEY
Vishay Siliconix
Document Number: 70788
S-40136—Rev. E, 16-Feb-04
www.vishay.com
3
SPECIFICATIONS
Test Conditions Unless Specified
V 4 5 to 5 5 V
Limits
−40 to 125_C
Parameter Symbol VDD = 4.5 to 5.5 V
VBAT = 6 to 36 V TempaMinbTypcMaxbUnit
Transmitter and Logic Levels
TX Input Low Voltage VILT Full 1.5
V
TX Input High Voltage VIHT Full 3.5
V
TX Input CapacitancedCINT Full 10 pF
TX Input Pull-up Resistance RTX VDD = 5.5 V, TX = 1.5 V, 3.5 V Full 10 20 40 k
K Transmit
RL = 510 "5% , VBAT = 6 to 18 V Full 0.2 VBAT
K Output Low Voltage VOLK RL = 1 k "5% , VBAT = 16 to 36 V Full 0.2 VBAT
pg
OLK
RL = 510 "5% , VBAT = 4.5 V Full 1.2
V
K Output High Voltage
VOHK
RL = 510 "5% , VBAT = 4.5 to 18 V Full 0.95
VBAT
V
K Output High Voltage VOHK
RL = 1 k "5% , VBAT = 16 to 36 V Full 0.95
VBAT
K Rise, Fall Times tr, tfSee Test Circuit Full 9.6 s
K Output Sink Resistance Rsi
TX = 0 V
Full 110
K Output CapacitancedCO
TX = 0 V Full 20 pF
Receiver
L and K Input High Voltage VIH Full 0.65
VBAT
V
L and K Input Hysteresisc, dVHYS Full 0.05
VBAT
V
L and K Input Currents IIH VIH = VBAT Full 20 A
RXL and RXK Output
Low Voltage VOLR
TX = 4 V VILK, VILL = 0.35 VBAT
IOLR = 1 mA Full 0.4 V
RXL and RXK Pull-up Resistance RRX Full 5 20 k
RXK Turn On Delay
td( )
RL = 510 "5% , VBAT = 6 to 18 V
CL = 10 nF, See Test Circuit Full 3 10
RXK Turn On Delay td(on) RL = 1 k "5% , VBAT = 16 to 36 V
CL = 4.7 nF, See Test Circuit Full 3 10
s
RXK Turn Off Delay
td( ff)
RL = 510 "5% , VBAT = 6 to 18 V
CL = 10 nF, See Test Circuit Full 3 10
s
RXK Turn Off Delay td(off) RL = 1 k "5% , VBAT = 16 to 36 V
CL = 4.7 nF, See Test Circuit Full 3 10
Supplies
Bat Supply Current On IBAT(on) TX = 0 V, VBAT v 16 V Full 1.2 3 mA
Bat Supply Current Off IBAT(off) VIHT v VTX, VIHK v VK, VIHL v VL VBAT
v 12 V Full 120 220
A
Bat Supply Current Standby IBAT(SB) VDD v 0.5 V, VBAT v 12 V Full t1 10
A
Logic Supply Current On IDD(on) VDD v 5.5 V, TX = 0 V Full 1.4 2.3 mA
Logic Supply Current Off IDD(off) VIHT v VTX, VIHK v VK, VIHL v VL VBAT
v 12 V Full 10
Miscellaneous
TX Transmit Baud Rate BRTRL = 510 , CL = 10 nF Full 10.4
kBaud
RXL and RXK Receive Baud RatecBRR6 V t VBAT < 16 V, CRX = 20 pF Full 200
kB
au
d
Transmission Frequency fK-RXK 6 V t VBAT < 16 V, RK = 510 CK v 1.3 nF Full 50 200 kHz
TX Minimum Pulse Widthd, etTX Full 1 s
Over Temperature ShutdowndTSHUT Temperature Rising 160 180
_
C
Temperature Shutdown HysteresiscTHYST 30
_C
Notes
a. Room = 25_C, Cold and Hot = as determined by the operating temperature suffix.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. Guaranteed by design, not subject to production test.
e. Minimum pulse width to reset a fault condition.
1
2
3
45
6
7
8
Top View
Narrow Body
RXL
RXK
TX
VBAT
K
GND
SO Package
VDD
L
Si9243AEY
Vishay Siliconix
www.vishay.com
4
Document Number: 70788
S-40136—Rev. E, 16-Feb-04
PIN CONFIGURATION
ORDERING INFORMATION
Part Number Temperature Range
Si9243AEY-T1
40 to 125_C
Si9243AEY-T1—E3 (Lead Free)
−40 to 125_C
PIN DESCRIPTION
Pin Number Symbol Description
1 RXKK Receiver, Output
2 RXLL Receiver, Output
3 VDD Positive Power Supply
4 TX Transmit, Input
5 GND Ground Connection
6 K K Transmit/Receive, Bidirectional
7 VBAT Battery Power Supply
8 L L Transmit, Input
FUNCTIONAL DESCRIPTION
The Si9243AEY can be either in transmit or receive mode and
it contains over temperature, and short circuit VBAT fault
detection circuits.
The voltage on the K and L pins are internally compared to
VBAT/2. If the voltage on the K or L pin is less than VBAT/2 then
RXK or RXL output will be “low.” If the voltage on the K or L pin
is greater than VBAT/2 then RXK or RXL output will be “high.
In order to be in transmit mode, TX must be set “low.” The TX
signal is then internally inverted and turns the MOSFET on,
causing the K pin to be “low.” In transmit mode, the processor
monitors the RXK and TX. When the two mirror each other
there is no fault. In the event of over temperature, or short
circuit to VBAT
, the Si9243AEY will turn off the K output to
protect the IC. The K pin will stay in high impedance and RXK
will follow the K pin. The fault will be reset when TX is toggled
high. RXK, RXL and TX pins have internal pull up resistor to
VDD while K and L pins have internal pull down resistors. When
any one of the TX, VBAT or GND pins is open the K output is off.
When the TX pin is set “high” the Si9243AEY is in receive
mode and the internal MOSFET is turned off. RXL and RXK
outputs will follow L and K inputs respectively.
Si9243AEY
Vishay Siliconix
Document Number: 70788
S-40136—Rev. E, 16-Feb-04
www.vishay.com
5
TEST CIRCUIT AND TIMING DIAGRAMS (TRANSMIT ONLY)
td(off)
VK, VL
VBAT
VDD
GND
K
TX
Si9243AEY
VBAT
RL
CL
80% 80%
20%20%
trtf
−
+
V−
+
RXK
TXmin
td(on)
VBAT
RL = 510 , CL = 10 nF, VBAT = 6 V to 18 V
RL = 1 k, CL = 4.7 nF, VBAT = 16 V to 36 V
−
+
RXL
RXK
L
TX
VDD
VDD
VDD
APPLICATION CIRCUIT
VB
Microcontroller
ECU
I/Os
ECU = Electronic Control Unit
L-Line
Diagnostic Tester
510
0.4
K-Line
Bus
VDD
VBAT
C1
0.1 F
C1
0.1 F
50 V
Si9243AEY
−
+
V−
+
−
+
VDD
VDD
VDD
