General Description
The MAX6846–MAX6849 are a family of ultra-low-power
battery monitors with integrated microprocessor (µP)
supervisors. The user-adjustable battery monitors are
offered with single or dual low-battery output options that
can be used to signal when the battery is OK (enabling
full system operation), when the battery is low (for low-
power system operation), and when the battery is dead
(to disable system operation). These devices also have
an independent µP supervisor that monitors VCC and
provides an active-low reset output. A manual reset
function is available to reset the µP with a pushbutton.
The MAX6846–MAX6849 are ideal for single-cell lithium-
ion (Li+) or multicell alkaline/NiCd/NiMH applications.
When the battery voltage drops below each adjusted low
threshold, the low-battery outputs are asserted to alert
the system. When the voltage rises above the adjusted
high thresholds, the outputs are deasserted after a
150ms minimum timeout period, ensuring the voltages
have stabilized before power circuitry is activated or pro-
viding microprocessor reset timing.
These devices have user-adjustable battery threshold
voltages, providing a wide hysteresis range to prevent
chattering that can result due to battery recovery after
load removal. Single low-battery outputs are supplied
by the MAX6846/MAX6847 and dual low-battery out-
puts are supplied by the MAX6848/MAX6849. All bat-
tery monitors have open-drain low-battery outputs.
The MAX6846–MAX6849 monitor system voltages
(VCC) from 1.8V to 3.3V with seven fixed reset threshold
options. Each device is offered with two minimum reset
timeout periods of 150ms or 1200ms. The MAX6846/
MAX6848 are offered with an open-drain RESET output
and the MAX6847/MAX6849 are offered with a push-
pull RESET output.
The MAX6846–MAX6849 are offered in a SOT23 pack-
age and are fully specified over a -40°C to +85°C temp-
erature range.
Applications
Battery-Powered Systems (Single-Cell Li+ or
Multicell NiMH, NiCd, Alkaline)
Cell Phones/Cordless Phones
Portable Medical Devices
Digital Cameras
Pagers
PDAs
MP3 Players
Electronic Toys
Features
♦User-Adjustable Thresholds for Monitoring
Single-Cell Li+ or Multicell Alkaline/NiCd/NiMH
Applications
♦Single and Dual Low-Battery Output Options
♦Independent µP Reset with Manual Reset
♦Factory-Set Reset Thresholds for Monitoring 1.8V
to 3.3V Systems
♦Available with 150ms (min) or 1.2s (min) VCC
Reset Timeout Period Options
♦150ms (min) LBO Timeout Period
♦Immune to Short-Battery Voltage Transients
♦Low Current (2.5µA, typ at 3.6V)
♦-40°C to +85°C Operating Temperature Range
♦Small 8-Pin SOT23 Packages
MAX6846–MAX6849
Low-Power, Adjustable Battery Monitors with
Hysteresis and Integrated µP Reset
________________________________________________________________ Maxim Integrated Products 1
TOP VIEW
MR
RESETLBO
1
2
8
7
VCC
HTHINGND
LTHIN
VDD
SOT23
3
4
6
5
MAX6846
MAX6847
1
2
8
7
VCC
HTHINGND
LTHIN
VDD
SOT23
3
4
6
5
MAX6848
MAX6849
LBOL
LBOH
RESET
Pin Configurations
Ordering Information
19-2947; Rev 1; 11/05
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
PART TEMP RANGE
PIN-PACKAGE
MAX6846KA_D_-T -40°C to +85°C 8 SOT23-8
MAX6847KA_D_-T -40°C to +85°C 8 SOT23-8
MAX6848KA_D_-T -40°C to +85°C 8 SOT23-8
MAX6849KA_D_-T -40°C to +85°C 8 SOT23-8
Note: The first “_” is the VCC reset threshold level, suffix found
in Table 1. The “_” after the D is a placeholder for the reset
timeout period suffix found in Table 2. All devices are available
in tape-and-reel only. There is a 2500 piece minimum order
increment for standard versions (see Standard Versions table).
Sample stock is typically held on standard versions only. Non-
standard versions require a minimum order increment of
10,000 pieces. Contact factory for availability.
Devices are available in both leaded and lead-free packaging.
Specify lead-free by replacing “-T” with “+T” when ordering.
MAX6846–MAX6849
Low-Power, Adjustable Battery Monitors with
Hysteresis and Integrated µP Reset
2_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
*Applying 7V for a duration of 1ms does not damage the device.
VDD, VCC to GND....................................................-0.3V to +6V*
Open-Drain LBO, LBOH, LBOL to GND .................-0.3V to +6V*
Open-Drain RESET to GND ....................................-0.3V to +6V*
Push-Pull RESET to GND............................-0.3V to (VCC + 0.3V)
HTHIN, LTHIN to GND................................-0.3V to (VDD + 0.3V)
MR to GND .................................................-0.3V to (VCC + 0.3V)
Input/Output Current, All Pins .............................................20mA
Continuous Power Dissipation (TA= +70°C)
8-Pin SOT23 (derate 8.9mW/°C above +70°C)............714mW
Operating Temperature Range .......................... -40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
ELECTRICAL CHARACTERISTICS
(VDD = 1.6V to 5.5V, VCC = 1.2V to 5.5V, TA= -40°C to +85°C, unless otherwise specified. Typical values are at TA= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
UNITS
VDD Operating Voltage Range VDD 1.6 5.5 V
TA = 0°C to +85°C 1.0 5.5
VCC Operating Voltage Range VCC TA = -40°C to +85°C 1.2 5.5 V
VCC + VDD Supply Current
ICC + IDD
VDD = 3.6V, VCC = 3.3V, no load (Note 2) 2.5 7 µA
MAX6846/MAX6847 VDD THRESHOLDS
HTHIN Threshold VHTH HTHIN rising, LBO is deasserted when
HTHIN rises above VHTH
600 615 630
mV
LTHIN Threshold VLTH LTHIN falling, LBO is asserted when LTHIN
falls below VLTH
600 615 630
mV
MAX6848/MAX6849 VDD THRESHOLDS
HTHIN+ Threshold VHTH+ HTHIN rising, LBOH is deasserted when
HTHIN rises above VHTH+
600 615 630
mV
HTHIN- Threshold VHTH- HTHIN falling, LBOH is asserted when
HTHIN falls below VHTH-
567 582 597
mV
LTHIN+ Threshold VLTH+ LTHIN rising, LBOL is deasserted when
LTHIN rises above VLTH+
600 615 630
mV
LTHIN- Threshold VLTH- LTHIN falling, LBOL is asserted when
LTHIN falls below VLTH-
567 582 597
mV
MAX6846–MAX6849
HTHIN/LTHIN Leakage Current ILKG VHTHIN or VLTHIN ≥ 400mV 20 nA
LBO , LBO L, LBO H Ti m eout P er i od
tLBOP HTHIN/LTHIN rising above threshold
150 225 300
ms
LBO, LBOL, LBOH Delay Time tLBOD HTHIN/LTHIN falling below threshold
100
µs
(VDD or VCC) ≥ 1.2V, ISINK = 50µA, asserted
low 0.3
(VDD or VCC) ≥ 1.6V, ISINK = 100µA,
asserted low 0.3
(VDD or VCC) ≥ 2.7V, ISINK = 1.2mA,
asserted low 0.3
LBO, LBOL, LBOH Output Low VOL
(VDD or VCC) ≥ 4.5V, ISINK = 3.2mA,
asserted low 0.3
V
MAX6846–MAX6849
Low-Power, Adjustable Battery Monitors with
Hysteresis and Integrated µP Reset
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 1.6V to 5.5V, VCC = 1.2V to 5.5V, TA= -40°C to +85°C, unless otherwise specified. Typical values are at TA= +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
TYP
MAX
UNITS
LBO, LBOL, LBOH Output
Open-Drain Leakage Current Output deasserted
500
nA
MAX68_ _ _ _ T
3.000 3.075 3.150
MAX68_ _ _ _ S
2.850 2.925 3.000
MAX68_ _ _ _ R
2.550 2.625 2.700
MAX68_ _ _ _ Z
2.250 2.313 2.375
MAX68_ _ _ _ Y
2.125 2.188 2.250
MAX68_ _ _ _ W
1.620 1.665 1.710
VCC Reset Threshold VTH
MAX68_ _ _ _ V
1.530 1.575 1.620
V
VCC Reset Hysteresis 0.3 %
VCC to RESET Delay tRD VCC falling at 10mV/µs from (VTH + 100mV)
to (VTH - 100mV) 50 µs
MAX68_ _ _ _ _ D3
150 225 300
VCC to RESET Timeout Period tRP MAX68_ _ _ _ _ D7
1200 1800 2400
ms
VIL
0.3 x VCC
MR Input Voltage VIH
0.7 x VCC
V
MR Minimum Pulse Width tMPW 1µs
MR Glitch Rejection
100
ns
MR to RESET Delay
200
ns
MR Reset Timeout Period tMRP
150 225 300
ms
MR Pullup Resistance MR to VCC
750 1500 2250
Ω
MR Rising Debounce Period tDEB (Note 3)
150 225 300
ms
VCC ≥ 1.53V, ISOURCE = 100µA, RESET
deasserted
0.8 x VCC
RESET Output High
(Push-Pull) VOH VCC ≥ 2.55V, ISOURCE = 500µA, RESET
deasserted
0.8 x VCC
V
VCC ≥ 1.0V, ISINK = 50µA, RESET asserted
0.3
VCC ≥ 1.2V, ISINK = 100µA, RESET asserted
0.3
RESET Output Low VOL VCC ≥ 2.12V, ISINK = 1.2mA, RESET
asserted 0.3
V
RESET Output Leakage Current
(Open Drain) RESET deasserted
500
nA
Note 1: Production testing done at TA= +25°C; limits over temperature guaranteed by design only.
Note 2: The device is powered up by the highest voltage between VDD and VCC.
Note 3: MR input ignores falling input pulses, which occur within the MR debounce period (tDEB) after a valid MR reset assertion.
This prevents invalid reset assertion due to switch bounce.
MAX6846–MAX6849
Low-Power, Adjustable Battery Monitors with
Hysteresis and Integrated µP Reset
4_______________________________________________________________________________________
SUPPLY CURRENT
vs. TEMPERATURE
MAX6846-49 toc01
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
6040200-20
1
2
3
4
0
-40 80
VCC = 3.3V, VDD = 3.6V
TOTAL
IDD
ICC
NORMALIZED LBO TIMEOUT PERIOD
vs. TEMPERATURE
MAX6846-49 toc02
TEMPERATURE (°C)
NORMALIZED LBO TIMEOUT PERIOD
6040200-20
0.95
1.00
1.05
1.10
0.90
-40 80
NORMALIZED RESET TIMEOUT PERIOD
vs. TEMPERATURE
MAX6846-49 toc03
TEMPERATURE (°C)
NORMALIZED RESET TIMEOUT PERIOD
6040200-20
0.950
1.000
1.050
1.100
0.900
-40 80
MAXIMUM VLTH/VHTH TRANSIENT DURATION
vs. THRESHOLD OVERDRIVE
MAX6846-49 toc04
THRESHOLD OVERDRIVE (mV)
MAXIMUM VLTH/VHTH TRANSIENT DURATION (µs)
120
60
70
80
90
100
110
10 100 1000
LBO ASSERTS ABOVE THIS LINE
MAXIMUM VCC TRANSIENT DURATION
vs. THRESHOLD OVERDRIVE
MAX6846-49 toc05
THRESHOLD OVERDRIVE (mV)
MAXIMUM VCC TRANSIENT DURATION (µs)
100
20
60
30
40
50
70
80
90
10 100 1000
RESET OCCURS ABOVE THIS LINE
Typical Operating Characteristics
(VDD = 3.6V, VCC = 3.3V, unless otherwise specified. Typical values are at TA= +25°C.)
MAX6846–MAX6849
Low-Power, Adjustable Battery Monitors with
Hysteresis and Integrated µP Reset
_______________________________________________________________________________________ 5
NORMALIZED UPPER AND LOWER LBO TRIP
VOLTAGES vs. TEMPERATURE
MAX6846-49 toc06
TEMPERATURE (°C)
NORMALIZED LBO TRIP VOLTAGES
6040200-20
0.975
1.000
1.025
1.050
0.950
-40 80
NORMALIZED RESET THRESHOLD
vs. TEMPERATURE
MAX6846-49 toc07
TEMPERATURE (°C)
NORMALIZED RESET THRESHOLD
6040200-20
0.975
1.000
1.025
1.050
0.950
-40 80
LBO OUTPUT
vs. SINK CURRENT
MAX6846-49 toc08
ISINK (mA)
LBO OUTPUT (mV)
8642
20
40
60
80
100
120
0
010
VCC = VDD = 3.3V
RESET OUTPUT
vs. SINK CURRENT
MAX6846-49 toc09
ISINK (mA)
RESET OUTPUT (mV)
8642
20
40
60
80
100
120
140
0
010
VCC = 2.1V, VDD = 3.6V
RESET OUTPUT
vs. SOURCE CURRENT
MAX6846-49 toc10
ISOURCE (mA)
RESET OUTPUT (V)
3.02.52.01.51.00.5
2.75
3.00
3.25
3.50
2.50
0 3.5
VCC = 3.3V, VDD = 3.6V
Typical Operating Characteristics (continued)
(VDD = 3.6V, VCC = 3.3V, unless otherwise specified. Typical values are at TA= +25°C.)
MAX6846–MAX6849
Low-Power, Adjustable Battery Monitors with
Hysteresis and Integrated µP Reset
6_______________________________________________________________________________________
Detailed Description
The MAX6846–MAX6849 family is available with several
monitoring options. The MAX6846/MAX6847 have single
low-battery outputs and the MAX6848/MAX6849 have
dual low-battery outputs (see Figures 1a and 1b).
The MAX6846–MAX6849 combine a 615mV reference
with two comparators, logic, and timing circuitry to pro-
vide the user with information about the charge state of
the power-supply batteries. The MAX6848/MAX6849
monitor separate high-voltage and low-voltage thresh-
olds to determine battery status. The output(s) can be
used to signal when the battery is charged, when the
battery is low, and when the battery is empty. User-
adjustable thresholds are ideal for monitoring single-
cell Li+ or multicell alkaline/NiCd/NiMH power supplies.
When the power-supply voltage drops below the speci-
fied low threshold, the low-battery output asserts. When
the voltage rises above the specified high threshold fol-
lowing a 150ms (min) timeout period, the low-battery
output is deasserted. This ensures the supply voltage
has stabilized before power-converter or microproces-
sor activity is enabled.
These devices also have an independent µP supervisor
that monitors VCC and provides an active-low reset out-
put. A manual reset function is available to allow the
user to reset the µP with a pushbutton.
Pin Description
PIN
MAX6846/MAX6847
MAX6848/MAX6849 NAME
FUNCTION
11V
DD VDD Supply. Device power supply if VDD is greater than VCC.
22GND Ground
33
LTHIN
LTH Threshold Monitor Input. A resistor-divider network sets the low
threshold associated with LBOL and LBO.
4—LBO
Low-Battery Output, Active-Low, Open-Drain. LBO is asserted when LTHIN
drops below the VLTH specification and remains asserted until HTHIN rises
above the VHTH specification for at least 150ms.
55
RESET
Reset Output, Active-Low, Push-Pull, or Open-Drain. RESET goes from high
to low when the VCC input drops below the selected reset threshold and
remains low for the VCC reset timeout period after VCC exceeds the reset
threshold. RESET is one-shot edge-trigger pulsed low for the MR reset
timeout period when the MR input is pulled low. RESET is an open-drain
output for the MAX6846/MAX6848, and a push-pull output for the
MAX6847/MAX6849. The push-pull outputs are referenced to VCC. RESET
is guaranteed to be in the correct logic state for VDD or VCC ≥ 10V.
6—MR
Manual Reset Input, Active-Low, Internal 1.5kΩ Pullup to VCC. Pull MR low
to assert a one-shot reset output pulse for the MR reset timeout period.
Leave unconnected or connect to VCC if unused. The MR input is
debounced for MR rising edges to prevent false reset events.
77
HTHIN
HTH Threshold Monitor Input. A resistor-divider network sets the high
threshold associated with LBOH and LBO.
88V
CC VCC Voltage Input. Input for VCC reset threshold monitor and device power
supply if VCC is greater than VDD.
—6
LBOH
Low-Battery Output High, Active-Low, Open-Drain. LBOH is asserted when
HTHIN drops below the VHTH- specification. LBOH is deasserted when
HTHIN rises above the VHTH+ specification for at least 150ms.
—4
LBOL
Low-Battery Output Low, Active-Low, Open-Drain. LBOL is asserted when
LTHIN drops below the VLTH- specification. LBOL is deasserted when
LTHIN rises above the VLTH+ specification for at least 150ms.
MAX6846–MAX6849
Low-Power, Adjustable Battery Monitors with
Hysteresis and Integrated µP Reset
_______________________________________________________________________________________ 7
5%
HYST
LTH
DETECT
VTH
DETECT
5%
HYST
HTH
DETECT
VDD
LTHIN
HTHIN
VCC
615mV
LBO
TIMEOUT
PERIOD
RESET
TIMEOUT
PERIOD
LBOL
LBOH
RESET
MAX6848
1.23V
Figure 1b. MAX6848 Functional Diagram
MAX6847
LTH
DETECT
HTH
DETECT
R
S
Q
LBO TIMEOUT
PERIOD
RESET
TIMEOUT
PERIOD
VTH
DETECT
VCC
VCC
VDD
LTHIN
HTHIN
LBO
RESET
VCC
615mV
Q
MR
1.23V
Figure 1a. MAX6847 Functional Diagram
Low-Battery Output
The low-battery outputs are available in active-low
(LBO, LBOL, LBOH), open-drain configurations. The
low-battery outputs can be pulled to a voltage indepen-
dent of VCC or VDD, up to 5.5V. This allows the device
to monitor and operate from direct battery voltage while
interfacing to higher voltage microprocessors.
The MAX6846/MAX6847 single-output voltage monitors
provide a single low-battery output, LBO. LBO asserts
when LTHIN drops below VLTH and remains asserted
for at least 150ms after HTHIN rises above VHTH (see
Figure 2). The MAX6848/MAX6849 dual-output voltage
monitors provide two low-battery outputs: LBOH and
LBOL. LBOH asserts when HTHIN drops below VHTH-
and remains asserted for at least 150ms after HTHIN
rises above VHTH+. LBOL asserts when LTHIN drops
below VLTH- and remains asserted for at least 150ms
after LTHIN rises above VLTH+ (see Figure 3). For fast-
rising VDD input, the LBOL timeout period must com-
plete before the LBOH timeout period begins.
Reset Output
The MAX6846–MAX6849 provide an active-low reset
output (RESET). RESET is asserted when the voltage at
VCC falls below the reset threshold level. Reset remains
asserted for the reset timeout period after VCC exceeds
the threshold. If VCC goes below the reset threshold
before the reset timeout period is completed, the inter-
nal timer restarts (see Figure 4). The MAX6846/
MAX6848 have open-drain reset outputs, while the
MAX6847/MAX6849 have push-pull reset outputs.
MAX6846–MAX6849
Low-Power, Adjustable Battery Monitors with
Hysteresis and Integrated µP Reset
8_______________________________________________________________________________________
LBO
LTH
HTH
VMONITORED
VTRIPHIGH
VTRIPLOW
VHYST = HYSTERESIS
LTHIN = 615mV
HTHIN = 615mV
tLBOP tLBOD tLBOP
VHYST
Figure 2. Single Low-Battery Output Timing
MR
GND
RESET tRP tMRP
GND
tMRP
tDEB
tMPW tMPW
tDEB
SWITCH
BOUNCE
SWITCH
BOUNCE
SWITCH
BOUNCE
SWITCH
BOUNCE
VTH
VCC
GND
Figure 4.
RESET
Timing Diagram
LBOL
LBOH
LTH-
LTH+
HTH-
HTH+ VMONITORED
tLBOP
tLBOP
tLBOD
tLBOP
tLBOP
tLBOD
(VTRIPHIGH +5%)
(VTRIPLOW +5%)
VTRIPHIGH
VTRIPLOW
VHYST = HYSTERESIS
VHYST = 5%
LTHIN = 615mV
LTHIN = 582mV
HTHIN = 615mV
HTHIN = 582mV
VHYST = 5%
Figure 3. Dual Low-Battery Output Timing
Manual Reset
Many microprocessor-based products require manual
reset capability, allowing the operator, a test technician,
or external logic circuitry to initiate a reset while the
monitored supplies remain above their reset thresholds.
These devices have a dedicated active-low MR pin.
When MR is pulled low, RESET asserts a one-shot low
pulse for the MR reset timeout period. The MR input has
an internal 1.5kΩpullup resistor to VCC and can be left
unconnected if not used. MR can be driven with CMOS-
logic levels, open-drain/open-collector outputs, or a
momentary pushbutton switch to GND (the MR function
is internally debounced for the tDEB timeout period) to
create a manual reset function. If MR is driven from long
cables, or if the device is used in a noisy environment,
connect a 0.1µF capacitor from MR to GND to provide
additional noise immunity (see Figure 4).
Hysteresis
Hysteresis increases the comparator’s noise margin by
increasing the upper threshold or decreasing the lower
threshold. The hysteresis prevents the output from
oscillating (chattering) when monitor input is near the
low-battery threshold. This is especially important for
applications where the load on the battery creates sig-
nificant fluctuations in battery voltages (see Figures 2
and 3).
For the MAX6846/MAX6847, hysteresis is set using three
external resistors (see Figure 5). The MAX6848/MAX6849
have dual, low-battery input levels. Each input level has a
5% (typ) hysteresis.
Applications Information
Resistor-Value Selection (Programming
the Adjustable Thresholds)
MAX6846/MAX6847
Use the following steps to determine values for R1, R2,
and R3 of Figure 5.
1) Choose a value for RTOTAL, the sum of R1, R2, and
R3. Because the MAX6846/MAX6847 have very high
input impedance, RTOTAL can be up to 500kΩ.
2) Calculate R3 based on RTOTAL and the desired
upper trip point:
3) Calculate R2 based on RTOTAL, R3, and the desired
lower trip point:
4) Calculate R1 based on RTOTAL, R3, and R2:
MAX6848/MAX6849
VLTH- = VHTH- = 582mV
LBOL low-trip level:
LBOH low-trip level:
Use the following steps to determine values for R1, R2,
and R3 of Figure 5.
VV
RR R
R
RRRR
TRIPHIGH HTH
TOTAL
=×
++
=++
-
12 3
3
12 3
VV
RR R
RR
TRIPLOW LTH
=×
++
+
-
12 3
23
RR RR
TOTAL
123 =--
RmV R
VR
TOTAL
TRIPLOW
2615 3 =×
-
RmV R
V
TOTAL
TRIPHIGH
3615
=×
VV mV
VV
RR R
RR
VV
RRR
R
RRRR
LTH HTH
TRIPLOW LTH
TRIPHIGH HTH
TOTAL
==
=×
++
+
=×
++
=++
615
12 3
23
123
3
12 3
MAX6846–MAX6849
Low-Power, Adjustable Battery Monitors with
Hysteresis and Integrated µP Reset
_______________________________________________________________________________________ 9
MAX6846
MAX6847
MAX6848
MAX6849
VDD VDD
LTHIN
HTHIN GND
* FOR THE MAX6846/MAX6847.
( ) FOR THE MAX6848/MAX6849.
(LBOH)
(LBOL)
R1
R2
R3
LBO*
Figure 5. Adjustable Threshold Selection
MAX6846–MAX6849
Low-Power, Adjustable Battery Monitors with
Hysteresis and Integrated µP Reset
10 ______________________________________________________________________________________
1) Choose a value for RTOTAL, the sum of R1, R2, and
R3. Because the MAX6848/MAX6849 have very high
input impedance, RTOTAL can be up to 500kΩ.
2) Calculate R3 based on RTOTAL and the desired
upper trip point:
3) Calculate R2 based on RTOTAL, R3, and the desired
lower trip point:
4) Calculate R1 based on RTOTAL, R3, and R2:
5) LBOL high-trip level:
VTRIPLOW ✕1.05
6) LBOH high-trip level:
VTRIPHIGH ✕1.05
Monitoring Multicell Battery Applications
For monitoring multicell Li+ (or a higher number of alka-
line/NiCd/NiMH cells), connect VDD to a supply voltage
between 1.6V to 5.5V. Figure 6 shows VDD connected
directly to VCC. To calculate the values of R1, R2, and
R3, see the Resistor-Value Selection section.
DC-DC Converter Application
The MAX6848/MAX6849 dual battery monitors can be
used in conjunction with a DC-DC converter to power
microprocessor systems using a single Li+ cell or two
to three alkaline/NiCd/NiMH cells. The LBOH output
indicates that the battery voltage is weak, and is used
to warn the microprocessor of potential problems.
Armed with this information, the microprocessor can
reduce system power consumption. The LBOL output
indicates the battery is empty and system power should
be disabled. By connecting LBOL to the SHDN pin of the
DC-DC converter, power to the microprocessor is
removed. Microprocessor power does not return until the
battery has recharged to a voltage greater than VLTH+
(see Figure 7).
RR RR
TOTAL
123 =--
RmV R
VR
TOTAL
TRIPLOW
2582 3 =×
-
RmV R
V
TOTAL
TRIPHIGH
3582
=×
PART NO.
SUFFIX
( _ )
VCC NOMINAL
RESET
THRESHOLD (V)
T3.075
S2.925
R2.625
Z2.313
Y2.188
W1.665
V1.575
Table 1. Factory-Trimmed VCC Reset
Threshold Levels
ACTIVE TIMEOUT PERIOD (ms)
TIMEOUT
PERIOD SUFFIX
MIN MAX
D3 150 300
D7 1200 2400
Table 2. VCC Reset Timeout Period Suffix
Guide
DC-DC
SHDN
VDD
RESET
MAX6848
MAX6849
LTHIN
HTHIN
NMI
RESET
µP
VCC
GND GND
VCC
Li+
3.6V
LBOL
LBOH
OUT
IN
Figure 7. DC-DC Converter Application
MAX6846
MAX6847
MAX6848
MAX6849
VMONITORED
VDD VCC
VCC
LTHIN
HTHIN GND
* FOR THE MAX6846/MAX6847.
( ) FOR THE MAX6848/MAX6849.
(LBOH)
R1
R2
R3
LBO*
(LBOL)
Figure 6. Monitoring Multicell Li+ Applications
MAX6846–MAX6849
Low-Power, Adjustable Battery Monitors with
Hysteresis and Integrated µP Reset
______________________________________________________________________________________ 11
PART OPEN-DRAIN
RESET PUSH-PULL RESET SINGLE LOW-
BATTERY OUTPUT
DUAL LOW-BATTERY
OUTPUT
MAX6846 X — X —
MAX6847 — X X —
MAX6848 X — — X
MAX6849 — X — X
Selector Guide
PART TOP MARK
MAX6846KARD3 AEJI
MAX6846KASD3 AEJD
MAX6846KAWD3 AEJK
MAX6846KAZD3 AEJJ
MAX6847KARD3 AEJE
MAX6847KASD3 AEJL
MAX6847KAWD3 AEJN
MAX6847KAZD3 AEJM
MAX6848KARD3 AEJP
MAX6848KASD3 AEJO
MAX6848KAWD3 AEJR
MAX6848KAZD3 AEJQ
MAX6849KARD3 AEJT
MAX6849KASD3 AEJS
MAX6849KAWD3 AEJV
MAX6849KAZD3 AEJU
Standard Versions Table
DC-DC
MR
VDD MAX6846
MAX6847
NMI
RESET
µP
VCC
Li+
3.6V
RESET
LBO
VCC
GND GND
LTHIN
HTHIN
Typical Application Circuit
Chip Information
TRANSISTOR COUNT: 1478
PROCESS: BiCMOS
MAX6846–MAX6849
Low-Power, Adjustable Battery Monitors with
Hysteresis and Integrated µP Reset
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
©2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
SOT23, 8L .EPS
REV.DOCUMENT CONTROL NO.APPROVAL
PROPRIETARY INFORMATION
TITLE:
3.002.60E
C
E1
E
BETWEEN 0.08mm AND 0.15mm FROM LEAD TIP.
8. MEETS JEDEC MO178.
8∞
0.60
1.75
0.30
L2
0∞
e1
e
L
1.50E1
0.65 BSC.
1.95 REF.
0.25 BSC.
GAUGE PLANE
SEATING PLANE C
C
L
PIN 1
I.D. DOT
(SEE NOTE 6)
L
C
L
C
A2
e1
D
DETAIL "A"
5. COPLANARITY 4 MILS. MAX.
NOTE:
7. SOLDER THICKNESS MEASURED AT FLAT SECTION OF LEAD
6. PIN 1 I.D. DOT IS 0.3 MM ÿ MIN. LOCATED ABOVE PIN 1.
4. PACKAGE OUTLINE INCLUSIVE OF SOLDER PLATING.
3. PACKAGE OUTLINE EXCLUSIVE OF MOLD FLASH & METAL BURR.
HEEL OF THE LEAD PARALLEL TO SEATING PLANE C.
2. FOOT LENGTH MEASURED FROM LEAD TIP TO UPPER RADIUS OF
1. ALL DIMENSIONS ARE IN MILLIMETERS.
L2
L
A1
A
0.45
1.30
0.15
1.45
MAX
0.28b
0.90A2
0.00A1
0.90
A
MIN
SYMBOL
3.00
0.20
2.80D
0.09
C
SEE DETAIL "A"
L
C
be
D1
21-0078
1
PACKAGE OUTLINE, SOT-23, 8L BODY
0
0