Data Sheet 1 Rev. 3.1
www.infineon.com 2016-04-05
2ED020I12FA
Dual IGBT Driver IC
SP001054678
1 Overview
Main Features
• Dual channel isolated IGBT Driver
• For 600V/1200V IGBTs
• 2 A rail-to-rail output
• Vcesat-detection
• Active Miller Clamp
Product Highlights
• Coreless transformer isolated driver
• Basic insulation according to DIN EN 60747-5-2
• Basic insulation recognized under UL 1577
• Integrated protection features
•Suitable for operation at high ambient temperature
• AEC Qualified
Typical Application
• Drive inverters for HEV and EV
• Auxiliary inverters for HEV and EV
• High Power DC/DC inverters
Description
The 2ED020I12FA is a galvanic isolated dual channel IGBT driver in PG-DSO-36 package (32 pins) that provides
two fully independent driver outputs with a current capability of typically 2A.
All logic pins are 5V CMOS compatible and could be directly connected to a microcontroller.
The data transfer across galvanic isolation is realized by the integrated Coreless Transformer Technology.
The 2ED020I12FA provides several protection features like IGBT desaturation protection, active Miller clamping
and active shut down.
Type Package Marking
2ED020I12FA PG-DSO-36 2ED020I12FA
Data Sheet 2 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.1 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2 Pin Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.2 Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.3 Internal Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.3.1 Undervoltage Lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.3.2 READY Status Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.3.3 Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.3.4 Active Shut-Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.4 Non-Inverting and Inverting Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.5 Driver Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.6 External Protection Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.6.1 Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.6.2 Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.6.3 Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.7 RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5 Electrical Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.2 Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.3 Recommended Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
5.4 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.4.1 Voltage Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.4.2 Logic Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.4.3 Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.4.4 Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.4.5 Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.4.6 Dynamic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.4.7 Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.4.8 Active Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6 Insulation Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.1 Certified according to DIN EN 60747-5-2 (VDE 0884 Teil 2): 2003-01. Basic Insulation . . . . . . . . . . 23
6.2 Recognized under UL 1577 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.3 Reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7 Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
8 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table of Contents
Data Sheet 3 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Figure 1 Block Diagram 2ED020I12FA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2 PG-DSO-36 (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3 Application Example Bipolar Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 4 Application Example Unipolar Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 5 Propagation Delay, Rise and Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 6 Typical Switching Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 7 DESAT Switch-Off Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 8 UVLO Behavior. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 9 PG-DSO-36 (Plastic (Green) Dual Small Outline Package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
List of Figures
Data Sheet 4 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Table 1 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 2 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 3 Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 4 Recommended Operating Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 5 Voltage Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 6 Logic Input and Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 7 Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 8 Active Miller Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 9 Short Circuit Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 10 Dynamic Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 11 Desaturation Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 12 Active Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 13 According to DIN EN 60747-5-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 14 Recognized under UL 1577 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
List of Tables
Data Sheet 5 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Block Diagram
2 Block Diagram
Figure 1 Block Diagram 2ED020I12FA
GND1
INHS+
INHS-
RDYHS
/RSTHS
/FLTHS
VCC1HS
2
3
4
5
6
7
1
35
34
33
32
30
VCC2HS
OUTHS
GND2HS
CLAMPHS
DESATHS
delay
TX
RXDECODER
UVLO
TX
VEEHS2
2V
ENCODER
9V
&
delay
FLTH
VCC1
VCC1
VCC1
VCC1
&
&
delay 1
Q
S
R
/RDYH
GND1
FLTNLH
RSTH
UVLO
RX
&
VEE2HS
≥1
&
≥1
&
VCC2HS
RDY2H
FLT2H
8
VEE2HS
VCC2HS
2ED020I12FA
GND1
GND1
GND1
GND1
36
31
VEEHS2
VEE2HS
GND2HS
GND1
INLS+
INLS-
RDYLS
/RSTLS
/FLTLS
VCC1LS
12
13
14
15
16
17
11
25
23
22
21
20
VCC2LS
OUTLS
GND2LS
CLAMPLS
DESATLS
delay
TX
RXDECODER
UVLO
TX
VEE2LS
2V
ENCODER
9V
&
delay
FLTL
VCC1
VCC1
VCC1
VCC1
&
&
delay 1
Q
S
R
/RDYL
GND1
FLTNLL
RSTL
UVLO
RX
&
VEE2LS
≥1
&
≥1
&
VCC2LS
RDY2L
FLT2L
18
VEE2LS
VCC2LS
GND1
GND1
GND1
GND1
19
24
VEE2LS
VEE2LS
GND2LS
Data Sheet 6 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Pin Configuration and Functionality
3 Pin Configuration and Functionality
3.1 Pin Configuration
Table 1 Pin Configuration
Pin
No.
Name Function
1 GND1 Common ground input side
2INHS+ Non inverted driver input high side
3 INHS- Inverted driver input high side
4 RDYHS Ready output high side
5 /FLTHS Inverted fault output high side
6 /RSTHS Inverted reset input high side
7 VCC1HS Positive power supply input high side
8 GND1 Common ground input side
9 NC Not used, internally connected to Pin 10
10 NC Not used, internally connected to Pin 9
11 GND1 Common ground input side
12 INLS+ Non inverted driver input low side
13 INLS- Inverted driver input low side
14 RDYLS Ready output low side
15 /FLTLS Inverted fault output low side
16 /RSTLS Inverted reset input low side
17 VCC1LS Positive power supply input low side
18 GND1 Common ground input side
19 VEE2LS Negative power supply low side driver
20 DESATLS Desaturation protection low side driver
21 GND2LS Signal ground low side driver
22 VCC2LS Power supply low side driver
23 OUTLS Output low side driver
24 VEE2LS Negative power supply low side driver
25 CLAMPLS Miller clamping low side driver
26 Pin not existing, cut out
27 Pin not existing, cut out
28 Pin not existing, cut out
29 Pin not existing, cut out
30 DESATHS Desaturation protection high side driver
31 VEE2HS Negative power supply high side driver
Data Sheet 7 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Pin Configuration and Functionality
Figure 2 PG-DSO-36 (top view)
3.2 Pin Functionality
Remark: xxxHS and xxxLS at the end of pin name only indicates an order for description, both drivers are
isolated and could be used as high side or low side without any preference.
GND1
Common ground connection of the input side.
INHS+, INLS+ Non Inverting Driver Input
Positive control signal for the driver output (see Figure 6).
A minimum pulse width is defined to make the IC robust against glitches at IN+. An internal pull-down-resistor
ensures IGBT off-state.
32 GND2HS Signal ground high side driver
33 VCC2HS Power supply high side driver
34 OUTHS Output high side driver
35 CLAMPHS Miller clamping high side driver
36 VEE2HS Negative power supply high side driver
Table 1 Pin Configuration (cont’d)
Pin
No.
Name Function
RDYHS
/FLTHS
INHS+
VCC1HS
GND1
INHS-
GND1
NC
/RSTHS
INLS+
INLS-
RDYLS
/FLTLS
/RSTLS
VCC1LS
NC
GND1
GND1 VEE2LS
DESATLS
GND2LS
VCC2LS
OUTLS
VEE2LS
CLAMPLS
CLAMPHS
DESATHS
VEE2HS
GND2HS
VCC2HS
OUTHS
VEE2HS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
36
35
34
33
32
31
30
25
24
23
22
21
20
19
Data Sheet 8 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Pin Configuration and Functionality
INHS–, INLS– Inverting Driver Input
Negative control signal for the driver output (see Figure 6)..
A minimum pulse width is defined to make the IC robust against glitches at INxx–. An internal pull-up-resistor
ensures IGBT off-state.
/RSTHS, /RSTLS Reset Input
Function 1: Enable/shutdown of the input chip (The IGBT is off if /RSTxx = low). A minimum pulse width is
defined to make the IC robust against glitches at /RSTxx.
Function 2: Resets the DESAT-FAULT-state of the chip if /RSTxx is low for a time TRST. An internal pull-up-
resistor is used to ensure /FLTxx status output.
/FLTHS, /FLTLS Fault Output
Open-drain output to report a desaturation error of the IGBT (/FLTxx is low if desaturation occurs).
RDYHS, RDYLS Ready Status Output
Open-drain output to report the correct operation of the device (RDYxx = high if both chips are above the UVLO
level and the internal chip transmission is faultless).
VCC1HS, VCC1LS Positive Supply
5 V power supply of the input chip
VEE2HS, VEE2LS Negative Supply
Negative power supply pins of the output chip. If no negative supply voltage is available, each pins has to be
connected to its respective GND2xx.
DESATHS, DESATLS Desaturation Detection Input
Monitoring of the IGBT saturation voltage (VCE) to detect desaturation caused by short circuits. If OUT is high,
VCE is above a defined value and a certain blanking time has expired, the desaturation protection is activated
and the IGBT is switched off. The blanking time is adjustable by an external capacitor.
CLAMPHS, CLAMPLS Miller Clamping
Ties the gate voltage to ground after the IGBT has been switched off at a defined voltage to avoid a parasitic
switch-on of the IGBT.During turn-off, the gate voltage is monitored and the clamp output is activated when
the gate voltage goes below VCLAMP_TH.
GND2HS, GND2LS Reference Ground
Reference ground of the output chip.
OUTHS, OUTLS Driver Output
Output pin to drive an IGBT. The voltage is switched between VEE2xx and VCC2xx. In normal operating mode
Vout is controlled by INxx+, INxx- and /RSTxx. During error mode (UVLO, internal error or DESATxx Vout is
driven to VEE2xx independent of the input control signals.
VCC2HS, VCC2LS Positive Supply
Positive power supply pin of the output side.
Data Sheet 9 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Functional Description
4 Functional Description
4.1 Introduction
The 2ED020I12FA is an advanced IGBT dual gate driver that can be also used for driving power MOS devices.
Control and protection functions are included to make possible the design of high reliability systems.
The device consists of two galvanic separated driver. The input can be directly connected to a standard 5 V
DSP or microcontroller with CMOS in/output and the output driver are connected to the high side and low side
switch.
The rail-to-rail driver outputs enables the user to provide easy clamping of the IGBTs gate voltage during short
circuit of the IGBT. So an increase of short circuit current due to the feedback via the Miller capacitance can be
avoided. Further, a rail-to-rail output reduces power dissipation.
The device also includes IGBT desaturation protection with FAULT status outputs.
Two READY status outputs reports if the device is supplied and operates correctly.
4.2 Supply
The driver 2ED020I12FA is designed to support two different supply configurations, bipolar supply and
unipolar supply.
In bipolar supply the driver is typically supplied with a positive voltage of 15V at VCC2 and a negative voltage
of -8V at VEE2, please refer to Figure 3. Negative supply prevents a dynamic turn on due to the additional
charge which is generated from IGBT input capacitance times negative supply voltage. If an appropriate
negative supply voltage is used, connecting CLAMPxx to IGBT gate is redundant and therefore typically not
necessary.
Data Sheet 10 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Functional Description
Figure 3 Application Example Bipolar Supply
For unipolar supply configuration the driver is typically supplied with a positive voltage of 15V at VCC2.
Erratically dynamic turn on of the IGBT could be prevented with active Miller clamp function, so CLAMP output
is directly connected to IGBT gate, please refer to Figure 4.
GND1
INHS+
INHS-
RDYHS
/FLTHS
/RSTHS
VCC1HS
OUTHS
VCC2HS
GND2HS
CLAMPHS
2ED020I12FA
DESATHS
+5V
VEE2HS
VCC1LS
INLS+
INLS-
RDYLS
/FLTLS
/RSTLS
SGND
INHS
INLS
RDY
FLT
RS
OUTLS
VCC2LS
GND2LS
CLAMPLS
DESATLS
VEE2LS
-8V_1
+15V_1
+15V_2
-8V_2
10R
10R
100nF
100nF
2 * 4k7
10R
10R
1k
1k
1µF
1µF
1µF
1µF
220pF
220pF
Data Sheet 11 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Functional Description
Figure 4 Application Example Unipolar Supply
4.3 Internal Protection Features
4.3.1 Undervoltage Lockout (UVLO)
To ensure correct switching of IGBTs the device is equipped with undervoltage lockout for all driver outputs
as well as for input section, please see Figure 8.
If the power supply voltage VVCC1xx of the input section drops below VUVLOL1 a turn-off signal is sent to the output
driver before power-down. The IGBT is switched off and the signals at INxx+ and INxx- are ignored as long as
VVCC1xx reaches the power-up voltage VUVLOH1.
If the power supply voltage VVCC2xx of the output driver goes down below VUVLOL2 the IGBT is switched off and
signals from the input chip are ignored as long as VVCC2xx reaches the power-up voltage VUVLOH2. VEE2xx is not
monitored.
4.3.2 READY Status Output
The READY outputs shows the status of three internal protection features.
• UVLO of the input chip
• UVLO of the output chip after a short delay
• Internal signal transmission after a short delay
It is not necessary to reset the READY signal since its state only depends on the status of the former mentioned
protection signals.
GND1
INHS+
INHS-
RDYHS
/FLTHS
/RSTHS
VCC1HS
OUTHS
VCC2HS
GND2HS
CLAMPHS
2ED020I12FA
DESATHS
+5V
VEE2HS
VCC1LS
INLS+
INLS-
RDYLS
/FLTLS
/RSTLS
SGND
INHS
INLS
RDY
FLT
RS
OUTLS
VCC2LS
GND2LS
CLAMPLS
DESATLS
VEE2LS
+15V_1
+15V_2
10R
10R
100nF
100nF
2 * 4k7
10R
10R
1k
1k
1µF
1µF
220pF
220pF
Data Sheet 12 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Functional Description
4.3.3 Watchdog Timer
During normal operation the internal signal transmission is monitored by a watchdog timer. If the
transmission fails for a given time, the IGBT is switched off and the READY output reports an internal error.
4.3.4 Active Shut-Down
The Active Shut-Down feature ensures a safe IGBT off-state if the output chip is not connected to the power
supply, IGBT gate is clamped at OUTxx to VEE2xx.
4.4 Non-Inverting and Inverting Inputs
There are two possible input modes to control the IGBT. At non-inverting mode INxx+ controls the driver
output while INxx- is set to low. At inverting mode INxx- controls the driver output while INxx+ is set to high,
please see Figure 6. A minimum input pulse width is defined to filter occasional glitches.
4.5 Driver Outputs
The output driver sections uses only MOSFETs to provide a rail-to-rail output. This feature permits that tight
control of gate voltage during on-state and short circuit can be maintained as long as the drivers supply is
stable. Due to the low internal voltage drop, switching behavior of the IGBT is predominantly governed by the
gate resistor. Furthermore, it reduces the power to be dissipated by the driver.
4.6 External Protection Features
4.6.1 Desaturation Protection
A desaturation protection ensures the protection of the IGBT at short circuit. When the DESAT voltage goes up
and reaches VDESAT_TH, the output is driven low. Further, the FAULT output is activated, please refer to Figure 7.
A configurable blanking time is used to allow enough time for IGBT saturation. Blanking time is provided by a
highly precise internal current source and an external capacitor.
4.6.2 Active Miller Clamp
In a half bridge configuration the switched off IGBT tends to dynamically turn on during turn on phase of the
opposite IGBT. A Miller clamp allows sinking the Miller current across a low impedance path in this high dV/dt
situation. Therefore in many applications, the use of a negative supply voltage can be avoided.
During turn-off, the gate voltage is monitored and the clamp output is activated when the gate voltage goes
below VCLAMP_TH. The clamp is designed for a Miller current up to ICLAMPL.
4.6.3 Short Circuit Clamping
During short circuit the IGBTs gate voltage tends to rise because of the feedback via the Miller capacitance. An
additional protection circuit connected to OUTxx and CLAMPxx limits this voltage to a value slightly higher
than the supply voltage. A current of maximum 500 mA for 10 μs may be fed back to the supply through one of
this paths. If higher currents are expected or a tighter clamping is desired external Schottky diodes may be
added.
4.7 RESET
The reset inputs have two functions.
Data Sheet 13 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Functional Description
Firstly, /RSTxx is in charge of setting back the FAULT output. If /RSTxx is low longer than a given time, /FLTxx
will be cleared at the rising edge of /RSTxx; otherwise, it will remain unchanged. Moreover, it works as
enable/shutdown of the input logic.
Data Sheet 14 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Electrical Parameters
5 Electrical Parameters
5.1 Absolute Maximum Ratings
Note: Absolute maximum ratings are defined as ratings, which when being exceeded may lead to
destruction of the integrated circuit. Unless otherwise noted all parameters refer to GND1. The
specification for all driver signals is valid for HS and LS with out special notice, e.g. IN+ covers INHS+
as well as INLS+. The signals from driver output side are measured with respect to their specific
GND2HS or GND2LS.
Table 2 Absolute Maximum Ratings 1)
Parameter Symbol Values Unit Note
Min. Max.
Positive power supply output side VVCC2 -0.3 20 V Referenced to GND2
Negative power supply output side VVEE2 -12 0.3 V Referenced to GND2
Maximum power supply voltage
output side
(VVCC2 - VVEE2)
Vmax2 –28V–
Gate driver output VOUT VVEE2-0.3 VVCC2+0.3 V –
VVCC2+
VCLPout
Vtime< tCLPmax,
IOUT<500 mA (see
Table 9)
Gate driver high output maximum
current
IOUT –2.4At = 2µs
Gate & Clamp driver low output
maximum current
IOUT –2.4At = 2µs
Maximum short circuit clamping
time
tCLP –10μsICLAMP/OUT = 500 mA
Positive power supply input side VVCC1 -0.3 6.5 V –
Logic input voltages
(IN+,IN-,RST)
VLogicIN -0.3 VCC1 + 0.3 V –
6.5 V –
Opendrain Logic output voltage
(FLT)
VFLT# -0.3 6.5V V –
Opendrain Logic output voltage
(RDY)
VRDY -0.3 6.5V V –
Opendrain Logic output current
(FLT)
IFLT# –10mA–
Opendrain Logic output current
(RDY)
IRDY –10mA–
Pin DESAT voltage VDESAT -0.3 VVCC2 +0.3 V Referenced to GND2
Data Sheet 15 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Electrical Parameters
Pin CLAMP voltage VCLAMP VVEE2-0.3 VVCC2+0.3 V –
VVEE2-0.3 VVCC2+
VCLPclamp
Vtime< tCLPmax,
ICLAMP<500 mA (see
Table 9)
Junction temperature TJ-40 150 °C –
Storage temperature TS-55 150 °C –
Power dissipation, per input part PD, IN – 100 mW 2) @TA = 25°C
Power dissipation, per output part PD, OUT – 400 mW 2) @TA = 25°C
Power dissipation, total PD, tot – 1000 mW 2) @TA = 25°C
Thermal resistance (Input part) RTHJA,IN – 375 K/W 2) @TA = 25°C,
PD, IN_HS+LS = 200 mW,
PD, OUT_HS+LS =
800 mW
Thermal resistance (Output part) RTHJA,OUT – 110 K/W 2) @TA = 25°C,
PD, IN_HS+LS = 200 mW,
PD, OUT_HS+LS =
800 mW
ESD Capability VESD –1 kVHuman Body Model
3)
1) Not subject to production test. Absolute maximum Ratings are verified by design / characterization
2) IC power dissipation is derated linearly at 12 mW/°C above 65°C. Thermal performance may change significantly with
layout and heat dissipation of components in close proximity.
3) According to EIA/JESD22-A114-B (discharging a 100 pF capacitor through a 1.5 kΩ series resistor).
Table 2 Absolute Maximum Ratings (cont’d)1)
Parameter Symbol Values Unit Note
Min. Max.
Data Sheet 16 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Electrical Parameters
5.2 Operating Parameters
Note: Within the operating range the IC operates as described in the functional description. Unless
otherwise noted all parameters refer to GND1. The specification for all driver signals is valid for HS
and LS with out special notice, e.g. IN+ covers INHS+ as well as INLS+. The signals from driver output
side are measured with respect to their specific GND2HS or GND2LS.
5.3 Recommended Operating Parameters
Note: Unless otherwise noted all parameters refer to GND1. The specification for all driver signals is valid
for HS and LS with out special notice, e.g. IN+ covers INHS+ as well as INLS+. The signals from driver
output side are measured with respect to their specific GND2HS or GND2LS.
Table 3 Operating Parameters
Parameter Symbol Values Unit Note
Min. Max.
Positive power supply output side VVCC2 13 20 V referenced to
GND2
Negative power supply output side VVEE2 -12 0 V referenced to
GND2
Maximum power supply voltage
output side
(VVCC2 - VVEE2)
Vmax2 –28V–
Positive power supply input side VVCC1 4.5 5.5 V –
Pin CLAMP voltage VCLAMP VVEE2 VVCC2 V referenced to
GND2
Pin DESAT voltage VDESAT 0 VVCC2 V referenced to
GND2
Ambient temperature TA-40 125 °C –
Common mode transient immunity |DVISO/dt| – 50 kV/μs @ 500 V, 1)
1) The parameter is not subject to production test - verified by design/characterization
Table 4 Recommended Operating Parameters
Parameter Symbol Value Unit Note / Test Condition
Positive power supply output side VVCC2 15 V referenced to GND2
Negative power supply output side VVEE2 -8 V referenced to GND2
Positive power supply input side VVCC1 5Vreferenced to GND1
Data Sheet 17 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Electrical Parameters
5.4 Electrical Characteristics
Note: The electrical characteristics involve the spread of values for the supply voltages, load and junction
temperatures given below. Typical values represent the median values, which are related to
production processes at T = 25°C. Unless otherwise noted all voltages are given with respect to GND.
The specification for all driver signals is valid for HS and LS with out special notice, e.g. IN+ covers
INHS+ as well as INLS+. The signals from driver output side are measured with respect to their
specific GND2HS or GND2LS.
5.4.1 Voltage Supply
Table 5 Voltage Supply
Parameter Symbol Values Unit Note
Min. Typ. Max.
UVLO Threshold Input
Chip
VUVLOH1 –4.14.3V–
VUVLOL1 3.5 3.8 – V –
UVLO Hysteresis Input
Chip (VUVLOH1 - VUVLOL1)
VHYS1 0.15 – – V –
UVLO Threshold Output
Chip
VUVLOH2 – 12.0 12.6 V –
VUVLOL2 10.4 11.0 – V –
UVLO Hysteresis Output
Chip (VUVLOH1 - VUVLOL1)
VHYS2 0.7 0.9 – V –
Quiescent Current Input
Chip
IQ1 –79mAVVCC1 = 5 V
IN+ = High,
IN- = Low
=>OUT = High,
RDY = High,
/FLT = High
Quiescent Current
Output Chip
IQ2 –46mAVVCC2 = 15 V
VVEE2 = -8 V
IN+ = High,
IN- = Low
=>OUT = High,
RDY = High,
/FLT = High
Data Sheet 18 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Electrical Parameters
5.4.2 Logic Input and Output
Table 6 Logic Input and Output
Parameter Symbol Values Unit Note
Min. Typ. Max.
IN+,IN-, RST Low Input Voltage VIN+L,
VIN-L,
VRSTL#
0–1.5V–
IN+,IN-, RST High Input Voltage VIN+H,
VIN-H,
VRSTH#
3.5 – VVCC1 V–
IN-, RST Input Current IIN-, IRST# – 100 400 μAVIN- = GND1
VRST# = GND1
IN+ Input Current IIN+, – 100 400 μAVIN+ = VCC1
RDY,FLT Pull Up Current IPRDY, IPFLT# – 100 400 μAVRDY = GND1
VFLT# = GND1
Input Pulse Suppression IN+,
IN-
TMININ+,
TMININ-
30 40 – ns
Input Pulse Suppression
RSTfor ENABLE/SHUTDOWN
TMINRST 30 40 – ns –
Pulse Width RST
for Resetting FLT
TRST 800 – – ns –
FLT Low Voltage VFLTL – – 300 mV ISINK(FLT#) = 5 mA
RDY Low Voltage VRDYL – – 300 mV ISINK(RDY) = 5 mA
Data Sheet 19 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Electrical Parameters
5.4.3 Gate Driver
5.4.4 Active Miller Clamp
Table 7 Gate Driver
Parameter Symbol Values Unit Note
Min. Typ. Max.
High Level Output
Voltage
VOUTH1 VCC2 -1.2 VCC2 -0.8 – V IOUTH = -20 mA
VOUTH2 VCC2 -2.5 VCC2 -2.0 – V IOUTH = -200 mA
VOUTH3 VCC2 -9 VCC2 -5 – V IOUTH = -1 A
VOUTH4 VCC2 -10 – V IOUTH = -2 A 1)
1) Not subject to production test. Absolute maximum Ratings are verified by design / characterization
High Level Output Peak
Current
IOUTH -1.5 -2.0 – A IN+ = High,
IN- = Low;
OUT = High
Low Level Output
Voltage
VOUTL1 –VVEE2 +0.04 VVEE2+0.09 V IOUTL = 20 mA
VOUTL2 –VVEE2 +0.3 VVEE2+0.85 V IOUTL = 200 mA
VOUTL3 –VVEE2 +2.1 VVEE2+5 V IOUTL = 1 A
VOUTL4 –VVEE2 +7 – V IOUTL = 2 A1)
Low Level Output Peak
Current
IOUTL 1.5 2.0 – A IN+ = Low,
IN- = Low;
OUT = Low,
VVCC2 = 15 V,
VVEE2 = -8 V
Table 8 Active Miller Clamp
Parameter Symbol Values Unit Note
Min. Typ. Max.
Low Level Clamp
Voltage
VCLAMPL1 –VVEE2+0.03 VVEE2 +0.08 V ICLAMP = 20 mA
VCLAMPL2 –VVEE2+0.3 VVEE2 +0.8 V ICLAMP = 200 mA
VCLAMPL3 –VVEE2+1.9 VVEE2 +4.8 V ICLAMP = 1 A
Low Level Clamp
Current
ICLAMPL 2––A
1)
1) The parameter is not subject to production test - verified by design/characterization
Clamp Threshold
Voltage
VCLAMP_TH 1.6 2.1 2.4 V Related to VEE2
Data Sheet 20 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Electrical Parameters
5.4.5 Short Circuit Clamping
5.4.6 Dynamic Characteristics
Table 9 Short Circuit Clamping
Parameter Symbol Values Unit Note
Min. Typ. Max.
Clamping voltage (OUT)
(VOUT - VVCC2)
VCLPout – 0.8 1.3 V IN+ = High,
IN- = Low,
OUT = High
IOUT = 500 mA
pulse test,
tCLPmax = 10 μs)
Clamping voltage
(CLAMP) (VVCLAMP-VVCC2)
VCLPclamp – 1.3 – V IN+ = High, IN- = Low,
OUT = High
ICLAMP = 500 mA
(pulse test,
tCLPmax = 10 μs)1)
1) Not subject to production test. Absolute maximum Ratings are verified by design / characterization
– 0.7 1.1 V IN+ = High, IN- = Low,
OUT = High
ICLAMP = 20 mA
Table 10 Dynamic Characteristics1)
Parameter Symbol Values Unit Note
Min. Typ. Max.
Input IN to output propa-
gation delay ON
TPDON 145 170 195 ns CLOAD = 100 pF
VIN+ = 50%,
VOUT=50% @ 25°C
Input IN to output propa-
gation delay OFF
TPDOFF 145 165 190 ns
Input IN to output propa-
gation delay distortion
(TPDOFF - TPDON)
TPDISTO -35 -5 25 ns
Input IN to output propa-
gation delay ON
variation due to temp
TPDONt 160 190 220 ns CLOAD = 100 pF
VIN+ = 50%,
VOUT = 50% @ 125°C
Input IN to output propa-
gation delay OFF
variation due to temp
TPDOFFt 165 195 225 ns
Input IN to output propa-
gation delay distortion
(TPDOFF - TPDON)
TPDISTOt -25 5 35 ns
Data Sheet 21 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Electrical Parameters
Input IN to output propa-
gation delay ON
variation due to temp
TPDONt 135 165 195 ns CLOAD = 100 pF
VIN+ = 50%,
VOUT = 50% @ -40°C
Input IN to output propa-
gation delay OFF
variation due to temp
TPDOFFt 125 155 185 ns
Input IN to output propa-
gation delay distortion
(TPDOFF - TPDON)
TPDISTOt -40 -10 20 ns
Rise Time TRISE 10 30 60 ns CLOAD = 1 nF
VL 10%, VH 90%
200 400 800 ns CLOAD = 34 nF
VL 10%, VH 90%
Fall Time TFALL 10 50 90 ns CLOAD = 1 nF
VL 10%, VH 90%
200 350 600 ns CLOAD = 34 nF
VL 10%, VH 90%
1) Measured under the following conditions: VVCC1=5V, VVEE2=-8V, VVCC2=15V
Table 10 Dynamic Characteristics1) (cont’d)
Parameter Symbol Values Unit Note
Min. Typ. Max.
Data Sheet 22 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Electrical Parameters
5.4.7 Desaturation Protection
5.4.8 Active Shut Down
Table 11 Desaturation Protection
Parameter Symbol Values Unit Note
Min. Typ. Max.
Blanking Capacitor
Charge Current
IDESATC 450 500 550 μAVVCC2 =15 V,
VVEE2=- 8 V
VDESAT = 2 V
Blanking Capacitor
Discharge Current
IDESATD 9.0 14 – mA VVCC2 =15 V,
VVEE2 = -8 V
VDESAT = 6 V
Desaturation
Reference Level
VDESAT_TH 8.3 9 9.5 V VVCC2 = 15 V
Desaturation Filter
Time
TDESATfilter – 250 – ns VVCC2 = 15 V,
VVEE2 = -8 V
VDESAT = 9 V1)
1) Not subject to production test. This parameter is verified by design / characterization
Desaturation Sense to
OUT Low Delay
TDESATOUT – 350 430 ns VOUT = 90%
CLOAD = 1 nF
Desaturation Sense to
FLT Low Delay
TDESATFLT ––2.25μsVFLT# = 10%;
IFLT # = 5 mA
Desaturation Low
Voltage
VDESATL 0.4 0.6 0.95 V IN+ = Low, IN- = Low,
OUT = Low
Leading edge blanking TDESATleb – 400 – ns 1)
Table 12 Active Shut Down
Parameter Symbol Values Unit Note
Min. Typ. Max.
Active Shut Down Voltage VACTSD ––2.0VIOUT = -200 mA,
VCC2 open,
referenced to VEE2
Data Sheet 23 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Insulation Characteristics
6 Insulation Characteristics
Insulation characteristics are guaranteed only within the safety maximum ratings which must be ensured by
protective circuits in application. Surface mount classification is class A in accordance with CECCOO802.
This coupler is suitable for “basic insulation” only within the safety ratings. Compliance with the safety ratings
shall be ensured by means of suitable protective circuits.
6.1 Certified according to DIN EN 60747-5-2 (VDE 0884 Teil 2): 2003-01. Basic Insulation
6.2 Recognized under UL 1577
6.3 Reliability
For Qualification Report please contact your local Infineon Technologies office.
Table 13 According to DIN EN 60747-5-2
Description Symbol Characteristics Unit
Installation classification per EN 60664-1, Table 1
for rated mains voltage ≤ 150 VRMS
for rated mains voltage ≤ 300 VRMS
for rated mains voltage ≤ 600 VRMS
I-IV
I-III
I-II
–
Climatic Classification 55/125/21 –
Pollution Degree (EN 60664-1) 2 –
Minimum External Clearance between input and driver
section
CLR 8.2 mm
Minimum External Creepage between input and driver
section
CPG 8.2 mm
Minimum External Clearance between HS- and LS-driver
output
2.75 mm
Minimum External Creepage between HS- and LS-driver
output
2.85 mm
Minimum Comparative Tracking Index CTI 175
Maximum Repetitive Insulation Voltage VIORM 1420 VPEAK
Highest Allowable Overvoltage VIOTM 6000 VPEAK
Maximum Surge Insulation Voltage VIOSM 6000 V
Table 14 Recognized under UL 1577
Description Symbol Characteristics Unit
Insulation Withstand Voltage / 1 min VISO 3750 Vrms
Insulation Test Voltage / 1 s VISO 4500 Vrms
Data Sheet 24 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Timing Diagrams
7 Timing Diagrams
Figure 5 Propagation Delay, Rise and Fall Time
Figure 6 Typical Switching Behavior
IN+
OUT
T
PDON
50%
50%
T
PD OFF
10%
90%
T
RISE
T
FALL
OUT
/RST
IN+
IN-
Data Sheet 25 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Timing Diagrams
Figure 7 DESAT Switch-Off Behavior
Figure 8 UVLO Behavior
V
DE SAT_T H
>T
RSTmin
OUT
DESAT
IN+
/FLT
/RST
T
PDON
T
DE SAT FLT
T
DE SAT OUT
T
DE SAT fil te r
T
DE SAT leb
T
PDON
T
DESATleb
T
PDOFF
OUT
/RST
IN+
VCC2
VCC1
RDY
/FLT
ESD diode conduction
V
UVLOH2
V
UVLOL2
V
UVLOH1
V
UVLOL1
Data Sheet 26 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Package Outlines
8 Package Outlines
Figure 9 PG-DSO-36 (Plastic (Green) Dual Small Outline Package)
0.504
0.104
0.016
0.013
0.417
0.299
0.035
0.018
MILLIMETERS
L
T1
h
ccc
F3
F2
F1
ddd
D
DIM
A2
A
b
c
E
E1
N
e
-
MIN
32
0.020
0.004
0.007
0.010
0° 8°
2.45
MAX
INCHES
32
0.026 BSC
0.496
MIN
-
0.089
0.010
0.009
0.394
0.291
MAX
0.096
SCALE
1.0
0
2mm
0
1.0
2.25
2.65
0.41
0.32
12.80
10.60
7.607.40
10.00
12.60
0.23
0.25
0.900.50
0.450.25
8°0°
0.17
0.10
0.65 BSC
02
ISSUE DATE
25.03.2011
DOCUMENT NO.
Z8B00159298
EUROPEAN PROJECTION
REVISION
9.73
0.45
1.67
0.383
0.018
0.066
FOOTPRINT
A1 0.20 0.004 0.008
0.10
0° 8°
8°0°
T
Data Sheet 27 Rev. 3.1
2016-04-05
2ED020I12FA
Dual IGBT Driver IC
Trademarks of Infineon Technologies AG
AURIX™, BlueMoon™, C166™, CanPAK™, CIPOS™, CIPURSE™, COMNEON™, EconoPACK™, CoolMOS™,
CoolSET™, CORECONTROL™, CROSSAVE™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPIM™,
EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™, ISOFACE™, IsoPACK™, MIPAQ™, ModSTACK™,
my-d™, NovalithIC™, OmniTune™, OptiMOS™, ORIGA™, PRIMARION™, PrimePACK™, PrimeSTACK™, PRO-SIL™,
PROFET™, RASIC™, ReverSave™, SatRIC™, SIEGET™, SINDRION™, SIPMOS™, SMARTi™, SmartLEWIS™,
SOLID FLASH™, TEMPFET™, thinQ!™, TRENCHSTOP™, TriCore™, X-GOLD™, X-PMU™, XMM™, XPOSYS™.
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of Commission Electrotechnique Internationale. IrDA™ of Infrared Data Association Corporation. ISO™ of
INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of MathWorks, Inc. MAXIM™ of Maxim
Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics Corporation. Mifare™ of NXP. MIPI™ of
MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™ of MURATA MANUFACTURING CO.,
MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc., OmniVision™ of OmniVision Technologies, Inc.
Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc. RFMD™ RF Micro Devices, Inc. SIRIUS™ of Sirius
Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc. SPANSION™ of Spansion LLC Ltd. Symbian™ of
Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co. TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of
Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™,
PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™, WIND
RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex Limited.
Last Trademarks Update 2010-10-26
Revision History
Page or Item Subjects (major changes since previous revision)
Rev 3.1, 2016-04-05
Rev 3.0, 2015-11-27
All Update latest template
Page 7 Removed Figure 1 “Typical Application”.
Page 5 Updated Figure 1.
Page 7 Updated INHS+ and INLS+ description.
Page 8 Updated INHS- and INLS- description.
Page 14 Updated Table 2.
Page 16 Updated Table 3.
Page 18 Updated Table 6.
Page 19 Updated Table 7 (added footnote).
Page 20 Updated Table 9 (added footnote).
Trademarks of Infineon Technologies AG
µHVIC™, µIPM™, µPFC™, AU-ConvertIR™, AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, CoolDP™, CoolGaN™, COOLiR™, CoolMOS™, CoolSET™, CoolSiC™,
DAVE™, DI-POL™, DirectFET™, DrBlade™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, GaNpowIR™,
HEXFET™, HITFET™, HybridPACK™, iMOTION™, IRAM™, ISOFACE™, IsoPACK™, LEDrivIR™, LITIX™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OPTIGA™,
OptiMOS™, ORIGA™, PowIRaudio™, PowIRStage™, PrimePACK™, PrimeSTACK™, PROFET™, PRO-SIL™, RASIC™, REAL3™, SmartLEWIS™, SOLID FLASH™,
SPOC™, StrongIRFET™, SupIRBuck™, TEMPFET™, TRENCHSTOP™, TriCore™, UHVIC™, XHP™, XMC™.
Trademarks updated November 2015
Other Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2016-04-05
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