LTC3265 Low Noise Dual Supply with Boost and Inverting Charge Pumps DESCRIPTION FEATURES Boost Charge Pump Generates 2 * VIN_P (VIN_P Range: 4.5V to 16V) nn Inverting Charge Pump Generates -V IN_N (VIN_N Range: 4.5V to 32V) nn Low Noise Positive LDO Post Regulator Up to 50mA nn Low Noise Negative LDO Post Regulator Up to 50mA nn 135A Quiescent Current in Burst Mode(R) Operation with Both LDO Regulators On nn 50kHz to 500kHz Programmable Oscillator Frequency nn Stable with Ceramic Capacitors nn Short-Circuit/Thermal Protection nn Low Profile 3mm x 5mm 18-Lead DFN and Thermally Enhanced 20-Lead TSSOP Packages nn APPLICATIONS nn nn Low Noise Bipolar/Inverting Supplies Industrial/Instrumentation Low Noise Bias Generators L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. The LTC(R)3265 is a low noise dual polarity output power supply including a boost charge pump, an inverting charge pump and two low noise positive and negative LDO post regulators. The boost charge pump powers the positive LDO post regulator while the inverting charge pump powers the negative LDO regulator. Each LDO can provide up to 50mA of output current. The LDO output voltages can be adjusted using external resistor dividers. The charge pumps employ low quiescent current Burst Mode operation or low noise constant frequency mode. During Burst Mode operation, the boost charge pump regulates its output (VOUT+) to 0.94 * 2 * VIN_P while the inverting charge pump regulates its output (VOUT-) to -0.94 * VIN_N. In Burst Mode operation the LTC3265 draws only 135A of quiescent current with both LDOs on. In constant frequency mode, the boost and inverting charge pumps produce outputs equal to 2 * VIN_P and -VIN_N respectively and operate at a fixed 500kHz or to a programmed value between 50kHz to 500kHz using an external resistor. The LTC3265 is available in low profile 3mm x 5mm x 0.75mm 18-lead DFN and thermally enhanced 20-lead TSSOP packages. TYPICAL APPLICATION LDO Rejection of VOUT Ripple Low Noise 15V Outputs from a Single 12V Input 1F CBST+ CBST - VOUT+ VIN_N 12V +15V 10F LTC3265 1F 10F LDO+ VIN_P 10F VOUT+ 10mV/DIV AC-COUPLED EN+ EN- ADJ+ BYP+ MODE GND CINV+ BYP- CINV - ADJ- VOUT- LDO- 100nF 604K VLDO+ 10mV/DIV AC-COUPLED VLDO- 10mV/DIV AC-COUPLED VOUT- 10mV/DIV AC-COUPLED 52.3k 1s/DIV 100nF 52.3k 604K 10F RT 3265 TA01b + -15V 10F VIN_P = 12V, VIN_N = VOUT VLDO+ = 15V VLDO- = -15V fOSC = 500kHz ILDO+ = 20mA ILDO- = -20mA 3265 TA01a 3265fa For more information www.linear.com/LTC3265 1 LTC3265 ABSOLUTE MAXIMUM RATINGS (Notes 1, 3) VIN_P, EN+, EN-, MODE............................... -0.3V to 18V VOUT+, VIN_N ............................................... -0.3V to 36V LDO+.............................................................-16V to 36V VOUT-, LDO -............................................... -36V to 0.3V RT, ADJ+....................................................... -0.3V to 6V BYP+.......................................................... -0.3V to 2.5V ADJ -............................................................. -6V to 0.3V BYP-.......................................................... -2.5V to 0.3V LDO Short-Circuit Duration............................. Indefinite Operating Junction Temperature Range (Note 2)................................................... -55C to 150C Storage Temperature Range................... -65C to 150C Lead Temperature (Soldering, 10 sec) FE Only.............................................................. 300C PIN CONFIGURATION TOP VIEW TOP VIEW CBST - 1 CBST+ 2 17 LDO+ VIN_P 3 16 ADJ+ EN - 4 15 BYP+ BYP - 5 ADJ - 6 LDO - 7 12 RT VOUT - 8 11 VIN_N 10 CINV+ CINV - 18 VOUT+ 19 GND 9 NC 1 20 VOUT+ CBST - 2 19 LDO+ CBST+ 3 18 ADJ+ VIN_P 4 17 BYP+ EN - 5 BYP - 6 - ADJ 7 14 RT LDO - 8 13 VIN_N VOUT - 9 12 CINV + 14 MODE 13 EN+ 21 GND CINV - 10 DHC PACKAGE 18-LEAD (5mm x 3mm) PLASTIC DFN TJMAX = 150C, JA = 42C/W EXPOSED PAD (PIN 19) IS GND, MUST BE SOLDERED TO PCB 16 MODE 15 EN+ 11 NC FE PACKAGE 20-LEAD PLASTIC TSSOP TJMAX = 150C, JA = 38C/W EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION (http://www.linear.com/product/LTC3265#orderinfo) LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3265EDHC#PBF LTC3265EDHC#TRPBF 3265 18-Lead (5mm x 3mm) Plastic DFN -40C to 125C LTC3265IDHC#PBF LTC3265IDHC#TRPBF 3265 18-Lead (5mm x 3mm) Plastic DFN -40C to 125C LTC3265HDHC#PBF LTC3265HDHC#TRPBF 3265 18-Lead (5mm x 3mm) Plastic DFN -40C to 150C LTC3265MPDHC#PBF LTC3265MPDHC#TRPBF 3265 18-Lead (5mm x 3mm) Plastic DFN -55C to 150C LTC3265EFE#PBF LTC3265EFE#TRPBF LTC3265 20-Lead Plastic TSSOP -40C to 125C LTC3265IFE#PBF LTC3265IFE#TRPBF LTC3265 20-Lead Plastic TSSOP -40C to 125C LTC3265HFE#PBF LTC3265HFE#TRPBF LTC3265 20-Lead Plastic TSSOP -40C to 150C LTC3265MPFE#PBF LTC3265MPFE#TRPBF LTC3265 20-Lead Plastic TSSOP -55C to 150C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on nonstandard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. 3265fa 2 For more information www.linear.com/LTC3265 LTC3265 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25C (Note 2). VIN_P = VIN_N = EN+ = EN- = 10V, MODE = 0V, RT = 200k SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Boost Charge Pump VIN_P VIN_P Input Voltage Range VUVLO VIN_P Undervoltage Lockout Threshold VIN_P Rising VIN_P Falling IVIN_P VIN_P Quiescent Current Shutdown, EN+ = EN- = 0V MODE = VIN_P, EN- = 0V, IVOUT+ = ILDO+ = 0mA MODE = VIN_P, IVOUT = ILDO+ = ILDO- = 0mA MODE = 0V, IVOUT+ = 0mA VRT RT Regulation Voltage + + Regulation Voltage VOUT VOUT MODE = 10V MODE = 0V fOSC Oscillator Frequency RT = GND ROUTBST Boost Charge Pump Output Impedance MODE = 0V, RT = GND + Short-Circuit Current VOUT + = GND l 4.5 l l 3.4 450 16 V 3.8 3.6 4 V V 3 85 110 3 6 170 220 6 1.200 V 2 * 0.94 * VIN_P 2 * VIN_P V V 500 550 32 IVOUT+(SC) Max IVOUT VMODE(H) MODE Threshold Rising l VMODE(L) MODE Threshold Falling l IMODE MODE Pin Internal Pull-Down Current l 100 0.4 VIN_P = MODE = 16V A A A mA kHz 220 300 1.1 2 mA V 1.0 V 0.7 A Inverting Charge Pump VIN_N VIN_N Input Voltage Range l IVIN_N VIN_N Quiescent Current Shutdown, EN- = 0V VOUT- VOUT- Regulation Voltage MODE = 10V MODE = 0V ROUTINV Inverting Charge Pump Output Impedance MODE = 0V, RT = GND IVOUT-(SC) Max IVOUT- Short-Circuit Current VOUT- = GND, |IVOUT-| 4.5 1 25 3 MODE = VIN_P, IVOUT - = ILDO- = 0mA MODE = 0V, IVOUT - = 0mA l 100 32 V 3 50 5 A A mA -0.94 * VIN_N -VIN_N V V 32 160 250 mA 32 V 1.200 1.224 V Positive Regulator LDO+ Output Voltage Range + VADJ ADJ+ Reference Voltage IADJ ADJ+ Input Current ILDO+(SC) LDO+ Short-Circuit Current + ILDO+ = 1mA l 1.2 l 1.176 + = 1.2V VADJ -50 l 50 Line Regulation Load Regulation VDROPOUT+ ILDO+ = 50mA Output Voltage Noise CBYP+ = 100nF VEN (H) EN+ Threshold Falling l EN+ Pin Internal Pull-Down Current IEN mV/V VIN_P mV/mA 800 100 VEN+(L) + 0.04 400 l 1.1 0.4 = EN+ = 16V nA mA 0.03 LDO+ Dropout Voltage EN+ Threshold Rising + 50 100 mV VRMS 2 V 1.0 V 0.7 A Negative Regulator LDO- Output Voltage Range VADJ ADJ- Reference Voltage ILDO- = -1mA IADJ- ADJ- Input Current VADJ- = -1.2V ILDO-(SC) LDO- Short-Circuit Current |ILDO-| - l -32 l -1.224 -1.2 -1.200 -50 l 50 100 V -1.176 V 50 nA mA 3265fa For more information www.linear.com/LTC3265 3 LTC3265 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25C (Note 2). VIN_P = VIN_N = EN+ = EN- = 10V, MODE = 0V, RT = 200k SYMBOL VDROPOUT- PARAMETER CONDITIONS MIN 0.002 mV/V 0.02 mV/mA LDO- Dropout Voltage ILDO- = -50mA 200 Output Voltage Noise CBYP- = 100nF 100 VEN-(L) IEN- EN- Threshold Falling VIN_P = VIN_N = EN- = 16V COUT = COUT = CLDO = CLDO = 10F, unless otherwise noted. 600 500 500 OSCILLATOR FREQUENCY (kHz) 600 RT = GND 400 300 RT = 200k 100 8 10 12 INPUT VOLTAGE (V) 14 16 3265 G01 Oscillator Frequency vs RT 2 V 1.0 V 0.7 A Shutdown Current vs Temperature 25 400 300 200 100 0 mV VRMS TA = 25C, CBST = CINV = 1F, CIN_P = CIN_N = SHUTDOWN CURRENT (A) Oscillator Frequency vs Supply Voltage 500 maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. The junction temperature (TJ, in C) is calculated from the ambient temperature (TA, in C) and power dissipation (PD, in Watts) according to the formula: TJ = TA + (PD * JA), where JA is the package thermal impedance. Note 3: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperatures will exceed 150C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may result in device degradation or failure. TYPICAL PERFORMANCE CHARACTERISTICS + - + - 6 0.4 l EN- Pin Internal Pull-Down Current 200 1.1 l Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3265 is tested under pulsed load conditions such that TJ TA. The LTC3265E is guaranteed to meet specifications from 0C to 85C junction temperature. Specifications over the -40C to 125C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3265I is guaranteed over the -40C to 125C operating junction temperature range, the LTC3265H is guaranteed over the -40C to 150C operating junction temperature range and the LTC3265MP is guaranteed over the -55C to 150C operating junction temperature range. High junction temperatures degrade operating lifetimes; operating lifetime is derated for junction temperatures greater than 125C. Note that the OSCILLATOR FREQUENCY (kHz) UNITS Load Regulation EN- Threshold Rising 4 MAX Line Regulation VEN-(H) 0 TYP VIN_P = VIN_N 20 15 10V 10 16V 5 4.5V 1 10 100 RT (k) 1k 10k 3265 G02 0 -50 0 50 100 TEMPERATURE (C) 150 3265 G03 3265fa 4 For more information www.linear.com/LTC3265 LTC3265 TYPICAL PERFORMANCE CHARACTERISTICS + - + - TA = 25C, CBST = CINV = 1F, CIN_P = CIN_N = COUT = COUT = CLDO = CLDO = 10F, unless otherwise noted. 10 9 EN+ = EN- = 10V EN- = 10V 100 EN+ = 10V 50 RT = GND 10 8 7 6 5 RT = 200k 4 3 2 0 -50 0 50 100 TEMPERATURE (C) 0 150 4 6 8 10 12 INPUT VOLTAGE (V) 3265 G04 12 10 8 RT = 200k 6 4 RT = 1.2M 2 0 -50 0 50 100 TEMPERATURE (C) 150 2.5 2.0 RT = 1.2M 1.5 1.0 0.5 RT = GND 0 0.1 1 10 LOAD CURRENT (mA) 100 3265 G10 4 6 8 10 12 INPUT VOLTAGE (V) 14 30 VOUT+ Short-Circuit Current vs Supply Voltage VIN_P = 4.5V VIN_P = 10V 25 20 15 10 VIN_P = 16V 5 0 -50 0 50 100 TEMPERATURE (C) RT = GND 200 150 100 RT = 200k 50 0 150 4 6 40 30 VIN_N = 4.5V VIN_N = 16V 20 VIN_N = 10V 10 5 0 -50 180 50 100 TEMPERATURE (C) 150 3265 G11 RT = GND 160 140 120 100 80 RT = 200k 60 40 20 0 0 16 200 25 15 14 VOUT- Short-Circuit Current vs Supply Voltage RT = GND 35 8 10 12 SUPPLY VOLTAGE (V) 3265 G09 VOUT- Effective Open-Loop Resistance vs Temperature 45 16 3265 G06 3265 G08 VOUT- EFFECTIVE OPEN-LOOP RESISTANCE () (2 * VIN_P- VOUT+) VOLTAGE (V) RT = 200k RT = 1.2M 250 35 VOUT+ Voltage Loss vs Output Current (Constant Frequency Mode) VIN_P = 10V 0 16 40 3265 G07 3.0 14 VOUT+ SHORT-CIRCUIT CURRENT (mA) RT = GND RT = 200k 4 VOUT+ Effective Open-Loop Resistance vs Temperature VOUT+ EFFECTIVE OPEN-LOOP RESISTANCE () QUIESCENT CURRENT (mA) 14 VIN_P = VIN_N = 10V, EN+ = EN- = 10V 6 3265 G05 Quiescent Current vs Temperature (Constant Frequency Mode) 16 RT = GND 8 2 RT = 1.2M 1 VOUT- SHORT-CIRCUIT CURRENT (mA) 200 150 12 QUIESCENT CURRENT (mA) VIN_P = VIN_N = 10V, MODE = H QUIESCENT CURRENT (mA) QUIESCENT CURRENT (A) 250 Inverting Charge Pump Quiescent Current vs Supply Voltage (Constant Frequency Mode) Boost Charge Pump Quiescent Current vs Supply Voltage (Constant Frequency Mode) Quiescent Current vs Temperature (Burst Mode Operation) 4 6 8 10 12 SUPPLY VOLTAGE (V) 14 16 3265 G12 3265fa For more information www.linear.com/LTC3265 5 LTC3265 TYPICAL PERFORMANCE CHARACTERISTICS + - + - COUT = COUT = CLDO = CLDO = 10F, unless otherwise noted. VOUT- Voltage Loss vs Output Current (Constant Frequency Mode) 1.224 RT = 200k 2.5 1.216 2.0 1.208 1.5 RT = 1.2M 1.0 0.5 RT = GND 1.200 1.192 1.176 -50 100 0 3265 G13 50 100 TEMPERATURE (C) 200 0 -50 150 ADJ+ VOLTAGE (V) 1.195 250 -1.192 -1.200 -1.208 -1.216 100 -1.224 -50 3265 G16 0 50 100 TEMPERATURE (C) LDO- Load Regulation 150 200 150 100 50 0 -50 0 50 100 TEMPERATURE (C) 150 3265 G18 LDO+ Rejection of VOUT+ Ripple -1.195 150 VIN_N = 10V ILDO- = -50mA 3265 G17 -1.190 VIN_N = 10V UNITY GAIN 50 100 TEMPERATURE (C) LDO- Dropout Voltage vs Temperature VIN_N = 10V IOUT- = -1mA -1.184 1.205 1.200 0 3265 G15 -1.176 VIN_P = 10V UNITY GAIN LDO- VOLTAGE (V) 300 ADJ- Pin Voltage vs Temperature 1.210 1 10 LOAD CURRENT (mA) 400 3265 G14 LDO+ Load Regulation 1.190 0.1 500 100 LDO- DROPOUT VOLTAGE (V) 1 10 LOAD CURRENT (mA) VIN_P = 10V ILDO+ = 50mA 600 1.184 0 0.1 LDO+ VOLTAGE (V) 700 VIN_P = 10V ILDO+ = 1mA LDO+ DROPOUT VOLTAGE (V) VIN_P = VIN_N = 10V LDO+ Dropout Voltage vs Temperature ADJ+ Pin Voltage vs Temperature ADJ+ VOLTAGE (V) (VIN_N-|VOUT-|) VOLTAGE (V) 3.0 TA = 25C, CBST = CINV = 1F, CIN_P = CIN_N = LDO- Rejection of VOUT- Ripple VLDO+ 10mV/DIV AC-COUPLED VLDO- 10mV/DIV AC-COUPLED VOUT+ 10mV/DIV AC-COUPLED VOUT- 10mV/DIV AC-COUPLED -1.200 -1.205 -1.210 0.1 1 10 LOAD CURRENT (mA) 100 VIN_P = 10V VLDO+ = 5V fOSC = 500kHz ILDO+ = 50mA 1s/DIV 3265 G20 VIN_N = 10V VLDO- = -5V fOSC = 500kHz ILDO- = -50mA 1s/DIV 3265 G21 3265 G19 3265fa 6 For more information www.linear.com/LTC3265 LTC3265 TYPICAL PERFORMANCE CHARACTERISTICS + - + - COUT = COUT = CLDO = CLDO = 10F, unless otherwise noted. TA = 25C, CBST = CINV = 1F, CIN_P = CIN_N = LDO+ Load Transient LDO- Load Transient VLDO+ 10mV/DIV AC-COUPLED VLDO- 10mV/DIV AC-COUPLED 20mA ILDO+ 2mA -2mA ILDO- -20mA VIN_P = 10V VLDO+ = 5V VIN_N = 10V VLDO- = -5V 3265 G22 40s/DIV VOUT+ Transient (Burst Mode Operation, MODE = H) VOUT+ 1V/DIV AC-COUPLED 50mA IOUT+ 5mA MODE 3265 G24 2ms/DIV 3265 G23 VOUT+ Transient (MODE = Low to High) VOUT+ 500mV/DIV AC-COUPLED VIN_P = 10V fOSC = 500kHz 40s/DIV VIN_P = 10V fOSC = 500kHz IOUT+ = 5mA 2ms/DIV 3265 G25 VOUT- Transient (MODE = Low to High) VOUT- Transient (Burst Mode Operation, MODE = H) VOUT- 500mV/DIV AC-COUPLED VOUT- 500mV/DIV AC-COUPLED -5mA IOUT- -50mA MODE VIN_N = 10V fOSC = 500kHz 2ms/DIV 3265 G26 VIN_N = 10V fOSC = 500kHz IOUT- = -5mA 2ms/DIV 3265 G27 3265fa For more information www.linear.com/LTC3265 7 LTC3265 PIN FUNCTIONS (DFN/TSSOP) CBST- (Pin 1/Pin 2): Boost Charge Pump Flying Capacitor Negative Connection. NC (Pins 1, 11 TSSOP Only): No Connect. These pins are not connected to LTC3265 die. These pins should be left floating or connected to ground. CBST+ (Pin 2/Pin 3): Boost Charge Pump Flying Capacitor Positive Connection. VIN_P (Pin 3/Pin 4): Input Voltage for Boost Charge Pump. VIN_P should be bypassed with a low impedance ceramic capacitor. EN- (Pin 4/Pin 5): Logic Input. A logic "high" on the EN- pin enables the inverting charge pump as well as the negative LDO regulator. Do not float this pin. BYP- (Pin 5/Pin 6): LDO- Reference Bypass Pin. Connect a capacitor from BYP- to GND to reduce LDO- output noise. Leave floating if unused. ADJ- (Pin 6/Pin 7): Feedback Input for the Negative Low Dropout Regulator. This pin servos to a fixed voltage of -1.2V when the control loop is complete. LDO- (Pin 7/Pin 8): Negative Low Dropout (LDO-) Linear Regulator Output. This pin requires a low ESR (equivalent series resistance) capacitor with at least 2F capacitance to ground for stability. VOUT- (Pin 8/Pin 9): Inverting Charge Pump Output Voltage. In constant frequency mode (MODE = low) this pin is driven to -VIN_N. In Burst Mode operation, (MODE = high) this pin voltage is regulated to - 0.9 * VIN_N using an internal burst comparator with hysteretic control. CINV- (Pin 9/Pin 10): Inverting Charge Pump Flying Capacitor Positive Connection. CINV+ (Pin 10/Pin 12): Inverting Charge Pump Flying Capacitor Negative Connection. VIN_N (Pin 11/Pin 13): Input Voltage for Inverting Charge Pump. This pin should be tied to VIN_P or VOUT+ pins depending on the desired output voltage at the VOUT- pin. If VIN_N is tied to VOUT+, the output at VOUT- will be -VOUT+ or -2 * VIN_P. This configuration is suitable for symmetric outputs at LDO+ and LDO- pins. If VIN_N is tied to VIN_P, the output at VOUT- will be -VIN_P. This configuration is suitable for asymmetric outputs at LDO+ and LDO- pins. See Applications Information for additional details. VIN_N should be bypassed with a low impedance ceramic capacitor. RT (Pin 12/Pin 14): Input Connection for Programming the Switching Frequency. The RT pin servos to a fixed 1.2V when the EN+ or EN- pin is driven to a logic "high". A resistor from RT to GND sets the charge pump switching frequency. If the RT pin is tied to GND, the switching frequency defaults to a fixed 500kHz. EN+ (Pin 13/Pin 15): Logic Input. A logic "high" on the EN+ pin enables the boost charge pump as well as the positive LDO regulator. Do not float this pin. MODE (Pin 14/Pin 16): Logic Input. The MODE pin determines the charge pump operating mode. A logic "high" on the MODE pin forces the charge pumps to operate in Burst Mode operation. The boost charge pump regulates the VOUT+ pin to 0.94 * 2 * VIN_P with hysteretic control. The inverting charge pump regulates the VOUT- pin to (-0.94 * VIN_N). A logic "low" on the MODE pin forces the charge pumps to operate in open-loop mode with a constant switching frequency. The boost charge pump doubles the input to 2 * VIN_P in this mode while the inverting charge pump inverts its input to (-VIN_N). The switching frequency in both modes is determined by an external resistor from the RT pin to GND. In Burst Mode operation, this represents the frequency of the burst cycles before the part enters the low quiescent current sleep state. Do not float this pin. 3265fa 8 For more information www.linear.com/LTC3265 LTC3265 PIN FUNCTIONS (DFN/TSSOP) BYP+ (Pin 15/Pin 17): LDO+ Reference Bypass Pin. Connect a capacitor from BYP+ to GND to reduce LDO+ output noise. Leave floating if unused. ADJ+ (Pin 16/Pin 18): Feedback Input for the Positive Low Dropout (LDO+) Regulator. This pin servos to a fixed voltage of 1.2V when the control loop is complete. LDO+ (Pin 17/Pin 19): Positive Low Dropout (LDO+) Output. This pin requires a low ESR capacitor with at least 2F capacitance to ground for stability. VOUT+ (Pin 18/Pin 20): Boost Charge Pump Output Voltage. In constant frequency mode (MODE = low) this pin is driven to 2 * VIN_P. In Burst Mode operation, (MODE = high) this pin voltage is regulated to 0.94 * 2 * VIN_P using an internal burst comparator with hysteretic control. GND (Exposed Pad Pin 19/Exposed Pad Pin 21): Ground. The exposed package pad is ground and must be soldered to the PC board ground plane for proper functionality and for rated thermal performance. 3265fa For more information www.linear.com/LTC3265 9 LTC3265 BLOCK DIAGRAM Note: Pin numbers are as per DFN package. Refer to the Pin Functions section for corresponding TSSOP pin numbers. 2 1 CBST + 3 18 CBST - VOUT+ VIN_P S1 S4 S3 S2 BOOST CHARGE PUMP LDO+ 13 4 14 EN+ EN- MODE 50kHz TO 500kHz OSC CHARGE PUMP AND LOGIC INPUT BYP+ 9 8 16 15 1.2V REF -1.2V REF BYP- VIN_N ADJ- - S5 10 + ADJ+ INVERTING CHARGE PUMP 11 - 17 CINV + 5 6 + 12 RT S7 CINV - S6 VOUT- S8 LDO- 7 GND 19 3265 BD 3265fa 10 For more information www.linear.com/LTC3265 LTC3265 OPERATION (Refer to the Block Diagram) Shutdown Mode In shutdown mode, all circuitry except the internal bias is turned off. The LTC3265 is in shutdown when a logic low is applied to both the enable inputs (EN+ and EN-). The LTC3265 only draws 3A (typ) from the VIN_P supply in shutdown. If the VIN_N pin is tied to VIN_P it draws an additional 1A (typ) in shutdown. If the VIN_N pin is tied to VOUT+ then it does not carry any additional current in shutdown. Boost Charge Pump Constant Frequency Operation The LTC3265 boost charge pump provides low noise constant frequency operation when a logic low is applied to the MODE pin. The boost charge pump and oscillator circuit are enabled using the EN+ pin. At the beginning of a clock cycle, switches S1 and S2 are closed. The external flying capacitor across CBST+ and CBST- pins is charged to the VIN_P supply. In the second phase of the clock cycle, switches S1 and S2 are opened, while switches S3 and S4 are closed. In this configuration the CBST- side of the flying capacitor is connected to VIN_P and charge is delivered through the CBST+ pin to VOUT+. In steady state the VOUT+ pin regulates at 2 * VIN_P less any voltage drop due to the load current on VOUT+. Boost Charge Pump Burst Mode Operation The LTC3265 boost charge pump provides low power Burst Mode operation when a logic high is applied to the MODE pin. In Burst Mode operation, the boost charge pump charges the VOUT+ pin to 0.94 * 2 * VIN_P (typ). The part then shuts down the internal oscillator to reduce switching losses and goes into a low current state. This state is referred to as the sleep state in which the part consumes only about 85A from the VIN_P pin. When the output voltage droops enough to overcome the burst comparator hysteresis, the part wakes up and commences boost charge pump cycles until VOUT+ output voltage exceeds -0.94 * 2 * VIN_P (typ). This mode provides lower operating current at the cost of higher output ripple and is ideal for light load operation. Inverting Charge Pump Constant Frequency Operation The LTC3265 inverting charge pump provides low noise constant frequency operation when a logic low is applied to the MODE pin. The inverting charge pump and oscillator circuit are enabled using the EN- pin. At the beginning of a clock cycle, switches S5 and S6 are closed. The external flying capacitor across CINV+ and CINV- pins is charged to the VIN_N pin voltage. The VIN_N pin must be tied to VIN_P or VOUT+ pins depending on the desired output voltage at the VOUT- pin. In the second phase of the clock cycle, switches S5 and S6 are opened, while switches S7 and S8 are closed. In this configuration the CINV+ side of the flying capacitor is grounded and charge is delivered through the CINV- pin to VOUT-. In steady state the VOUT- pin regulates at -VIN_N less any voltage drop due to the load current on VOUT-. Inverting Charge Pump Burst Mode Operation The LTC3265 inverting charge pump provides low power Burst Mode operation when a logic high is applied to the MODE pin. In Burst Mode, the charge pump charges the VOUT- pin to -0.94 * VIN_N (typ). The part then shuts down the internal oscillator to reduce switching losses 600 OSCILLATOR FREQUENCY (kHz) The LTC3265 is a high voltage low noise dual output regulator. It includes a boost charge pump, an inverting charge pump and two LDO regulators to generate bipolar low noise supply rails from a single positive input. It supports a wide input power supply range from 4.5V to 16V for the boost charge pump and a 4.5V to 32V range for the inverting charge pump. 500 400 300 200 100 0 1 10 100 RT (k) 1k 10k 3265 F01 Figure 1. Oscillator Frequency vs RT 3265fa For more information www.linear.com/LTC3265 11 LTC3265 OPERATION (Refer to the Block Diagram) and goes into a low current state. This state is referred to as the sleep state in which the IC consumes only about 25A from the VIN_N pin. When the VOUT- output voltage droops enough to overcome the burst comparator hysteresis, the part wakes up and commences charge pump cycles until the output voltage exceeds -0.94 * VIN (typ). This mode provides lower operating current at the cost of higher output ripple and is ideal for light load operation. Charge Pump Frequency Programming The charge transfer frequency can be adjusted between 50kHz and 500kHz using an external resistor on the RT pin. At slower frequencies the effective open-loop output resistance (ROL) of the charge pumps are larger and they provide smaller average output current. Figure 1 can be used to determine a suitable value of RT to achieve a required oscillator frequency. If the RT pin is grounded, the part operates at a constant frequency of 500kHz. The charge pumps have lower ROL at higher frequencies. For Burst Mode operation it is recommended that the RT pin be tied to GND. This minimizes the charge pump ROL, quickly charges the output up to the burst threshold and optimizes the duration of the low current sleep state. Charge Pump Soft-Start The LTC3265 has built in soft-start circuitry to prevent excessive current flow during start-up. The soft-start is achieved by internal circuitry that slowly ramps the amount of current available at the output storage capacitors on the VOUT+ and VOUT- pins. The soft-start circuitry is reset in the event of a commanded shutdown or thermal shutdown. Charge Pump Short-Circuit/Thermal Protection The LTC3265 charge pumps have built-in short-circuit current limit as well as overtemperature protection. During a short-circuit condition, the part automatically limits its output currents from the VOUT+ and VOUT- pins to 220mA and 160mA respectively. If the junction temperature exceeds approximately 175C the thermal shutdown circuitry disables current delivery to the outputs. Once the junction temperature drops back to approximately 165C current delivery to the outputs is resumed. When thermal protection is active the junction temperature is beyond the specified operating range. Thermal protection is intended for momentary overload conditions outside normal operation. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Positive Low Dropout Linear Regulator (LDO+) The positive low dropout regulator (LDO+) supports a load of up to 50mA. The LDO+ takes power from the VOUT+ pin (output of the boost charge pump) and drives the LDO+ output pin to a voltage programmed by the resistor divider connected between LDO+, ADJ+ and GND pins. For stability, the LDO+ output must be bypassed to ground with a low ESR ceramic capacitor that maintains a capacitance of at least 2F across operating temperature and voltage. The boost charge pump and LDO+ are enabled or disabled via the EN+ logic input pin. Internal circuitry delays enabling the LDO+ output until reasonable voltage has developed on the charge storage capacitor on the VOUT+ pin. When the LDO+ is enabled, a soft-start circuit ramps its regulation point from zero to the final value over a period of 75s, reducing the inrush current on VOUT+ pin. Figure 2 shows the LDO+ regulator application circuit. The LDO+ output voltage VLDO+ can be programmed by choosing suitable values of R1 and R2 such that: R1 VLDO + = 1.2V * +1 R2 An optional capacitor of 100nF can be connected from the BYP+ pin to ground. This capacitor bypasses the internal 1.2V reference of the LTC3265 and improves the noise performance of the LDO+. If this function is not used the BYP+ pin should be left floating. An optional feedback capacitor (COPT) can be added for improved transient response. A value of 10pF is recommended for most applications but experimentation with capacitor sizes between 2pF and 22pF may yield further improvement in the transient response. 3265fa 12 For more information www.linear.com/LTC3265 LTC3265 OPERATION negative by the charge pump circuitry. Soft-start circuitry in the charge pump also provides soft-start functionality for the LDO- and prevents excessive inrush currents. VOUT+ EN+ 0 LDO+ 1 ADJ+ COPT BYP+ 1.2V REF GND CBYP+ R1 COUT LDO OUTPUT R2 Figure 3 shows the LDO- regulator application circuit. The LDO- output voltage VLDO- can be programmed by choosing suitable values of R1 and R2 such that: R1 VLDO - = - 1.2V * +1 R2 3265 F02 Figure 2. Positive LDO Application Circuit Negative Low Dropout Linear Regulator (LDO-) The negative low dropout regulator (LDO-) supports a load of up to 50mA. The LDO- takes power from the VOUT- pin (output of the inverting charge pump) and drives the LDO- output pin to a voltage programmed by the resistor divider connected between LDO-, ADJ- and GND pins. For stability, the LDO- output must be bypassed to ground with a low ESR ceramic capacitor that maintains a capacitance of at least 2F across operating temperature and voltage. An optional capacitor of 100nF can be connected from the BYP - pin to ground. This capacitor bypasses the internal -1.2V reference of the LTC3265 and improves the noise performance of the LDO-. If this function is not used the BYP - pin should be left floating. An optional feedback capacitor (COPT) can be added for improved transient response. A value of 10pF is recommended for most applications but experimentation with capacitor sizes between 2pF and 22pF may yield further improvement in the transient response. The LDO- is enabled or disabled via the EN- logic input pin. Initially, when the EN- logic input is low, the charge pump circuitry is disabled and the VOUT- pin is at GND. When EN- is switched high, the VOUT- pin will be driven -1.2V REF GND CBYP- BYP- ADJ- EN- 1 COPT LDO- R2 R1 COUT LDO OUTPUT 0 VOUT- 3265 F03 Figure 3: Negative LDO Application Circuit 3265fa For more information www.linear.com/LTC3265 13 LTC3265 APPLICATIONS INFORMATION Effective Open-Loop Output Resistance The effective open-loop output resistance (ROL) of a charge pump is a very important parameter which determines the strength of the charge pump. The value of this parameter depends on many factors such as the oscillator frequency (fOSC), value of the flying capacitor (CFLY), the nonoverlap time, the internal switch resistances (RS) and the ESR of the external capacitors. Typical ROL values of the boost charge pump as a function of temperature are shown in Figure 4. VOUT+ EFFECTIVE OPEN-LOOP RESISTANCE () Typical ROL values of the inverting charge pump as a function of temperature are shown in Figure 5. 40 35 30 RT = GND VIN_P = 4.5V IOUT + VRIPPLE(P-P) COUT + VIN_P = 10V 25 15 VIN_P = 16V 5 0 -50 0 50 100 TEMPERATURE (C) 150 3265 F04 VOUT+ EFFECTIVE OPEN-LOOP RESISTANCE () Figure 4. Typical ROL vs Temperature (Boost Charge Pump) 45 40 RT = GND 35 30 VIN_N = 4.5V 25 VIN_N = 16V 20 15 VIN_N = 10V 10 Just as the value of COUT controls the amount of output ripple, the value of CIN controls the amount of ripple present at the input pins (VIN_P and VIN_N). The amount of bypass capacitance required at the input depends on the source impedance driving VIN_P and VIN_N. For best results it is recommended that VIN_P and VIN_N be bypassed with at least 2F of low ESR capacitance. A high ESR capacitor such as tantalum or aluminum will have higher input noise than a low ESR ceramic capacitor. Therefore, a ceramic capacitor is recommended as the main bypass capacitance with a tantalum or aluminum capacitor used in parallel if desired. Flying Capacitor Selection 5 0 -50 1 - tON f OSC where fOSC is the oscillator frequency, COUT+ is the value of the output capacitor and tON is the on-time of the oscillator (1s typical). The output ripple at the VOUT- pin can be calculated using the corresponding IOUT- and COUT- values. 20 10 control loop stability, output ripple, charge pump strength and minimum turn-on time. To reduce noise and ripple, it is recommended that low ESR ceramic capacitors be used for the charge pumps and LDO outputs. All capacitors should retain at least 2F of capacitance over operating temperature and bias voltage. Tantalum and aluminum capacitors can be used in parallel with a ceramic capacitor to increase the total capacitance but should not be used alone because of their high ESR. In constant frequency mode, the values of COUT+ and COUT- directly control the amount of output ripple for a given load current. Increasing the sizes of COUT+ and COUT- will reduce the output ripple at the expense of higher minimum turn-on time. The peakto-peak output ripple at the VOUT+ pin is approximately given by the expression: 0 50 100 TEMPERATURE (C) 150 3265 F05 Figure 5. Typical ROL vs Temperature (Inverting Charge Pump) Input/Output Capacitor Selection The style and value of capacitors used with the LTC3265 determine several important parameters such as regulator The flying capacitors (CBST and CINV) controls the strength of the charge pumps. A 1F or greater ceramic capacitor is suggested for the flying capacitor for applications requiring the full rated output current of the charge pump. For very light load applications, the flying capacitor may be reduced to save space or cost. For example, a 0.2F capacitor might be sufficient for load currents up to 20mA. 3265fa 14 For more information www.linear.com/LTC3265 LTC3265 APPLICATIONS INFORMATION A smaller flying capacitor leads to a larger effective openloop resistance (ROL) and thus limits the maximum load current that can be delivered by the charge pump. VOUT+ VIN_P CBST LDO+ Ceramic Capacitors Ceramic capacitors of different materials lose their capacitance with higher temperature and voltage at different rates. For example, a capacitor made of X5R or X7R material will retain most of its capacitance from -40C to 85C whereas a Z5U or Y5V style capacitor will lose considerable capacitance over that range. Z5U and Y5V capacitors may also have a poor voltage coefficient causing them to lose 60% or more of their capacitance when the rated voltage is applied. Therefore when comparing different capacitors, it is often more appropriate to compare the amount of achievable capacitance for a given case size rather than discussing the specified capacitance value. The capacitor manufacturer's data sheet should be consulted to ensure the desired capacitance at all temperatures and voltages. Table 1 is a list of ceramic capacitor manufacturers and their websites. Table 1 CBYP- RT LDO- CINV CBYP+ VIN_N VOUT- 3265 F06 Figure 6. Recommended Layout Thermal Management At high input voltages and maximum output current, there can be substantial power dissipation in the LTC3265. If the junction temperature increases above approximately 175C, the thermal shutdown circuitry will automatically deactivate the output. To reduce the maximum junction temperature, a good thermal connection to the PC board ground plane is recommended. Connecting the exposed pad of the package to a ground plane under the device on two layers of the PC board can reduce the thermal resistance of the package and PC board considerably. AVX www.avx.com Kemet www.kemet.com Murata www.murata.com Taiyo Yuden www.t-yuden.com Vishay www.vishay.com TDK www.component.tdk.com Derating Power at High Temperatures Wurth Elektronik www.we-online.com To prevent an overtemperature condition in high power applications, Figure 7 should be used to determine the maximum combination of ambient temperature and power dissipation. Layout Considerations Due to high switching frequency and high transient currents produced by LTC3265, careful board layout is necessary for optimum performance. A true ground plane and short connections to all the external capacitors will improve performance and ensure proper regulation under all conditions. Figure 6 shows an example layout for the LTC3265. The flying capacitor nodes CBST+, CBST-, CINV+ and CINV- switch large currents at a high frequency. These nodes should not be routed close to sensitive pins such as the LDO feedback pins (ADJ+ and ADJ-) and internal reference bypass pins (BYP+ and BYP-). The power dissipated in the LTC3265 should always fall under the line shown for a given ambient temperature. The power dissipated in the LTC3265 has four components. Power dissipated in boost charge pump: PBOOST = (2 * VIN_P - VOUT+) * (IOUT+ + ILDO+) Power dissipated in the positive LDO: PLDO+ = (VOUT+ - VLDO+) * ILDO+ 3265fa For more information www.linear.com/LTC3265 15 LTC3265 APPLICATIONS INFORMATION Power dissipated in the negative LDO: It is recommended that the LTC3265 be operated in the region corresponding to TJ 150C for continuous operation as shown in Figure 7. Operation beyond 150C should be avoided as it may degrade part performance and lifetime. At high temperatures, typically around 175C, the part is placed in thermal shutdown and all outputs are disabled. When the part cools back down to a low enough temperature, typically around 165C, the outputs are re-enabled and the part resumes normal operation. PLDO- = (|VOUT-| - |VLDO-|) * ILDO- And, power dissipated in the inverting charge pump: PINV = (VIN_N - |VOUT-|) * (IOUT- + ILDO-) where IOUT+ denotes any additional current that might be pulled directly from the VOUT+ pin and IOUT- denotes any additional current out of the VOUT- pin. The LDO+ current is supplied by the boost charge pump through VOUT+ and is therefore included in the boost charge pump power dissipation. The LDO- current is supplied by the inverting charge pump through VOUT- and is therefore included in the inverting charge pump power dissipation. MAXIMUM POWER DISSIPATION (W) 7 The total power dissipation of the LTC3265 is given by: PD = PBOOST + PLDO+ + PLDO- + PINV The derating curve in Figure 7 assumes a maximum thermal resistance, JA, of 38C/W for the 20-lead TSSOP package. This can be achieved with a 4-layer PCB that includes 2oz Cu traces and six vias from the exposed pad of the LTC3265 to the ground plane. JA = 38C/W 6 THERMAL SHUTDOWN 5 4 3 2 RECOMMENDED OPERATION 1 TJ = 175C TJ = 150C 0 -50 -25 0 25 50 75 100 125 150 175 AMBIENT TEMPERATURE (C) 3265 F07 Figure 7. Maximum Power Dissipation vs Ambient Temperature TYPICAL APPLICATIONS Low Power 20V Power Supply from a Single-Ended 15V Input Supply 1F CBST+ CBST - VOUT+ VIN_N 15V LDO+ VIN_P 10F +20V 10F LTC3265 1F 10F EN+ EN- ADJ+ BYP+ MODE GND CINV+ BYP- CINV - ADJ- VOUT- LDO- 100nF 787k 50k 100nF 50k 787k 10F -20V 10F RT 200k 3265 TA03 3265fa 16 For more information www.linear.com/LTC3265 LTC3265 PACKAGE DESCRIPTION Please refer to http://www.linear.com/product/LTC3265#packaging for the most recent package drawings. DHC Package 18-Lead Plastic DFN (5mm x 3mm) (Reference LTC DWG # 05-08-1955 Rev O) 0.65 0.05 3.50 0.05 1.65 0.05 2.20 0.05 (2 SIDES) PACKAGE OUTLINE 0.25 0.05 0.50 BSC 4.40 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 5.00 0.10 (2 SIDES) R = 0.20 TYP 3.00 0.10 (2 SIDES) R = 0.115 TYP 10 0.40 0.10 18 1.65 0.10 (2 SIDES) PIN 1 TOP MARK (SEE NOTE 6) PIN 1 NOTCH 0.200 REF 0.75 0.05 0.00 - 0.05 9 0.25 0.05 0.50 BSC 4.40 0.10 (2 SIDES) 1 (DHC18) DFN 0713 REV O BOTTOM VIEW--EXPOSED PAD NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3265fa For more information www.linear.com/LTC3265 17 LTC3265 PACKAGE DESCRIPTION Please refer to http://www.linear.com/product/LTC3265#packaging for the most recent package drawings. FE Package 20-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663 Rev K) Exposed Pad Variation CA 6.07 (.239) 6.40 - 6.60* (.252 - .260) 4.95 (.195) 4.95 (.195) DETAIL A 1.98 (.078) REF 20 1918 17 16 15 14 13 12 11 6.60 0.10 4.50 0.10 DETAIL A 2.74 (.108) 6.40 2.74 (.252) (.108) BSC SEE NOTE 4 0.45 0.05 1.05 0.10 0.65 BSC 1 2 3 4 5 6 7 8 9 10 6.07 (.239) RECOMMENDED SOLDER PAD LAYOUT 4.30 - 4.50* (.169 - .177) 0.09 - 0.20 (.0035 - .0079) 0.25 REF 0.50 - 0.75 (.020 - .030) NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS MILLIMETERS 2. DIMENSIONS ARE IN (INCHES) 3. DRAWING NOT TO SCALE 0.56 (.022) REF DETAIL A IS THE PART OF THE LEAD FRAME FEATURE FOR REFERENCE ONLY NO MEASUREMENT PURPOSE 1.20 (.047) MAX 0 - 8 0.65 (.0256) BSC 0.195 - 0.30 (.0077 - .0118) TYP 0.05 - 0.15 (.002 - .006) FE20 (CA) TSSOP REV K 0913 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE 3265fa 18 For more information www.linear.com/LTC3265 LTC3265 REVISION HISTORY REV DATE DESCRIPTION A 03/16 Changed conditions of RT in VOUT- Voltage Loss curve. PAGE NUMBER 6 3265fa Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. For more information www.linear.com/LTC3265 19 LTC3265 TYPICAL APPLICATION Low Noise +7V/-2V Power Supply from a Single-Ended 5V Input Supply (Frequency = 200kHz) 1F CBST+ CBST - VOUT+ VIN_N 5V LDO+ VIN_P 10F 7V 10F LTC3265 1F 10F EN+ EN- ADJ+ BYP+ MODE GND CINV+ BYP- CINV - ADJ- VOUT- LDO- 100nF 497k 100k 100nF 100k 66.5k 10F -2V 10F RT 200k 3265 TA02 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC1144 Switched-Capacitor Wide Input Range Voltage Converter with Shutdown Wide Input Voltage Range: 2V to 18V, ISD < 8A, SO8 Package LTC1514/LTC1515 Step-Up/Step-Down Switched Capacitor DC/DC Converters VIN: 2V to 10V, VOUT: 3.3V to 5V, IQ = 60A, SO8 Package LT 1611 150mA Output, 1.4MHz Micropower Inverting Switching Regulator VIN: 0.9V to 10V, VOUT = 34V, ThinSOTTM Package LT1614 250mA Output, 600kHz Micropower Inverting Switching Regulator VIN: 0.9V to 6V, VOUT = 30V, IQ = 1mA, MS8, SO8 Packages LTC1911 250mA, 1.5MHz Inductorless Step-Down DC/DC Converter VIN: 2.7V to 5.5V, VOUT = 1.5V/1.8V, IQ = 180A, MS8 Package (R) LTC3250/LTC3250-1.2 Inductorless Step-Down DC/DC Converter LTC3250-1.5 VIN: 3.1V to 5.5V, VOUT = 1.2V, 1.5V, IQ = 35A, ThinSOT Package LTC3251 500mA Spread Spectrum Inductorless Step-Down DC/DC Converter VIN: 2.7V to 5.5V, VOUT: 0.9V to 1.6V, 1.2V, 1.5V, IQ = 9A, MS10E Package LTC3252 Dual 250mA, Spread Spectrum Inductorless Step-Down DC/DC Converter VIN: 2.7V to 5.5V, VOUT: 0.9V to 1.6V, IQ = 50A, DFN12 Package LT1054/LT1054L Switched Capacitor Voltage Converter with Regulator VIN: 3.5V to 15V/7V, IOUT = 100mA/125mA, N8, S08, SO16 Packages LTC3260 Low Noise Dual Supply Inverting Charge Pump VIN: 4.5V to 32V, ILDO = 50mA, DE14, MSE16 Packages LTC3261 High Voltage, Low Quiescent Current Inverting Charge Pump VIN: 4.5V to 32V, IOUT = 100mA, MSE12 Package LTC3200/LTC3200-5 Low Noise Doubler Charge Pump IOUT = 100mA, 2MHz Fixed Frequency, MS8 and ThinSOT (LTC3200-5) Packages 3265fa 20 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTC3265 (408) 432-1900 FAX: (408) 434-0507 www.linear.com/LTC3265 LT 0316 REV A * PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2015