Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3243E_102_060611
1
SP3243E
3 Driver/5 Receiver Intelligent +3.0V to +5.5V
RS-232 Transceivers
The SP3243E products are 3 driver/5 receiver RS-232 transceiver solutions intended for portable
or hand-held applications such as notebook and palmtop computers. The SP3243E includes one
complementary receiver that remains alert to monitor an external device's Ring Indicate signal while
the device is shutdown. The SP3243E and EB devices feature slew-rate limited outputs for reduced
crosstalk and EMI. The "U" and "H" series are optimized for high speed with data rates up to 1Mbps,
easily meeting the demands of high speed RS-232 applications. The SP3243E series uses an internal
high-efciency, charge-pump power supply that requires only 0.1µF capacitors in 3.3V operation. This
charge pump and Exar's driver architecture allow the SP3243E series to deliver compliant RS-232
performance from a single power supply ranging from +3.0V to +5.5V. The AUTO ON-LINE® feature
allows the device to automatically "wake-up" during a shutdown state when an RS-232 cable is con-
nected and a connected peripheral is turned on. Otherwise, the device automatically shuts itself down
drawing less than 1µA.
FEATURES
■ Meets true EIA/TIA-232-F Standards
from a +3.0V to +5.5V power supply
■ Interoperable with EIA/TIA-232 and
adheres to EIA/TIA-562 down to a +2.7V
power source
■ AUTO ON-LINE® circuitry automatically
wakes up from a 1µA shutdown
■ Regulated Charge Pump Yields Stable
RS-232 Outputs Regardless of VCC
Variations
■ Enhanced ESD Specications:
+15kV Human Body Model
+15kV IEC61000-4-2 Air Discharge
+8kV IEC61000-4-2 Contact Discharge
■ 250 Kbps min. transmission rate (EB)
■ 1000 Kbps min. transmission rate (EU)
■ Ideal for High Speed RS-232 Applications
DESCRIPTION
SELECTION TABLE
Now Available in Lead Free Packaging
R
4
IN
1
2
3
425
26
27
28
5
6
7
24
23
22 SHUTDOWN
C2-
V-
R
1
IN
R
2
IN
R
3
IN ONLINE
C2+
C1-
GND
V
CC
V+
STATUS
T
1
IN
8
9
10
11 18
19
20
21
12
13
14
17
16
15 R
5
OUT
T
1
OUT
T
2
OUT
T
3
OUT
T
3
IN
T
2
IN R
4
OUT
R
5
IN
R
3
OUT
R
2
OUT
R
1
OUT
R
2
OUT
SP3243E
C1+
Device Power
Supplies
RS-232
Drivers
RS-232
Receivers
External
Components
Auto
On-Line
Circuitry
TTL
3-
State
# of
Pins
Data
Rate
ESD
Rating
SP3243E +3.0V to +5.5V 3 5 4 Capacitors Yes Yes 28 120 15kV
SP3243EB +3.0V to +5.5V 3 5 4 Capacitors Yes Yes 28 250 15kV
SP3243EH +3.0V to +5.5V 3 5 4 Capacitors Yes Yes 28 460 15kV
SP3243EU +3.0V to +5.5V 3 5 4 Capacitors Yes Yes 28 1000 15kV
2
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3243E_102_060611
NOTE 1: V+ and V- can have maximum magnitudes of
7V, but their absolute difference cannot exceed 13V.
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability and cause permanent damage to the
device.
VCC.......................................................-0.3V to +6.0V
V+ (NOTE 1).......................................-0.3V to +7.0V
V- (NOTE 1)........................................+0.3V to -7.0V
V+ + |V-| (NOTE 1)...........................................+13V
ICC (DC VCC or GND current).........................+100mA
Input Voltages
TxIN, ONLINE,SHUTDOWN, .....-0.3V to Vcc +6.0V
RxIN...................................................................+15V
Output Voltages
TxOUT.............................................................+13.2V
RxOUT, STATUS.......................-0.3V to (VCC +0.3V)
Short-Circuit Duration
TxOUT....................................................Continuous
Storage Temperature......................-65°C to +150°C
Unless otherwise noted, the following specications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX,
C1 - C4 = 0.1µF. Typical values apply at VCC = +3.3V or +5.0V and TAMB = 25°C.
Power Dissipation per package
28-pin SOIC (derate 12.7mW/oC above +70oC).........1000mW
28-pin SSOP (derate 11.2mW/oC above +70oC)..........900mW
28-pin TSSOP (derate 13.2mW/oC above +70oC)......1059mW
32-pin QFN (derate 29.4mW/oC above +70oC)...........2352mW
ELECTRICAL CHARACTERISTICS
PARAMETER MIN. TYP. MAX. UNITS CONDITIONS
DC CHARACTERISTICS
Supply Current, AUTO ON-
LINE®
1.0 10 µA All RxIN open, ONLINE = GND,
SHUTDOWN = VCC, VCC = 3.3V
TAMB = 25oC, TxIN = GND or VCC
Supply Current, Shutdown 1.0 10 µA SHUTDOWN = GND, VCC = 3.3V,
TAMB = 25oC, TxIN = Vcc or GND
Supply Current
AUTO ON-LINE® Disabled
0.3 1.0 mA ONLINE = SHUTDOWN = Vcc, no
load, VCC = 3.3V, TAMB = +25oC,
TxIN = GND or VCC
LOGIC INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold
LOW
HIGH 2.4
0.8 V
V
VCC = =3.3V or =5.0V, TxIN
ONLINE, SHUTDOWN
Input Leakage Current +0.01 +1.0 µA TxIN, ONLINE, SHUTDOWN,
TAMB = +25oC, VIN = 0V to VCC
Output Leakage Current +0.05 +10 µA Receivers disabled, VOUT = 0V to VCC
Output Voltage LOW 0.4 VIOUT = 1.6mA
Output Voltage HIGH VCC -0.6 VCC -0.1 VIOUT = -1.0mA
DRIVER OUTPUTS
Output Voltage Swing +5.0 +5.4 V All driver outputs loaded with 3KΩ to
GND, TAMB = +25oC
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3
Unless otherwise noted, the following specications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX,
C1 - C4 = 0.1µF. Typical values apply at VCC = +3.3V or +5.0V and TAMB = 25°C.
ELECTRICAL CHARACTERISTICS
PARAMETER MIN. TYP. MAX. UNITS CONDITIONS
DRIVER OUTPUTS (continued)
Output Resistance 300 Ω VCC = V+ = V- = 0V, VOUT=+2V
Output Short-Circuit Current +35 +60 mA VOUT = 0V
Output Leakage Current +25 µA VCC = 0V or 3.0V to 5.5V, VOUT =
+12V, Drivers disabled
RECEIVER INPUTS
Input Voltage Range -15 15 V
Input Threshold LOW 0.6 1.2 V Vcc = 3.3V
Input Threshold LOW 0.8 1.5 V Vcc = 5.0V
Input Threshold HIGH 1.5 2.4 V Vcc = 3.3V
Input Threshold HIGH 1.8 2.4 V Vcc = 5.0V
Input Hysteresis 0.3 V
Input Resistance 3 5 7 kΩ
AUTO ON-LINE® CIRCUITRY CHARACTERISTICS (ONLINE = GND, SHUTDOWN = VCC) 25°C
STATUS Output Voltage LOW 0.4 VIOUT = 1.6mA
STATUS Output Voltage HIGH VCC -0.6 VIOUT = -1.0mA
Receiver Threshold to Drivers
Enabled (tONLINE)
350 µs Figure 14
Receiver Positive or Negative
Threshold to STATUS HIGH (tSTSH)
0.2 µs Figure 14
Receiver Positive or Negative
Threshold to STATUS LOW (tSTSL)
30 µs Figure 14
TIMING CHARACTERISTICS
Maximum Data Rate (U)
(H)
(B)
( - )
1000
460
250
120
Kbps RL = 3KΩ, CL = 250pF, one driver
active
RL = 3KΩ, CL = 1000pF, one
driver active
RL = 3KΩ, CL = 1000pF, one
driver active
RL = 3KΩ, CL = 1000pF, one
driver active
Receiver Propagation Delay
tPHL
tPLH
0.15
0.15
µs Receiver input to Receiver out-
put, CL = 150pF
Receiver Output Enable Time 200 ns Normal operation
Receiver Output Disable Time 200 ns Normal operation
Driver Skew (E, EB)
(EH, EU)
100
50
500
100
ns | tPHL - tPLH |
Receiver Skew 50 ns | tPHL - tPLH |
Transition-Region Slew Rate
(EH, EU)
(E, EB) 6
90
30
V/µs
Vcc = 3.3V, RL = 3kΩ, TAMB =
25°C, measurements taken from
-3.0V to +3.0V or +3.0V to -3.0V
4
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3243E_102_060611
Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 1000kbps data rate, all
drivers loaded with 3kΩ, 0.1µF charge pump capacitors, and TAMB = +25°C.
Figure 2. Transmitter Output Voltage VS. Supply
Voltage for the SP3243EU
Figure 6. Transmitter Output Voltage VS. Load
Capacitance for the SP3243EB
Figure 1. Transmitter Skew VS. Load Capacitance
0 250 500 1000 1500 2000
200
150
100
50
0
Load Capacitance (pF)
Skew (ns)
T1 at 500Kbps
T2 at 31.2Kbps
All TX loaded 3K // CLoad
Figure 3. Transmitter Output Voltage VS. Load
Capacitance for the SP3243EU
Figure 5. Supply Current VS. Supply Voltage for the
SP3243EU
Figure 4. Supply Current VS. Load Capacitance for
the SP3243EU
TYPICAL PERFORMANCE CHARACTERISTICS
2.7 3 3.5 4 4.5 5
Supply V oltage (V)
6
4
2
0
-2
-4
-6
1Driver at 1Mbps
Other Drivers at 62.5Kbps
All Drivers Loaded with 3K // 250pF
25
20
15
10
5
0
2.7 3 3.5 4 4.5 5
Supply V oltage (V DC)
1 Transmitter at 250Kbps
2 Transmitters at 15.6Kbps
All drivers loaded with 3K // 1000pF
0 250 500 1000 1500 2000
Load Capacitance (pF)
Transmitter
Output V oltage (V)
6
4
2
0
-2
-4
-6
1 TX at full data rate
2 TX’s at1/16 data rate
2Mbps 1.5Mbps
1Mbps
2Mbps 1.5Mbps
1Mbps
40
35
30
25
20
15
10
5
0
Load Capacitance (pF)
0 1000 2000 3000 4000 5000
250Kbps 120Kbps
20Kbps
1 Transmitter at full Data Rate
2 Transmitters at 15.5 Kbps
All Transmitters loades 3K + Load Cap
6
4
2
0
-2
-4
-6 0 1000 2000 3000 4000 5000
TxOUT +
TxOUT -
Load Capacitance (pF)
Transmitter Output
Voltage (V)
Supply Current (mA)
Transmitter Output
Voltage (V)
Supply Current (mA)
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3243E_102_060611
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Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 1000kbps data rate, all
drivers loaded with 3kΩ, 0.1µF charge pump capacitors, and TAMB = +25°C.
Figure 7. Slew Rate VS. Load Capacitance
TYPICAL PERFORMANCE CHARACTERISTICS
25
20
15
10
5
00 500 1000 2000 3000 4000 5000
Load Capacitance (pF)
- Slew
+ Slew
1 Transmitter at 250Kbps
2 Transmitter at 15.6Kbps
All drivers loaded 3K + Load Cap
Slew Rate (V/µs)
6
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3243E_102_060611
Table 1. Device Pin Description
PIN NUMBER
NAME FUNCTION SP3243E SP3243EUCR
QFN
C1+ Positive terminal of the voltage doubler charge-pump capacitor 28 28
V+ Regulated +5.5V output generated by the charge pump 27 26
C1- Negative terminal of the voltage doubler charge-pump capacitor 24 22
C2+ Positive terminal of the inverting charge-pump capacitor 1 29
C2- Negative terminal of the inverting charge-pump capacitor 2 31
V- Regulated -5.5V output generated by the charge pump 3 32
R1IN RS-232 receiver input. 4 2
R2IN RS-232 receiver input 5 3
R3IN RS-232 receiver input 6 4
R4IN RS-232 receiver input 7 5
R5IN RS-232 receiver input 8 6
R1OUT TTL/CMOS receiver output 19 17
R2OUT TTL/CMOS receiver output 18 16
R2OUT Non-inverting receiver-2 output, active in shutdown 20 18
R3OUT TTL/CMOS receiver output 17 15
R4OUT TTL/CMOS receiver output 16 14
R5OUT TTL/CMOS receiver output 15 13
STATUS TTL/CMOS Output indicating online and shutdown status 21 19
T1IN TTL/CMOS driver input 14 12
T2IN TTL/CMOS driver input 13 11
T3IN TTL/CMOS driver input 12 10
ONLINE Apply logic HIGH to override AUTO ON-LINE® circuitry
keeping drivers acive (SHUTDOWN must also be logic
HIGH, refer to Table 2)
23 21
T1OUT RS-232 driver output 9 7
T2OUT RS-232 driver output 10 8
T3OUT RS-232 driver output 11 9
GND Ground 25 23
VCC +3.0V to +5.5V supply voltage 26 25
SHUTDOWN Apply logic LOW to SHUTDOWN driver and charge pump.
This overrides all AUTO ON-LINE® circuitry and ONLINE
(Refer to table 2)
22 20
NC No Connection - 1,24,27,30
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3243E_102_060611
7
Figure 9. SP3243E QFN Pinout Conguration
Figure 8. SP3243E Typical Operating Circuit
SP3243E
28
24
2
1
27
3
26
5kΩ
5kΩ
5kΩ
5kΩ
5kΩ
GND
C1+
C1-
C2+
C2-
V+
V-
V
CC
14
13
12
20
19
18
17
16
15
0.1
µ
F
0.1
µ
F
0.1
µ
F
+
C2
C5
C1
+
+C3
C4
+
+
0.1
µ
F
0.1
µ
F
9
10
11
4
5
6
7
8
RS-232
OUTPUTS
RS-232
INPUTS
TTL/CMOS
INPUTS
TTL/CMOS
OUTPUTS
To µ P Supervisor
Circuit
23
22
21
V
CC
V
CC
25
T1IN
R1OUT R1IN
T2OUT
R2OUT
T2IN
T3IN T3OUT
T1OUT
R2IN
R3IN
R4IN
R5IN
R2OUT
R3OUT
R4OUT
R5OUT
ONLINE
SHUTDOWN
STATUS
8
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3243E_102_060611
DESCRIPTION
The SP3243E transceivers meet the EIA/TIA-
232 and ITU-T V.28/V.24 communication protocols
and can be implemented in battery-powered,
portable, or hand-held applications such as
notebook or palmtop computers. The SP3243E
devices feature Exar's proprietary and patented
(U.S.-- 5,306,954) on-board charge pump cir-
cuitry that generates ±5.5V RS-232 voltage levels
from a single +3.0V to +5.5V power supply. The
SP3243EU devices can operate at a data rate
of 1000kbps fully loaded.
The SP3243E is a 3-driver/5-receiver device,
ideal for portable or hand-held applications.
The SP3243E includes one complementary
always-active receiver that can monitor an
external device (such as a modem) in shutdown.
This aids in protecting the UART or serial
controller IC by preventing forward biasing
of the protection diodes where VCC may be
disconnected.
The SP3243E series is an ideal choice for power
sensitive designs. The SP3243E devices feature
AUTO ON-LINE® circuitry which reduces the
power supply drain to a 1µA supply current.
In many portable or hand-held applications, an
RS-232 cable can be disconnected or a connected
peripheral can be turned off. Under these condi-
tions, the internal charge pump and the drivers will
be shut down. Otherwise, the system automati-
cally comes online. This feature allows design
engineers to address power saving concerns
without major design changes.
THEORY OF OPERATION
The SP3243E series is made up of four basic
circuit blocks:
1. Drivers
2. Receivers
3. the Exar proprietary charge pump, and
4. AUTO ON-LINE® circuitry.
Drivers
The drivers are inverting level transmitters that
convert TTL or CMOS logic levels to 5.0V EIA/
TIA-232 levels with an inverted sense relative
to the input logic levels. Typically, the RS-232
output voltage swing is +5.4V with no load and
+5V minimum fully loaded. The driver outputs are
protected against innite short-circuits to ground
without degradation in reliability. These drivers
comply with the EIA-TIA-232-F and all previous
RS-232 versions. Unused drivers inputs should
be connected to GND or VCC.
The drivers have a minimum data rate of 250kbps
(EB) or 1000kbps (EU) fully loaded.
Figure 11 shows a loopback test circuit used to
test the RS-232 Drivers. Figure 12 shows the
test results where one driver was active at 1Mbps
and all three drivers loaded with an RS-232 re-
ceiver in parallel with a 250pF capacitor. Figure
13 shows the test results of the loopback circuit
with all drivers active at 250kbps with typical
RS-232 loads in parallel with 1000pF capacitors. A
superior RS-232 data transmission rate of 1Mbps
makes the SP3243EU an ideal match for high
speed LAN and personal computer peripheral
applications.
Figure 10. Interface Circuitry Controlled by Micropro-
cessor Supervisory Circuit
SP3243E
28
24
2
1
27
3
26
5KΩ
5KΩ
5KΩ
5KΩ
5KΩ
GND
C1+
C1-
C2+
C2-
V+
V-
VCC
14
13
12
20
19
18
17
16
15
0.1 µF
0.1 µF
0.1 µF
+
C2
C5
C1
+
+C3
C4
+
+
0.1 µF
0.1 µF
9
10
11
4
5
6
7
8
RS-232
OUTPUTS
RS-232
INPUTS
23
22
21
VCC
25
T
1
IN
R
1
OUT R
1
IN
T
2
OUT
R
2
OUT
T
2
IN
T
3
IN T
3
OUT
T
1
OUT
R
2
IN
R
3
IN
R
4
IN
R
5
IN
R
2
OUT
R
3
OUT
R
4
OUT
R
5
OUT
ONLINE
SHUTDOWN
STATUS
UART
or
Serial µC
µ P
Supervisor
IC
TxD
RTS
DTR
RxD
CTS
DSR
DCD
RI
V
CC
VIN
RESET
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9
Receivers
The receivers convert +5.0V EIA/TIA-232
levels to TTL or CMOS logic output levels. Re-
ceivers are High-Z when the AUTO ON-LINE®
circuitry is enabled or when in shutdown. The
truth table logic of the SP3243 driver and receiver
outputs can be found in Table 2.
The SP3243E includes an additional non-in-
verting receiver with an output R2OUT. R2OUT
is an extra output that remains active and
monitors activity while the other receiver
outputs are forced into high impedance.
This allows a Ring Indicator (RI) signal from a
peripheral to be monitored without forward
biasing the TTL/CMOS inputs of the other
devices connected to the receiver outputs.
Table 2. SHUTDOWN Truth Tables
Note: In AUTO ON-LINE® Mode where ONLINE = GND
and SHUTDOWN = VCC, the device will shut down if
there is no activity present at the Receiver inputs.
Figure 11. Loopback Test Circuit for RS-232 Driver
Data Transmission Rates
Since receiver input is usually from a transmis-
sion line where long cable lengths and system
interference can degrade the signal, the inputs
have a typical hysteresis margin of 300mV. This
ensures that the receiver is virtually immune to
noisy transmission lines. Should an input be left
unconnected, an internal 5KΩ pulldown resistor
to ground will commit the output of the receiver
to a HIGH state.
Figure 13. Loopback Test results at 250Kbps
Figure 12. Loopback Test results at 1Mbps
SP3243
GND
T1IN
TXIN
C1+
C1-
C2+
C2-
V+
V-
V
CC
0.1 µF
0.1 µF
0.1 µF
+
C2
C5
C1
+
+C3
C4
+
+
0.1 µF
0.1 µF
TTL/CMOS
INPUTS
+3V to +5V
18
SHUTDOWN
5KΩ
R1OUT
5KΩ
RXIN
RXOUT
TTL/CMOS
OUTPUTS
ONLINE
R1IN
TXOUT
T1OUT
STATUS
V
CC
To µP Supervisor
Circuit
1000pF 1000pF
Device: SP3243E
SHUTDOWN TxOUT RxOUT R2OUT
0 High-Z High-Z Active
1 Active Active Active
10
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3243E_102_060611
Charge Pump
The charge pump is a Exar–patented design
(U.S. 5,306,954) and uses a unique approach
compared to older less–efficient designs.
The charge pump still requires four external
capacitors, but uses a four–phase voltage
shifting technique to attain symmetrical 5.5V
power supplies. The internal power supply
consists of a regulated dual charge pump that
provides output voltages 5.5V regardless of
the input voltage (VCC) over the +3.0V to +5.5V
range. This is important to maintain compli-
ant RS-232 levels regardless of power supply
uctuations.
The charge pump operates in a discontinuous
mode using an internal oscillator. If the output
voltages are less than a magnitude of 5.5V, the
charge pump is enabled. If the output voltages
exceed a magnitude of 5.5V, the charge pump
is disabled. This oscillator controls the four
phases of the voltage shifting. A description of
each phase follows.
Phase 1
— VSS charge storage — During this phase of the
clock cycle, the positive side of capacitors C1 and
C2 are initially charged to VCC. Cl
+ is then switched
to GND and the charge in C1
– is transferred to C2
–.
Since C2
+ is connected to VCC, the voltage potential
across capacitor C2 is now 2 times VCC.
Phase 2
— VSS transfer — Phase two of the clock
connects the negative terminal of C2 to the VSS
storage capacitor and the positive terminal of
C2 to GND. This transfers a negative gener-
ated voltage to C3. This generated voltage is
regulated to a minimum voltage of -5.5V.
Simultaneous with the transfer of the voltage to C3,
the positive side of capacitor C1 is switched to VCC
and the negative side is connected to GND.
Phase 3
— VDD charge storage — The third phase of the
clock is identical to the rst phase — the charge
transferred in C1 produces –VCC in the negative
terminal of C1, which is applied to the negative
side of capacitor C2. Since C2
+ is at VCC, the volt-
age potential across C2 is 2 times VCC.
Phase 4
— VDD transfer — The fourth phase of the clock
connects the negative terminal of C2 to GND,
and transfers this positive generated voltage
across C2 to C4, the VDD storage capacitor. This
voltage is regulated to +5.5V. At this voltage,
the internal oscillator is disabled. Simultane-
ous with the transfer of the voltage to C4, the
positive side of capacitor C1 is switched to VCC
and the negative side is connected to GND, al-
lowing the charge pump cycle to begin again.
The charge pump cycle will continue as long
as the operational conditions for the internal
oscillator are present.
Since both V+ and V– are separately generated
from VCC, in a no–load condition V+ and V– will
be symmetrical. Older charge pump approaches
that generate V– from V+ will show a decrease in
the magnitude of V– compared to V+ due to the
inherent inefciencies in the design. The clock
rate for the charge pump typically operates at
greater than 250kHz. The external capacitors
can be as low as 0.1µF with a 16V breakdown
voltage rating.
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3243E_102_060611
11
The SP3243E devices have a patent pending
AUTO ON-LINE® circuitry on board that saves
power in applications such as laptop computers,
palmtop (PDA) computers and other portable
systems.
The SP3243E devices incorporate an AUTO
ON-LINE® circuit that automatically enables itself
when the external transmitters are enabled and
the cable is connected. Conversely, the AUTO
ON-LINE® circuit also disables most of the inter-
nal circuitry when the device is not being used
and goes into a standby mode where the device
typically draws 1µA. This function is externally
controlled by the ONLINE pin. When this pin is
tied to a logic LOW, the AUTO ON-LINE® function
is active. Once active, the device is enabled until
there is no activity on the receiver inputs. The
receiver input typically sees at least +3V, which
are generated from the transmitters at the other
end of the cable with a +5V minimum.
Minimum recommended charge pump capacitor value
Input Voltage Vcc Charge pump capacitor value for SP32XX
3.0V to 3.6V C1 - C4 = 0.1µF
4.5V to 5.5V C1 = 0.047µF, C2 - C4 = 0.33µF
3.0V to 5.5V C1 - C4 = 0.22µF
When the external transmitters are disabled or
the cable is disconnected, the receiver inputs will
be pulled down by their internal 5kΩ resistors to
ground. When this occurs over a period of time,
the internal transmitters will be disabled and the
device goes into a shutdown or standy mode.
When ONLINE is HIGH, the AUTO ON-LINE®
mode is disabled.
The AUTO ON-LINE® circuit has two stages:
1) Inactive Detection
2) Accumulated Delay
AUTO ONLINE CIRCUITRY
The Exar-patented charge pumps are designed
to operate reliably with a range of low cost
capacitors. Either polarized or non polarized
capacitors may be used. If polarized capacitors
are used they should be oriented as shown in
the Typical Operating Circuit. The V+ capaci-
tor may be connected to either ground or Vcc
(polarity reversed.)
The charge pump operates with 0.1µF capacitors
for 3.3V operation. For other supply voltages, see
the table for required capacitor values. Do not use
values smaller than those listed. Increasing the
capacitor values (e.g., by doubling in value)
reduces ripple on the transmitter outputs and
may slightly reduce power consumption. C2,
C3, and C4 can be increased without changing
C1’s value.
For best charge pump efciency locate the
charge pump and bypass capacitors as close
as possible to the IC. Surface mount capacitors
are best for this purpose. Using capacitors with
lower equivalent series resistance (ESR) and
self-inductance, along with minimizing parasitic
PCB trace inductance will optimize charge pump
operation. Designers are also advised to consider
that capacitor values may shift over time and
operating temperature.
12
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The rst stage, shown in Figure 21, detects an
inactive input. A logic HIGH is asserted on
RXINACT if the cable is disconnected or the
external transmitters are disabled. Otherwise,
RXINACT will be at a logic LOW. This circuit is
duplicated for each of the other receivers.
The second stage of the AUTO ON-LINE® circuitry,
shown in Figure 22, processes all the receiver's
RXINACT signals with an accumulated delay that
disables the device to a 1µA supply current.
The STATUS pin goes to a logic LOW when the
cable is disconnected, the external transmit-
ters are disabled, or the SHUTDOWN pin is
invoked. The typical accumulated delay is around
20µs.
When the SP3243E drivers or internal charge
pump are disabled, the supply current is reduced
to 1µA. This can commonly occur in hand-held
or portable applications where the RS-232 cable
is disconnected or the RS-232 drivers of the con-
nected peripheral are turned off.
The AUTO ON-LINE® mode can be disabled by
the SHUTDOWN pin. If this pin is a logic LOW,
the AUTO ON-LINE® function will not operate
regardless of the logic state of the ONLINE pin.
Table 3 summarizes the logic of the AUTO ON-
LINE® operating modes. The truth table logic of
the SP3243E driver and receiver outputs can be
found in Table 2.
The STATUS pin outputs a logic LOW signal
if the device is shutdown. This pin goes to a
logic HIGH when the external transmitters are
enabled and the cable is connected.
When the SP3243E devices are shut down, the
charge pumps are turned off. V+ charge pump
output decays to VCC, the V- output decays to
GND. The decay time will depend on the size
of capacitors used for the charge pump. Once
in shutdown, the time required to exit the shut
down state and have valid V+ and V- levels is
typically 200µs.
For easy programming, the STATUS can be
used to indicate DSR or a Ring Indicator sig-
nal. Tying ONLINE and SHUTDOWN together
will bypass the AUTO ON-LINE® circuitry so this
connection acts like a shutdown input pin.
Figure 14. AUTO ON-LINE® Timing Waveforms
RECEIVER
RS-232 INPUT
VOLTAGES
STATUS
+5V
0V
-5V
tSTSL
tSTSH
tONLINE
V
CC
0V
DRIVER
RS-232 OUTPUT
VOLTAGES
0V
+2.7V
-2.7V
S
H
U
T
D
O
W
N
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13
Figure 16. Charge Pump — Phase 2
V
CC
= +5V
V
SS
Storage Capacitor
V
DD
Storage Capacito
r
C
1
C
2
C
3
C
4
+
+
+ +
–
–
––
-5.5V
VCC = +5V
–5V –5V
+5V
VSS Storage Capacitor
VDD Storage Capacitor
C1C2
C3
C4
+
+
+ +
–
–
––
Figure 15. Charge Pump — Phase 1
Figure 17. Charge Pump — Phase 3
V
CC
= +5V
–5V –5V
+5V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
+ +
–
–
––
Figure 18. Charge Pump — Phase 4
V
CC
= +5V
V
SS
Storage Capacitor
V
DD
Storage Capacito
r
C
1
C
2
C
3
C
4
+
+
+ +
–
–
––
+5.5V
14
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3243E_102_060611
Figure 19. SP3243E Driver Output Voltages vs. Load
Current per Transmitter
Figure 20. Circuit for the connectivity of the SP3243E with a DB-9 connector
6
4
2
0
-2
-4
-6
Transmitter Output Voltage [V]
Load Current Per Transmitter [mA]
Vout+
Vout-
0.62
0.869
0.939
1.02
1.12
1.23
1.38
1.57
1.82
2.67
3.46
4.93
8.6
The SP3243E driver outputs are able to maintain
voltage under loading of up to 2.5mA per driver,
ensuring sufcient output for mouse-driving ap-
plications.
6
7
8
9
1
2
3
4
5
DB-9
Connector
6. DCE Ready
7. Request to Send
8. Clear to Send
9. Ring Indicator
DB-9 Connector Pins:
1. Received Line Signal Detector
2. Received Data
3. Transmitted Data
4. Data Terminal Ready
5. Signal Ground (Common)
SP3243E
28
24
2
1
27
3
26
5k Ω
5k Ω
5k Ω
5k Ω
5k Ω
GND
C1+
C1-
C2+
C2-
V+
V-
VCC
14
13
12
20
19
18
17
16
15
0.1 µF
0.1 µF
0.1 µF
+
C2
C5
C1
+
+
C3
C4
+
+
0.1 µF
0.1 µF
9
10
11
4
5
6
7
8
To µP Supervisor
Circuit
23
22
21
V
CC
VCC
25
T1IN
R1OUT R1IN
T2OUT
R2OUT
T2IN
T3IN T3OUT
T1OUT
R2IN
R3IN
R4IN
R5IN
R2OUT
R3OUT
R4OUT
R5OUT
ONLINE
SHUTDOWN
STATUS
0
+
V
OUT
V
OUT
-
1
0
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15
LANGIS232-SR
REVIECERTA
TUPNI
NWODTUHS
TUPNI TUPNIENILN UTPTUOSUTATS REVIECSNART
SUTATS
YES HIGH HGIH
noitarepOlamroN
ON HGIH HGIH WOL
noitarepOlamroN
ON HGIH WOL WOL
nwodtuhS
(
enilnO-otuA
)
LOW HGIH
nwodtuhS
WOL
nwodtuhS
LOW
LOW
YES HIGH / LOW
HIGH / LOW
NO
(Auto-Online)
O
Table 3. AUTO ON-LINE® Logic
Figure 21. Stage I of AUTO ON-LINE® Circuitry
Figure 22. Stage II of AUTO ON-LINE® Circuitry
RS-232
Receiver Block
RXINACT
Inactive Detection Block
RXIN RXOUT
R1INACT R2INACT R3INACT R4INACT R5INACT
Delay
Stage
Delay
Stage
Delay
Stage
Delay
Stage Delay
Stage
SHUTDOWN
STATUS
16
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3243E_102_060611
ESD TOLERANCE
The SP3243E series incorporates ruggedized
ESD cells on all driver output and receiver input
pins. The ESD structure is improved over our
previous family for more rugged applications
and environments sensitive to electro-static dis-
charges and associated transients. The improved
ESD tolerance is at least +15kV without damage
nor latch-up.
There are different methods of ESD testing ap-
plied:
a) MIL-STD-883, Method 3015.7
b) IEC61000-4-2 Air-Discharge
c) IEC61000-4-2 Direct Contact
The Human Body Model has been the generally
accepted ESD testing method for semi-con-
ductors. This method is also specified in
MIL-STD-883, Method 3015.7 for ESD testing.
The premise of this ESD test is to simulate the
human body’s potential to store electro-static
energy and discharge it to an integrated circuit.
The simulation is performed by using a test
model as shown in Figure 23. This method
will test the IC’s capability to withstand an ESD
transient during normal handling such as in
manufacturing areas where the ICs tend to be
handled frequently.
The IEC-61000-4-2, formerly IEC801-2, is gen-
erally used for testing ESD on equipment and
systems. For system manufacturers, they must
guarantee a certain amount of ESD protection
since the system itself is exposed to the outside
environment and human presence. The premise
with IEC61000-4-2 is that the system is required
to withstand an amount of static electricity when
ESD is applied to points and surfaces of the
equipment that are accessible to personnel dur-
ing normal usage. The transceiver IC receives
most of the ESD current when the ESD source
is applied to the connector pins. The test circuit
for IEC61000-4-2 is shown on Figure 24. There
are two methods within IEC61000-4-2, the Air
Discharge method and the Contact Discharge
method.
With the Air Discharge Method, an ESD voltage
is applied to the equipment under test (EUT)
through air. This simulates an electrically charged
person ready to connect a cable onto the rear of
the system only to nd an unpleasant zap just
before the person touches the back panel. The
high energy potential on the person discharges
through an arcing path to the rear panel of the
system before he or she even touches the sys-
tem. This energy, whether discharged directly
or through air, is predominantly a function of
the discharge current rather than the discharge
voltage. Variables with an air discharge such as
approach speed of the object carrying the ESD
potential to the system and humidity will tend to
change the discharge current. For example, the
rise time of the discharge current varies with the
approach speed.
The Contact Discharge Method applies the ESD
current directly to the EUT. This method was
devised to reduce the unpredictability of the ESD
arc. The discharge current rise time is constant
since the energy is directly transferred without the
air-gap arc. In situations such as hand held sys-
tems, the ESD charge can be directly discharged
to the equipment from a person already holding
the equipment. The current is transferred on to
the keypad or the serial port of the equipment
directly and then travels through the PCB and
nally to the IC.
Figure 23. ESD Test Circuit for Human Body Model
R
C
Device
Under
Test
DC Power
Source
C
S
R
S
SW1 SW2
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17
DEVICE PIN HUMAN BODY IEC61000-4-2
TESTED MODEL Air Discharge Direct Contact Level
Driver Outputs +15kV +15kV +8kV 4
Receiver Inputs +15kV +15kV +8kV 4
The circuit models in Figures 23 and 24 represent
the typical ESD testing circuit used for all three
methods. The CS is initially charged with the DC
power supply when the rst switch (SW1) is on.
Now that the capacitor is charged, the second
switch (SW2) is on while SW1 switches off. The
voltage stored in the capacitor is then applied
through RS, the current limiting resistor, onto the
device under test (DUT). In ESD tests, the SW2
switch is pulsed so that the device under test
receives a duration of voltage.
For the Human Body Model, the current limiting
resistor (RS) and the source capacitor (CS) are
1.5kΩ an 100pF, respectively. For IEC-61000-4-2,
the current limiting resistor (RS) and the source ca-
pacitor (CS) are 330Ω an 150pF, respectively.
The higher CS value and lower RS value in the
IEC61000-4-2 model are more stringent than the
Human Body Model. The larger storage capaci-
tor injects a higher voltage to the test point when
SW2 is switched on. The lower current limiting
resistor increases the current charge onto the
Figure 25. ESD Test Waveform for IEC61000-4-2
Figure 24. ESD Test Circuit for IEC61000-4-2
Table 4. Transceiver ESD Tolerance Levels
R
S
and
R
V
add up to 330Ω for IEC61000-4-2.
R
C
Device
Under
Test
DC Power
Source
C
S
R
S
SW1 SW2
R
V
Contact-Discharge Model
t = 0ns t = 30ns
0A
15A
30A
I →
t →
18
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PACKAGE: 28 PIN WSOIC
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • 510-668-7017 • www.exar.com SP3243E_102_060611
19
PACKAGE: 32 PIN QFN
20
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PACKAGE: 28 PIN SSOP
▲
▲
e
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21
PACKAGE: 28 PIN TSSOP
22
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SP3243 E U EY L /TR
Tape and Reel options
“L” suffix indicates Lead Free packaging
Package Type A= SSOP
Y= TSSOP
Temperature Range C= Commercial Range 0ºc to 70ºC
E= Extended Range -40ºc to 85ºC
Speed Indicator Blank= 120Kbps
B= 250Kbps
U= 1Mbps
ESD Rating E= 15kV HBM and IEC 1000-4
Part Number
H= 460kbps
T= WSOIC
R= QFN
PRODUCT NOMENCLATURE
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23
ORDERING INFORMATION
For Tape and Reel option add "/TR", Example: SP3243ECA-L/TR.
Part Number Data Rate (kbps) Temp. Range Package
SP3243ECA-L 120 0C to +70C 28 Pin SSOP
SP3243ECT-L 120 0C to +70C 28 Pin WSOIC
SP3243ECY-L 120 0C to +70C 28 Pin TSSOP
SP3243EEA-L 120 -40C to +85C 28 Pin SSOP
SP3243EET-L 120 -40C to +85C 28 Pin WSOIC
SP3243EEY-L 120 -40C to +85C 28 Pin TSSOP
SP3243EBCA-L 250 0C to +70C 28 Pin SSOP
SP3243EBCY-L 250 0C to +70C 28 Pin TSSOP
SP3243EBEA-L 250 -40C to +85C 28 Pin SSOP
SP3243EBEY-L 250 -40C to +85C 28 Pin TSSOP
SP3243EHCA-L 460 0C to +70C 28 Pin SSOP
SP3243EHCT-L 460 0C to +70C 28 Pin WSOIC
SP3243EHEA-L 460 -40C to +85C 28 Pin SSOP
SP3243EHET-L 460 -40C to +85C 28 Pin WSOIC
SP3243EUCA-L 1000 0C to +70C 28 Pin SSOP
SP3243EUCT-L 1000 0C to +70C 28 Pin WSOIC
SP3243EUCY-L 1000 0C to +70C 28 Pin TSSOP
SP3243EUER-L 1000 0C to +70C 32 Pin QFN
SP3243EUEA-L 1000 -40C to +85C 28 Pin SSOP
SP3243EUET-L 1000 -40C to +85C 28 Pin WSOIC
SP3243EUEY-L 1000 -40C to +85C 28 Pin TSSOP
SP3243EUER-L 1000 -40C to +85C 32 Pin QFN
24
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REVISION HISTORY
Notice
EXAR Corporation reserves the right to make changes to any products contained in this publication in order to improve design, performance or reli-
ability. EXAR Corporation assumes no representation that the circuits are free of patent infringement. Charts and schedules contained herein are
only for illustration purposes and may vary depending upon a user's specic application. While the information in this publication has been carefully
checked; no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to signicantly affect its safety or effectiveness. Products are not authorized for
use in such applications unless EXAR Corporation receives, in writting, assurances to its satisfaction that: (a) the risk of injury or damage has been
minimized ; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances.
Copyright 2011 EXAR Corporation
Datasheet June 2011
Send your serial transceiver technical inquiry with technical details to: serialtechsupport@exar.com
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
DATE REVISION DESCRIPTION
02/05/06 -- Legacy Sipex Datasheet
07/23/09 1.0.0 Convert to Exar Format, Update ordering information and
change revision to 1.0.0.
11/10/09 1.0.1 Add missing (EH) model identication for Driver output Skew
and Transition-Region Slew Rate specication and change
revision to 1.0.1.
06/06/11 1.0.2 Remove obsolete devices per PDN 110510-01 and change
ESD rating to IEC61000-4-2.