3.3 V, Full-Duplex, 840 µA,
20 Mbps, EIA RS-485 Transceiver
ADM3491
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
FEATURES
Operates with 3.3 V supply
EIA RS-422 and RS-485 compliant over full CM range
19 kΩ input impedance
Up to 50 transceivers on bus
20 Mbps data rate
Short circuit protection
Specified over full temperature range
Thermal shutdown
Interoperable with 5 V logic
840 µA supply current
2 nA shutdown current
Also available in TSSOP package
Meets IEC1000-4-4 (>1 kV)
8 ns skew
Upgrade for MAX 3491, SN75ALS180
APPLICATIONS
Telecommunications
DTE–DCE interface
Packet switching
Local area networks
Data concentration
Data multiplexers
Integrated services digital network (ISDN)
AppleTalk
Industrial controls
GENERAL DESCRIPTION
The ADM3491 is a low power, differential line transceiver
designed to operate using a single 3.3 V power supply. Low
power consumption, coupled with a shutdown mode, makes it
ideal for power-sensitive applications. It is suitable for commu-
nication on multipoint bus transmission lines.
FUNCTIONAL BLOCK DIAGRAM
R
D
RE
DE
DI
A
B
Z
Y
ADM3491
RO
05234-001
Figure 1.
The ADM3491 is intended for balanced data transmission and
complies with both EIA Standards RS-485 and RS-422. It
contains a differential line driver and a differential line receiver,
making it suitable for full-duplex data transfer.
The input impedance is 19 kΩ, allowing up to 50 transceivers to
be connected on the bus. Excessive power dissipation caused by
bus contention or by output shorting is prevented by a thermal
shutdown circuit. This feature forces the driver output into a
high impedance state, if a significant temperature increase is
detected in the internal driver circuitry during fault conditions.
The receiver contains a fail-safe feature that results in a logic
high output state, if the inputs are unconnected (floating).
The ADM3491 is fabricated on BiCMOS, an advanced mixed
technology process combining low power CMOS with fast
switching bipolar technology.
The ADM3491 is fully specified over the industrial temperature
range and is available in DIP and SOIC packages, as well as the
space-saving TSSOP package.
ADM3491
Rev. A | Page 2 of 16
TABLE OF CONTENTS
Specifications..................................................................................... 3
Timing Specifications .................................................................. 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
Test Circuits ....................................................................................... 7
Switching Characteristics ................................................................ 8
Typical Performance Characteristics ..............................................9
Applications Information.............................................................. 11
Differential Data Transmission ................................................ 11
Cable and Data Rate................................................................... 11
Receiver Open-Circuit Fail-Safe Feature ................................ 11
Outline Dimensions....................................................................... 12
Ordering Guide .......................................................................... 13
REVISION HISTORY
11/04—Rev. 0 to Rev. A
Format Updated..................................................................Universal
Changes to Specifications Section.................................................. 3
Changes to Ordering Guide .......................................................... 13
1/98—Revision 0: Initial Version
ADM3491
Rev. A | Page 3 of 16
SPECIFICATIONS
VCC = 3.3 V ± 0.3 V. All specifications TMIN to TMAX, unless otherwise noted.
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
DRIVER
Differential Output Voltage, VOD 2.0 V RL = 100 Ω, Figure 4, VCC > 3.1 V
1.5 V RL = 54 Ω, Figure 4
1.5 V RL = 60 Ω, Figure 5, −7 V < VTST < +12 V
∆|VOD| for Complementary Output States 0.2 V R = 54 Ω or 100 Ω, Figure 4
Common-Mode Output Voltage, VOC 3 V R = 54 Ω or 100 Ω, Figure 4
∆|VOC| for Complementary Output States 0.2 V R = 54 Ω or 100 Ω, Figure 4
CMOS Input Logic Threshold Low, VINL 0.8 V
CMOS Input Logic Threshold High, VINH 2.0 V
Logic Input Current (DE, DI, RE) ±1.0 µA
Output Leakage (Y, Z) Current ±3 µA VO = –7 V or +12 V, VCC = 0 V or 3.6 V
Output Short-Circuit Current ±250 mA VO = –7 V or +12 V
RECEIVER
Differential Input Threshold Voltage, VTH −0.2 +0.2 V −7 V < VCM < +12 V
Input Voltage Hysteresis, ∆VTH 50 mV VCM = 0 V
Input Resistance 12 19 kΩ −7 V < VCM < +12 V
Input Current (A, B) 1 mA VIN = 12 V
−0.8 mA VIN = −7 V
Logic Enable Input Current (RE) ±1 µA
Output Voltage Low, VOL 0.4 V IOUT = 2.5 mA
Output Voltage High, VOH VCC – 0.4 V V IOUT = −1.5 mA
Short-Circuit Output Current ±60 mA VOUT = GND or VCC
Three-State Output Leakage Current ±1.0 µA VCC = 3.6 V, 0 V < VOUT < VCC
POWER SUPPLY CURRENT
ICC Outputs unloaded
0.84 1.5 mA DE = VCC, RE = 0 V
0.84 1.5 mA DE = 0 V, RE = 0 V
Supply Current in Shutdown 0.002 1 µA DE = 0 V, RE = VCC
ADM3491
Rev. A | Page 4 of 16
TIMING SPECIFICATIONS
VCC = 3.3 V, TA = 25°C.
Table 2.
Parameter Min Typ Max Unit Test Conditions/ Comments
DRIVER
Differential Output Delay, TDD 1 35 ns RL = 60 Ω, CL1 = CL2 = 15 pF, Figure 8
Differential Output Transition Time 1 8 15 ns RL = 60 Ω, CL1 = CL2 = 15 pF, Figure 8
Propagation Delay Input to Output, TPLH, TPHL 7 22 35 ns RL = 27 Ω, CL1 = CL2 = 15 pF, Figure 9
Driver Output to Output, TSKEW 8 ns RL = 54 Ω, CL1 = CL2 = 15 pF, Figure 9
ENABLE/DISABLE
Driver Enable to Output Valid 45 90 ns RL = 110 Ω, CL = 50 pF, Figure 6
Driver Disable Timing 40 80 ns RL = 110 Ω, CL = 50 pF, Figure 6
Driver Enable from Shutdown 650 110 ns RL = 110 Ω, CL = 15 pF, Figure 6
RECEIVER
Time to Shutdown 80 190 300 ns
Propagation Delay Input to Output, TPLH, TPHL 25 65 90 ns CL = 15 pF, Figure 11
Skew, TPLH – TPHL 10 ns CL = 15 pF, Figure 11
Receiver Enable, TEN 25 50 ns CL = 15 pF, Figure 7
Receiver Disable, TDEN 25 45 ns CL = 15 pF, Figure 7
Receiver Enable from Shutdown 500 ns CL = 15 pF, Figure 7
VCC = 3.3 V ± 0.3 V, TA = TMIN to TMAX.
Table 3.
Parameter Min Typ Max Unit Test Conditions/ Comments
DRIVER
Differential Output Delay, TDD 1 70 ns RL = 60 Ω, CL1 = CL2 = 15 pF, Figure 8
Differential Output Transition Time 2 8 15 ns RL = 60 Ω, CL1 = CL2 = 15 pF, Figure 8
Propagation Delay Input to Output, TPLH, TPHL 7 22 70 ns RL = 27 Ω, CL1 = CL2 = 15 pF, Figure 9
Driver Output to Output, TSKEW 10 ns RL = 54 Ω, CL1 = CL2 = 15 pF, Figure 9
ENABLE/DISABLE
Driver Enable to Output Valid 45 110 ns RL = 110 Ω, CL = 50 pF, Figure 6
Driver Disable Timing 40 110 ns RL = 110 Ω, CL = 50 pF, Figure 6
Driver Enable from Shutdown 650 110 ns RL = 110 Ω, CL = 15 pF, Figure 6
RECEIVER
Time to Shutdown 50 190 500 ns
Propagation Delay Input to Output, TPLH, TPHL 25 65 115 ns CL = 15 pF, Figure 11
Skew, TPLH – TPHL 20 ns CL = 15 pF, Figure 11
Receiver Enable, TEN 25 50 ns CL = 15 pF, Figure 7
Receiver Disable, TDEN 25 50 ns CL = 15 pF, Figure 7
Receiver Enable from Shutdown 600 ns CL = 15 pF, Figure 7
ADM3491
Rev. A | Page 5 of 16
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 4.
Parameter Min
VCC 7 V
Inputs
Driver Input (DI) −0.3 V to VCC + 0.3 V
Control Inputs (DE, RE) −0.3 V to VCC + 0.3 V
Receiver Inputs (A, B) −7.5 V to +12.5 V
Outputs
Driver Outputs −7.5 V to +12.5 V
Receiver Output −0.5 V to VCC + 0.5 V
14-Lead DIP, Power Dissipation 800 mW
θJA, Thermal Impedance 140°C/W
14-Lead SOIC, Power Dissipation 650 mW
θJA, Thermal Impedance 115°C/W
16-Lead TSSOP, Power Dissipation 500 mW
θJA, Thermal Impedance 158°C/W
Operating Temperature Range
Industrial (A Version) −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 10 s) 300°C
Vapor Phase (60 s) 215°C
Infrared (15 s) 220°C
ESD Rating >2 kV
EFT Rating (IEC1000-4-4) >1 kV
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
ADM3491
Rev. A | Page 6 of 16
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
NC 1
RO 2
RE 3
DE 4
VCC
14
VCC
13
A12
B11
DI 5Z10
GND 6Y
9
GND 7NC
8
NC = NO CONNECT
ADM3491
TOP VIEW
(Not to Scale)
05234-002
Figure 2. DIP/SOIC Pin Configuration
1
2
3
4
5
6
7
8
NC = NO CONNECT
16
15
14
13
12
11
10
9
NC
RO
RE
NC
DI
DE
V
CC
A
B
NC
NC
GND NC
Y
Z
NC
ADM3491
TOP VIEW
(Not to Scale)
05234-003
Figure 3. TSSOP Pin Configuration
Table 5. Pin Function Descriptions
Pin Number
DIP/ SOIC TSSOP Mnemonic Description
1, 8 2, 7, 9, 10, 13, 16 NC No Connect.
2 3 RO Receiver Output. High when A > B by 200 mV; low when A < B by 200 mV.
3 4 RE Receiver Output Enable. When RE is low, the receiver output RO is enabled. When RE is high, the
output is high impedance. If RE is high and DE is low, the ADM3491 enters a shutdown state.
4 5 DE Driver Output Enable. A high level enables the driver differential outputs, Y and Z. A low level
places the part in a high impedance state.
5 6 DI Driver Input. When the driver is enabled, a logic low on DI forces Y low and Z high; a logic high
on DI forces Y high and Z low.
6, 7 8 GND Ground Connection, 0 V.
9 11 Y Noninverting Driver Output Y.
10 12 Z Inverting Driver Output Z.
11 14 B Inverting Receiver Input B.
12 15 A Noninverting Receiver Input A.
13, 14 1 VCC Power Supply, 3.3 V ± 0.3 V.
ADM3491
Rev. A | Page 7 of 16
TEST CIRCUITS
V
CC
R/2
R/2 V
OC
V
OD
05234-004
Figure 4. Driver Voltage Measurement Test Circuit
0V OR 3V
DE IN
DE S1 R
L
C
L
V
OUT
V
CC
S2
05234-005
Figure 5. Driver Enable/Disable Test Circuit
DI DRL
DIFF
C
L1
C
L2
V
OUT
05234-006
Figure 6. Driver Differential Output Delay Test Circuit
DI RL
DIFF
C
L1
C
L2
RO
RE
A
BRD
05234-007
Figure 7. Driver/Receiver Propagation Delay Test Circuit
R
L
375Ω
375Ω
V
TST
V
OD3
05234-008
Figure 8. Driver Voltage Measurement Test Circuit 2
+1.5V
–
1.5V
RE IN
RE C
L
S2
V
OUT
V
CC
S1 R
L
05234-009
Figure 9. Receiver Enable/Disable Test Circuit
DE S1
IN
V
CC
C
L
V
OUT
R
L
V
OM
05234-010
Figure 10. Driver Propagation Delay Test Circuit
RE
0V 3V
V
ID
1.5V C
L
V
OUT
05234-011
Figure 11. Receiver Propagation Delay Test Circuit
ADM3491
Rev. A | Page 8 of 16
SWITCHING CHARACTERISTICS
3V
0V
Z
VO
Y
VO
0V
–
VO
1/2VO
90% POINT
10% POINT
t
R
t
SKEW
t
F
10% POINT
90% POINT
1.5V
t
PHL
1.5V
t
PLH
t
SKEW
05234-012
Figure 12. Driver Propagation Delay, Rise/Fall Timing
A–B
RO
0V
t
PLH
1.5V
0V
V
OH
t
PHL
V
OL
1.5V
05234-013
Figure 13. Receiver Propagation Delay
RE
R
R
0V
1.5V O/P HIGH
O/P
LOW
t
HZ
V
OH
– 0.25V
V
OL
+ 0.25V
V
OL
V
OH
t
ZH
t
ZL
t
LZ
1.5V 1.5V
1.5V
0V
3V
05234-014
Figure 14. Driver Enable/Disable Timing
RE
R
R
0V
1.5V O/P HIGH
O/P
LOW
tHZ
V
OL
V
OH
t
ZH
t
ZL
t
LZ
1.5V 1.5V
1.5V
0V
3V
V
OH
– 0.25V
V
OL
+ 0.25V
05234-015
Figure 15. Receiver Enable/Disable Timing
ADM3491
Rev. A | Page 9 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
OUTPUT VOLTAGE (V)
14
00 3.50.5 1 1.5 2 2.5 3
12
8
6
4
2
10
OUTPUT CURRENT (mA)
05234-016
Figure 16. Receiver Output Low Voltage vs. Output Current
TEMPERATURE (°C)
–40 100–20 0 20 40 60 80
0.8
0
0.7
0.4
0.3
0.2
0.1
0.6
0.5
I
RO
= 2.5mA
OUTPUT VOLTAGE (V)
05234-017
Figure 17. Receiver Output Low Voltage vs. Temperature
DIFFERENTIAL O/P VOLTAGE (V)
120
00 0.5 1 1.5 2 2.5 3
100
80
60
40
20
OUTPUT CURRENT (mA)
05234-018
Figure 18. Driver Differential Output Voltage vs. Output Current
OUTPUT HIGH VOLTAGE (V)
14
0040.5 1 1.5 2 2.5 3 3.5
12
8
6
4
2
10
OUTPUT CURRENT (mA)
05234-019
Figure 19. Receiver Output High Voltage vs. Output Current
TEMPERATURE (°C)
3.3
3
–40 100–20 0 20 40 60 80
3.25
3.2
3.15
3.1
3.05
OUTPUT VOLTAGE (V)
I
RO
= –1.5mA
05234-020
Figure 20. Receiver Output High Voltage vs. Temperature
TEMPERATURE (°C)
2.6
1.6
–40 100–20 0 20 40 60 80
2.5
2.0
1.9
1.8
1.7
2.3
2.1
2.4
2.2
OUTPUT VOLTAGE (V)
05234-021
Figure 21. Driver Differential Output Voltage vs. Temperature
ADM3491
Rev. A | Page 10 of 16
TEMPERATURE (°C)
1.2
1.1
0.7–40 100–20 0 20 40 60 80
1
0.9
0.8
SUPPLY CURRENT (mA)
05234-022
Figure 22. Supply Current vs. Temperature
3
2
1
T
T
T
4
T
100FT
CABLE
CH1 1.00V CH2 1.00V M40.0ns CH3 640mV
CH3 2.00V CH4 2.00V
[ T ]
05234-023
Figure 23. Driving 100 ft. Cable L-H Transition
3
2
1
T
T
T
4
T
100FT CAT 5
CABLE
CH1 1.00V CH2 1.00V M40.0ns CH3 640mV
CH3 2.00V CH4 2.00V
[ T ]
05234-024
Figure 24. Driving 100 ft. Cable H-L Transition
TEMPERATURE (°C)
100
0
–40 80–20 0 20 40 60
90
60
30
20
10
80
70
50
40
SHUTDOWN CURRENT (mA)
05234-025
Figure 25. Shutdown Current vs. Temperature
ADM3491
Rev. A | Page 11 of 16
APPLICATIONS INFORMATION
DIFFERENTIAL DATA TRANSMISSION
Differential data transmission is used to reliably transmit data at
high rates over long distances and through noisy environments.
Differential transmission nullifies the effects of ground shifts
and noise signals, which appear as common-mode voltages on
the line.
The two main standards approved by the Electronics Industries
Association (EIA) specify the electrical characteristics of
transceivers used in differential data transmission:
• RS-422 standard specifies data rates up to 10 MBaud and
line lengths up to 4000 ft. A single driver can drive a
transmission line with up to 10 receivers.
• RS-485 standard was defined to cater to true multipoint
communications. This standard meets or exceeds all the
requirements of RS-422, but also allows multiple drivers and
receivers to be connected to a single bus. An extended
common-mode range of −7 V to +12 V is defined.
The most significant differentiator of the RS-485 standard is
that the drivers can be disabled, thereby allowing more than one
to be connected to a single line. Only one driver should be
enabled at a time, but the RS-485 standard contains additional
specifications to guarantee device safety in the event of line
contention.
Table 6. Comparison of RS-422 and RS-485 Interface
Standards
Specification RS-422 RS-485
Transmission Type Differential Differential
Maximum Cable Length 4000 ft. 4000 ft.
Minimum Driver Output Voltage ±2 V ±1.5 V
Driver Load Impedance 100 Ω 54 Ω
Receiver Input Resistance 4 kΩ min 12 kΩ min
Receiver Input Sensitivity ±200 mV ±200 mV
Receiver Input Voltage Range −7 V to +7 V −7 V to +12 V
CABLE AND DATA RATE
The transmission line of choice for RS-485 communications is a
twisted pair. Twisted pair cable tends to cancel common-mode
noise and also causes cancellation of the magnetic fields gener-
ated by the current flowing through each wire, thereby reducing
the effective inductance of the pair.
The ADM3491 is designed for bidirectional data communica-
tions on multipoint transmission lines. A typical application
showing a multipoint transmission network is illustrated in
Figure 26. Only one driver can transmit at a particular time, but
multiple receivers can be enabled simultaneously.
As with any transmission line, it is important that reflections be
minimized. This can be achieved by terminating the extreme
ends of the line using resistors equal to the characteristic
impedance of the line. Stub lengths of the main line should also
be kept as short as possible. A properly terminated transmission
line appears purely resistive to the driver.
RECEIVER OPEN-CIRCUIT FAIL-SAFE FEATURE
The receiver input includes a fail-safe feature that guarantees a
logic high on the receiver when the inputs are open circuit or
floating.
RE V
CC
RO R
A
B
Z
Y
GND
DE
DI
ADM3491
RS-485/RS-422 LINK
ADM3491
GND
RE
RO
DI
DE
V
CC
Y
Z
A
3.3V
0.1µF0.1µF
3.3V
B
D
D
R
05234-026
Figure 26. ADM3491 Full-Duplex Data Link
Table 7. Transmitting Truth Table
Transmitting
Inputs Outputs
RE DE DI Z Y
X 1 1 0 1
X 1 0 1 0
0 0 X Hi-Z Hi-Z
1 0 X Hi-Z Hi-Z
Table 8. Receiving Truth Table
Receiving
Inputs Outputs
RE DE A–B RO
0 X > +0.2 V 0
0 X < −0.2 V 0
0 X Inputs O/C 1
1 X X Hi-Z
ADM3491
Rev. A | Page 12 of 16
OUTLINE DIMENSIONS
14
17
8
0.685 (17.40)
0.665 (16.89)
0.645 (16.38) 0.295 (7.49)
0.285 (7.24)
0.275 (6.99)
0.100 (2.54)
BSC
SEATING
PLANE
0.180 (4.57)
MAX
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.150 (3.81)
0.130 (3.30)
0.110 (2.79) 0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.015 (0.38)
MIN 0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MO-095-AB
Figure 27. 14-Lead Plastic DIP
(N-14)
Dimensions shown in inches and (millimeters)
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COPLANARIT
Y
0.10
14 8
7
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
8.75 (0.3445)
8.55 (0.3366)
1.27 (0.0500)
BSC
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0039)
0.51 (0.0201)
0.31 (0.0122)
1.75 (0.0689)
1.35 (0.0531)
8°
0°
0.50 (0.0197)
0.25 (0.0098)
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012AB
× 45°
Figure 28. 14-Lead Narrow Body Small Outline (SOIC)
(R-14)
Dimensions shown in inches and (millimeters)
ADM3491
Rev. A | Page 13 of 16
16 9
81
PIN 1
SEATING
PLANE
8°
0°
4.50
4.40
4.30
6.40
BSC
5.10
5.00
4.90
0.65
BSC
0.15
0.05
1.20
MAX 0.20
0.09 0.75
0.60
0.45
0.30
0.19
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153AB
Figure 29. 16-Lead Thin Shrink Small Outline (TSSOP)
(RU-16)
Dimensions shown in inches and (millimeters)
ORDERING GUIDE
Model Temperature Range Package Description Package Options
ADM3491AN −40°C to +85°C 14-Lead Plastic DIP N-14
ADM3491AR −40°C to +85°C 14-Lead Narrow Body Small Outline (SOIC) R-14
ADM3491AR-REEL −40°C to +85°C 14-Lead Narrow Body Small Outline (SOIC) R-14
ADM3491AR-REEL7 −40°C to +85°C 14-Lead Narrow Body Small Outline (SOIC) R-14
ADM3491ARZ1−40°C to +85°C 14-Lead Narrow Body Small Outline (SOIC) R-14
ADM3491ARZ-REEL1 −40°C to +85°C 14-Lead Narrow Body Small Outline (SOIC) R-14
ADM3491ARZ-REEL71 −40°C to +85°C 14-Lead Narrow Body Small Outline (SOIC) R-14
ADM3491ARU −40°C to +85°C 16-Lead Thin Shrink Small Outline (TSSOP) RU-16
ADM3491ARU-REEL −40°C to +85°C 16-Lead Thin Shrink Small Outline (TSSOP) RU-16
ADM3491ARU-REEL7 −40°C to +85°C 16-Lead Thin Shrink Small Outline (TSSOP) RU-16
ADM3491ARUZ1 −40°C to +85°C 16-Lead Thin Shrink Small Outline (TSSOP) RU-16
ADM3491ARUZ-REEL1 −40°C to +85°C 16-Lead Thin Shrink Small Outline (TSSOP) RU-16
ADM3491ARUZ-REEL71 −40°C to +85°C 16-Lead Thin Shrink Small Outline (TSSOP) RU-16
1 Z = Pb-free part.
ADM3491
Rev. A | Page 14 of 16
NOTES
ADM3491
Rev. A | Page 15 of 16
NOTES
ADM3491
Rev. A | Page 16 of 16
NOTES
© 2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C05234–0–11/04(A)
