XC6108C12AMR-G - Torex Semiconductor

1/22

XC6108 Series

Voltage Detector with Separated Sense Pin & Delay Capacitor Pin

■GENERAL DESCRIPTION

The XC6108 series is highly precise, low power consumption voltage detector, manufactured using CMOS and laser trimming

technologies.

Since the sense pin is separated from power supply, it allows the IC to monitor added power supply.

Using the IC with the sense pin separated from power supply enables output to maintain the state of detection even when

voltage of the monitored power supply drops to 0V.

Moreover, with the built-in delay circuit, connecting the delay capacitance pin to the capacitor enables the IC to provide an

arbitrary release delay time.

Both CMOS and N-channel open drain output configurations are available.

■

A

PPLICATIONS

●Microprocessor reset circuitry

●Charge voltage monitors

●Memory battery back-up switch circuits

●Power failure detection circuits

■FEATURES

Highly A ccurate : +2% (Detect Voltage≧1.5V)

+30mV (Detect Voltage＜1.5V)

Low Power Consumption

: 0.6 μA TYP. (detect, VIN= 1.0V )

0.8 μA TYP. (release, VIN= 1.0V )

Detect Voltage Range : 0.8V ~ 5.0V in 0.1V increments

Operating Voltage Range : 1.0V ~ 6.0V

Temperature Stability : ±100ppm/ ℃ TYP.

Output Configuration : CMOS or N-channel open drain

Operating Temperature : -40 ℃ ~ +85 ℃

Separated Sense Pin : VSEN Pin Available

Built-In Delay Circuit : Delay Time Adjustable

Packages : USP-4, SOT-25

Environmentally Friendly : EU RoHS Compliant, Pb Free

■TYPICAL APPLICATION CIRCUIT ■TYPICAL PERFORMANCE

CHARACTERISTICS

●Output Voltage vs. Sense Voltage

XC6108C25AGR

-1.0

0.0

1.0

2.0

3.0

4.0

5.0

6.0

7.0

0123456

Sense Voltage: VSEN (V)

Output Voltage: VOUT (V)

Ta=25℃

4.0V

1.0V

VIN=6.0V

ETR0205_010a

Output Voltage: VOUT (V)

Sense Voltage: VSEN (V)

(No Pull-Up resistor needed fo

r

CMOS output product)

Monitering

Power

supply

2/22

XC6108 Series

*When delay function isn’t used, open the delay capacitance pin before use.

PIN NUMBER

USP- 4 SOT-25 PIN NAME FUNCTION

1 1 VOUT Output (Detect ”L”)

2 5 Cd Delay Capacitance

(*1)

2 - NC No Connection

3 4 VSEN Sense

4 3 VIN Input

5 2 VSS Ground

(*2)

DESIGNATOR DESCRIPTION SYMBOL DESCRIPTION

C CMOS output

① Output Configuration

N N-ch open drain output

②③ Detect Voltage 08 ~ 50 e.g. 18→1.8V

A Built-in delay capacitance pin, hysteresis 5% (TYP.)(Standard*)

B Built-in delay capacitance pin, hysteresis less than 1%(Standard*)

C No built-in delay capacitance pin, hysteresis 5% (TYP.)

(Semi-custom)

④ Output Delay & Hysteresis

(Options)

D No built-in delay capacitance pin, hysteresis less than 1%

(Semi-custom)

GR USP-4

GR-G USP-4

MR SOT-25

⑤⑥-⑦ Packages

Taping Type (*2)

MR-G SOT-25

■PIN CONFIGURATION

■PIN ASSIGNMENT

■PRODUCT CLASSIFICATION

XC6108 ①②③④⑤⑥-⑦(*1)

NOTE:

*1: With the VSS pin of the USP-4 package, a tab on the backside is used as the pin No.5.

*2: In the case of selecting no built-in delay capacitance pin type, the delay capacitance (Cd) pin will be

used as the N.C.

123

4

5

Cd

VOUT VIN

VSEN

VSS

USP-4

(BOTTOM VIEW)

SOT-25

(TOP VIEW)

* In the XC6108xxxA/B series, the dissipation pad should

not be short-circuited with other pins.

* In the XC6108xxxC/D series, when the dissipation pad

is short-circuited with other pins, connect it to the NC

pin (No.2) pin before use.

●Ordering Information

(*1) The “-G” suffix indicates that the products are Halogen and Antimony free as well as being fully RoHS compliant.

(*2) The device orientation is fixed in its embossed tape pocket. For reverse orientation, please contact your local Torex sales office o

r

representative. (Standard orientation: ⑤R-⑦, Reverse orientation: ⑤L-⑦)

3/22

XC6108

Series

■BLOCK DIAGRAMS

(1) XC6108CxxA

(2) XC6108CxxB

(3) XC6108NxxA

(4) XC6108NxxB

*The delay capacitance pin (Cd) is not

connected to the circuit in the block diagram

of XC6108CxxC (semi-custom).

*The delay capacitance pin (Cd) is not

connected to the circuit in the block diagram of

XC6108CxxD (semi-custom).

*The delay capacitance pin (Cd) is not

connected to the circuit in the block diagram of

XC6108NxxC (semi-custom).

*The delay capacitance pin (Cd) is not

connected to the circuit in the block diagram of

XC6108NxxD (semi-custom).

4/22

XC6108 Series

PARAMETER SYMBOL RATINGS UNITS

Input Voltage VIN VSS－0.3 ~ 7.0 V

Output Current IOUT 10 mA

XC6108C (*1) VSS－0.3 ~ VIN＋0.3

Output Voltage XC6108N (*2) VOUT VSS－0.3 ~ 7.0 V

Sense Pin Voltage VSEN VSS－0.3 ~ 7.0 V

Delay Capacitance Pin Voltage VCD VSS－0.3 ~ VIN＋0.3 V

Delay Capacitance Pin Current ICD 5.0 mA

USP-4 120

Power Dissipation SOT-25 Pd 250 mW

Operating Temperature Range Ta －40 ~＋85 ℃

Storage Temperature Range Tstg －55 ~＋125 ℃

PARAMETER SYMBOL RATINGS UNITS

Input Voltage VIN VSS－0.3 ~ 7.0 V

Output Current IOUT 10 mA

XC6108C (*1) VSS－0.3 ~ VIN＋0.3

Output Voltage XC6108N (*2) VOUT VSS－0.3 ~ 7.0 V

Sense Pin Voltage VSEN VSS－0.3 ~ 7.0 V

USP-4 120

Power Dissipation SOT-25 Pd 250 mW

Operating Temperature Range Ta －40 ~＋85 ℃

Storage Temperature Range Tstg －55 ~＋125 ℃

■

A

BSOLUTE MAXIMUM RATINGS

●XC6108xxxA/B Ta = 2 5OC

●XC6108xxxC/D

NOTE:

*1: CMOS output

*2: N-ch open drain output

Ta = 2 5OC

5/22

XC6108

Series

PARAMETER SYMBOL CONDITIONS MIN. TYP. MAX.

UNITS

CIRCUITS

Operating Voltage VIN VDF(T) = 0.8 ~ 5.0V (*1) 1.0 - 6.0 V -

Detect Voltage VDF VIN = 1.0 ~ 6.0V E-1 V ①

Hysteresis Width VHYS VIN = 1.0 ~ 6.0V E-2 V ①

Detect Voltage

Line Regulation

Δ

V

DF

/

(

Δ

V

IN

・

V

DF

)

VIN = 1.0 ~ 6.0V - ±0.1 - %/V ①

VIN = 1.0V - 0.6 1.5

Supply Current 1 (*2) ISS1 VSEN =

V

DF x 0.9 VIN = 6.0V - 0.7 1.6 μA ②

VIN = 1.0V - 0.8 1.7

Supply Current 2 (*2) ISS2 VSEN =

VDF x 1.1 VIN = 6.0V - 0.9 1.8 μA ②

VIN = 1.0V 0.1 0.7

VIN = 2.0V 0.8 1.6

VIN = 3.0V 1.2 2.0

VIN = 4.0V 1.6 2.3

VIN = 5.0V 1.8 2.4

IOUT1

VSEN =0V

VDS = 0.5V

(N-ch)

VIN = 6.0V 1.9 2.5

- mA ③

VIN = 1.0V - -0.30 -0.08

Output Current (*3)

IOUT2

VSEN = 6.0V

VDS = 0.5V

(P-ch) VIN = 6.0V - -2.00 -0.70

mA ④

CMOS

Output 0.20 -

Leakage

Current Nch Open

Drain Output

ILEAK VIN=6.0V, VSEN=6.0V,

VOUT=6.0V, Cd: Open -

0.20 0.40

μA ③

Temperature Characteristics

Δ

VDF /

(

Δ

Topr

･

V

DF

)

-40 ℃ ≦ Ta ≦ 85℃ - ±100 - ppm/

℃ ①

Sense Resistance (*4) RSEN VSEN = 5.0V, VIN = 0V E-4 MΩ ⑤

Delay Resistance (*5) Rdelay VSEN = 6.0V, VIN = 5.0V,

Cd = 0V 1.6 2.0 2.4 MΩ ⑥

Delay capacitance pin

Sink Current

ICD VDS = 0.5V, VIN = 1.0V - 200 - μA ⑥

VSEN = 6.0V, VIN = 1.0V 0.4 0.5 0.6

Delay Capacitance Pin

Threshold Voltage

VTCD VSEN = 6.0V, VIN = 6.0V 2.9 3.0 3.1 V ⑦

Unspecified Operating

Voltage (*6) VUNS VIN = VSEN = 0V ~ 1.0V - 0.3 0.4 V ⑧

Detect Delay Time (*7) tDF0 VIN = 6.0V, VSEN = 6.0V→ 0.0V

Cd: Open 30 230

μs ⑨

Release Delay Time (*8) tDR0 VIN = 6.0V, VSEN = 0.0V→ 6.0V

Cd: Open 30 200

μs ⑨

NOTE:

*1: VDF(T): Nominal detect voltage

*2: Current flows the sense resistor is not included.

*3: The Pch values are applied only to the XC6108C series (CMOS output).

*4: Calculated from the voltage value and the current value of the VSEN.

*5: Calculated from the voltage value of the VIN and the current value of the Cd.

*6: The maximum voltage of the VOUT in the range of the VIN 0V to 1.0V when the VIN and the VSEN are short-circuited

This value is applied only to the XC6108C series (CMOS output).

*7: Time which ranges from the state of VSEN=VDF to the VOUT reaching 0.6V when the VSEN falls without connecting to the Cd pin.

*8: Time which ranges from the state of VIN= VDF +VHYS to the VOUT reaching 5.4V when the VSEN rises without connecting to the Cd pin.

■ELECTRICAL CHARACTERISTICS

●XC6108xxxA Ta= 25℃

6/22

XC6108 Series

PARAMETER SYMBOL CONDITIONS MIN. TYP. MAX.

UNITS

CIRCUITS

Operating Voltage VIN VDF(T) = 0.8 ~ 5.0V (*1) 1.0 - 6.0 V -

Detect Voltage VDF VIN = 1.0 ~ 6.0V E-1 V ①

Hysteresis Width VHYS VIN = 1.0 ~ 6.0V E-3 V ①

Detect Voltage

Line Regulation

Δ

V

DF

/

(

Δ

V

IN

･

V

DF

)

VIN = 1.0 ~ 6.0V - ±0.1 - %/V ①

VIN = 1.0V - 0.6 1.5

Supply Current 1 (*2) ISS1 VSEN =

V

DF x 0.9 VIN = 6.0V - 0.7 1.6 μA ②

VIN = 1.0V - 0.8 1.7

Supply Current 2 (*2) ISS2 VSEN =

VDF x 1.1 VIN = 6.0V - 0.9 1.8 μA ②

VIN = 1.0V 0.1 0.7 -

VIN = 2.0V 0.8 1.6

VIN = 3.0V 1.2 2.0

VIN = 4.0V 1.6 2.3

VIN = 5.0V 1.8 2.4

IOUT1

VSEN =0V

VDS = 0.5V

(N-ch)

VIN = 6.0V 1.9 2.5

- mA ③

VIN = 1.0V - -0.30 -0.08

Output Current (*3)

IOUT2

VSEN = 6.0V

VDS = 0.5V

(P-ch) VIN = 6.0V - -2.00 -0.70

mA ④

CMOS

Output 0.20 -

Leakage

Current Nch Open

Drain Output

ILEAK VIN=6.0V, VSEN=6.0V,

VOUT=6.0V, Cd: Open -

0.20 0.40

μA ③

Temperature Characteristics

Δ

VDF /

(

Δ

Topr

･

V

DF

)

-40 ℃ ≦ Ta ≦ 85℃ - ±100 - ppm/

℃ ①

Sense Resistance (*4) RSEN VSEN = 5.0V, VIN = 0V E-4 MΩ ⑤

Delay Resistance (*5) Rdelay VSEN = 6.0V, VIN = 5.0V,

Cd = 0V 1.6 2.0 2.4 MΩ ⑥

Delay capacitance pin

Sink Current

ICD VDS = 0.5V, VIN = 1.0V - 200 - μA ⑥

VSEN = 6.0V, VIN = 1.0V 0.4 0.5 0.6

Delay Capacitance Pin

Threshold Voltage

VTCD VSEN = 6.0V, VIN = 6.0V 2.9 3.0 3.1 V ⑦

Unspecified Operating

Voltage (*6) VUNS VIN = VSEN = 0V ~ 1.0V - 0.3 0.4 V ⑧

Detect Delay Time (*7) tDF0 VIN = 6.0V, VSEN = 6.0V→ 0.0V

Cd: Open 30 230

μs ⑨

Release Delay Time (*8) tDR0 VIN = 6.0V, VSEN = 0.0V→ 6.0V

Cd: Open 30 200

μs ⑨

■ELECTRICAL CHARACTERISTICS (Continued)

●XC6108xxxB Ta= 25℃

NOTE:

*1: VDF(T): Nominal detect voltage

*2: Current flows the sense resistor is not included.

*3: The Pch values are applied only to the XC6108C series (CMOS output).

*4: Calculated from the voltage value and the current value of the VSEN.

*5: Calculated from the voltage value of the VIN and the current value of the Cd.

*6: The maximum voltage of the VOUT in the range of the VIN 0V to 1.0V when the VIN and the VSEN are short-circuited

This value is applied only to the XC6108C series (CMOS output).

*7: Time which ranges from the state of VSEN=VDF to the VOUT reaching 0.6V when the VSEN falls without connecting to the Cd pin.

*8: Time which ranges from the state of VIN= VDF +VHYS to the VOUT reaching 5.4V when the VSEN rises without connecting to the Cd pin.

7/22

XC6108

Series

PARAMETER SYMBOL CONDITIONS MIN. TYP. MAX.

UNITS

CIRCUITS

Operating Voltage VIN VDF(T) = 0.8 ~ 5.0V (*1) 1.0 - 6.0 V -

Detect Voltage VDF VIN = 1.0 ~ 6.0V E-1 V ①

Hysteresis Width VHYS VIN = 1.0 ~ 6.0V E-2 V ①

Detect Voltage

Line Regulation

Δ

V

DF

/

(

Δ

V

IN

･

V

DF

)

VIN = 1.0 ~ 6.0V - ±0.1 - %/V ①

VIN = 1.0V - 0.6 1.5

Supply Current 1 (*2) ISS1 VSEN =

V

DF x 0.9 VIN = 6.0V - 0.7 1.6 μA ②

VIN = 1.0V - 0.8 1.7

Supply Current 2 (*2) ISS2 VSEN =

VDF x 1.1 VIN = 6.0V - 0.9 1.8 μA ②

VIN = 1.0V 0.1 0.7

VIN = 2.0V 0.8 1.6

VIN = 3.0V 1.2 2.0

VIN = 4.0V 1.6 2.3

VIN = 5.0V 1.8 2.4

IOUT1

VSEN =0V

VDS = 0.5V

(N-ch)

VIN = 6.0V 1.9 2.5

- mA ③

VIN = 1.0V - -0.30 -0.08

Output Current (*3)

IOUT2

VSEN = 6.0V

VDS = 0.5V

(P-ch) VIN = 6.0V - -2.00 -0.70

mA ④

CMOS

Output 0.20 -

Leakage

Current Nch Open

Drain Output

ILEAK VIN=6.0V, VSEN=6.0V,

VOUT=6.0V, Cd: Open -

0.20 0.40

μA ③

Temperature Characteristics

Δ

VDF/

(

Δ

Topr

･

V

DF

)

-40 ℃ ≦ Ta ≦ 85℃ - ±100 - ppm/

℃ ①

Sense Resistance (*4) RSEN VSEN = 5.0V, VIN = 0V E-4 MΩ ⑤

Unspecified Operating

Voltage (*5) VUNS VIN = VSEN = 0V ~ 1.0V - 0.3 0.4 V ⑦

Detect Delay Time (*6) tDF0 VIN = 6.0V, VSEN = 6.0V→ 0.0V 30 230

μs ⑨

Release Delay Time (*7) tDR0 VIN = 6.0V, VSEN = 0.0V→ 6.0V 30 200

μs ⑨

■ELECTRICAL CHARACTERISTICS (Continued)

●XC6108xxxC Ta= 25℃

NOTE:

*1: VDF(T): Nominal detect voltage

*2: Current flows the sense resistor is not included.

*3: The Pch values are applied only to the XC6108C series (CMOS output).

*4: Calculated from the voltage value and the current value of the VSEN.

*5: The maximum voltage of the VOUT in the range of the VIN 0V to 1.0V when the VIN and the VSEN are short-circuited

This value is applied only to the XC6108C series (CMOS output).

*6: Time which ranges from the state of VSEN=VDF to the VOUT reaching 0.6V when the VSEN falls.

*7: Time which ranges from the state of VIN= VDF +VHYS to the VOUT reaching 5.4V when the VSEN rises.

8/22

XC6108 Series

PARAMETER SYMBOL CONDITIONS MIN. TYP. MAX.

UNITS

CIRCUITS

Operating Voltage VIN VDF(T) = 0.8 ~ 5.0V (*1) 1.0 - 6.0 V -

Detect Voltage VDF VIN = 1.0 ~ 6.0V E-1 V 1

Hysteresis Width VHYS1 VIN = 1.0 ~ 6.0V E-3 V 1

Detect Voltage

Line Regulation

Δ

V

DF

/

(

Δ

V

IN

･

V

DF

)

VIN = 1.0 ~ 6.0V - ±0.1 - %/V 1

VIN = 1.0V - 0.6 1.5

Supply Current 1 (*2) ISS1 VSEN =

V

DF x 0.9 VIN = 6.0V - 0.7 1.6 μA 2

VIN = 1.0V - 0.8 1.7

Supply Current 2 (*2) ISS2 VSEN =

VDF x 1.1 VIN = 6.0V - 0.9 1.8 μA 2

VIN = 1.0V 0.1 0.7

VIN = 2.0V 0.8 1.6

VIN = 3.0V 1.2 2.0

VIN = 4.0V 1.6 2.3

VIN = 5.0V 1.8 2.4

IOUT1

VSEN =0V

VDS = 0.5V

(N-ch)

VIN = 6.0V 1.9 2.5

- mA 3

VIN = 1.0V - -0.30 -0.08

Output Current (*3)

IOUT2

VSEN = 6.0V

VDS = 0.5V

(P-ch)

VIN = 6.0V - -2.00 -0.70

mA 4

CMOS

Output 0.20 -

Leakage

Current Nch Open

Drain Output

ILEAK VIN=6.0V, VSEN=6.0V,

VOUT=6.0V, Cd: Open -

0.20 0.40

μA 3

Temperature Characteristics

Δ

V

DF /

(

Δ

Topr

･

V

DF

)

-40 ℃ ≦ Ta ≦ 85℃ - ±100 - ppm/

℃ 1

Sense Resistance (*4) RSEN VSEN = 5.0V, VIN = 0V E-4 MΩ 5

Unspecified Operating

Voltage (*5) VUNS VIN = VSEN = 0V ~ 1.0V - 0.3 0.4 V 7

Detect Delay Time (*6) tDF0 VIN = 6.0V, VSEN = 6.0V→ 0.0V 30 230

μs 9

Release Delay Time (*7) tDR0 VIN = 6.0V, VSEN = 0.0V→ 6.0V 30 200

μs 9

■ELECTRICAL CHARACTERISTICS (Continued)

●XC6108xxxD Ta= 25℃

NOTE:

*1: VDF(T): Nominal detect voltage

*2: Current flows the sense resistor is not included.

*3: The Pch values are applied only to the XC6108C series (CMOS output).

*4: Calculated from the voltage value and the current value of the VSEN.

*5: The maximum voltage of the VOUT in the range of the VIN 0V to 1.0V when the VIN and the VSEN are short-circuited

This value is applied only to the XC6108C series (CMOS output).

*6: Time which ranges from the state of VSEN=VDF to the VOUT reaching 0.6V when the VSEN falls.

*7: Time which ranges from the state of VIN= VDF +VHYS to the VOUT reaching 5.4V when the VSEN rises.

9/22

XC6108

Series

SYMBOL E-1 E-2 E-3 E-4

NOMINAL DETECT

VOLTAGE

DETECT VOLTAGE

(*1)

(V)

HYSTERESIS

RANGE

(V)

HYSTERESIS

RANGE

(V)

SENSE

RESISTANCE

(MΩ)

VDF VHYS VHYS RSEN

VDF(T)

(V) MIN. MAX. MIN. MAX. MIN. MAX. MIN. TYP.

0.8 0.770 0.830 0.015 0.066 0.008

0.9 0.870 0.930 0.017 0.074 0.009

1.0 0.970 1.030 0.019 0.082 0.010

1.1 1.070 1.130 0.021 0.090 0.011

1.2 1.170 1.230 0.023 0.098 0.012

1.3 1.270 1.330 0.025 0.106 0.013

1.4 1.370 1.430 0.027 0.114 0.014

1.5 1.470 1.530 0.029 0.122 0.015

1.6 1.568 1.632 0.031 0.131 0.016

1.7 1.666 1.734 0.033 0.085 0.017

1.8 1.764 1.836 0.035 0.147 0.018

1.9 1.862 1.938 0.037 0.155 0.019

10 20

2.0 1.960 2.040 0.039 0.163 0.020

2.1 2.058 2.142 0.041 0.171 0.021

2.2 2.156 2.244 0.043 0.180 0.022

2.3 2.254 2.346 0.045 0.188 0.023

2.4 2.352 2.448 0.047 0.196 0.024

2.5 2.450 2.550 0.049 0.204 0.026

2.6 2.548 2.652 0.051 0.212 0.027

2.7 2.646 2.754 0.053 0.220 0.028

2.8 2.744 2.856 0.055 0.228 0.029

2.9 2.842 2.958 0.057 0.237 0.030

3.0 2.940 3.060 0.059 0.245 0.031

3.1 3.038 3.162 0.061 0.253 0.032

3.2 3.136 3.264 0.063 0.261 0.033

3.3 3.234 3.366 0.065 0.269 0.034

3.4 3.332 3.468 0.067 0.277 0.035

3.5 3.430 3.570 0.069 0.286 0.036

3.6 3.528 3.672 0.071 0.294 0.037

3.7 3.626 3.774 0.073 0.302 0.038

3.8 3.724 3.876 0.074 0.310 0.039

3.9 3.822 3.978 0.076 0.318 0.040

13 24

4.0 3.920 4.080 0.078 0.326 0.041

4.1 4.018 4.182 0.080 0.335 0.042

4.2 4.116 4.284 0.082 0.343 0.043

4.3 4.214 4.386 0.084 0.351 0.044

4.4 4.312 4.488 0.086 0.359 0.045

4.5 4.410 4.590 0.088 0.367 0.046

4.6 4.508 4.692 0.090 0.375 0.047

4.7 4.606 4.794 0.092 0.384 0.048

4.8 4.704 4.896 0.094 0.392 0.049

4.9 4.802 4.998 0.096 0.400 0.050

5.0 4.900 5.100 0.098 0.408

0

0.051

15 28

■VOLTAGE CHART

NOTE:

*1: When VDF(T)≦1.4V, the detection accuracy is ±30mV.

When VDF(T)≧1.5V, the detection accuracy is ±2%.

10/22

XC6108 Series

■TEST CIRCUITS

Circuit 1

Circuit 3

Circuit 4

R=100kΩ

(No resistor needed for CMOS output products)

Circuit 5

Circuit 2

XC6108 Series

11/22

XC6108

Series

Circuit 9

■TEST CIRCUITS (Continued)

Circuit 6

Circuit 7

Circuit 8

Waveform Measurement Point

*No delay capacitance pin available in the XC6108xxxC/D series.

(No resistor needed for CMOS output products)

XC6108 Series

12/22

XC6108 Series

■OPERATIONAL EXPLANATION

A typical circuit example is shown in Figure 1, and the timing chart of Figure 1 is shown in Figure 2 on page 14.

① As an early state, the sense pin is applied sufficiently high voltage (6.0V MAX.) and the delay capacitance (Cd) is charged

to the power supply input voltage, (VIN: 1.0V MIN., 6.0V MAX.). While the sense pin voltage (VSEN) starts dropping to

reach the detect voltage (VDF) (VSEN>VDF), the output voltage (VOUT) keeps the “High” level (=VIN).

* If a pull-up resistor of the XC6108N series (N-ch open drain) is connected to added power supply different from the input

voltage pin, the “High” level will be a voltage value where the pull-up resistor is connected.

② When the sense pin voltage keeps dropping and becomes equal to the detect voltage (VSEN =VDF), an N-ch transistor

(M1) for the delay capacitance (Cd) discharge is turned ON, and starts to discharge the delay capacitance (Cd). An

inverter (Inv.1) operates as a comparator of the reference voltage VIN, and the output voltage changes into the “Low” level

(=VSS). The detect delay time [tDF] is defined as time which ranges from VSEN=VDF to the VOUT of “Low” level

(especially, when the Cd pin is not connected: tDF0).

③ While the sense pin voltage keeps below the detect voltage, the delay capacitance (Cd) is discharged to the ground

voltage (=VSS) level. Then, the output voltage maintains the “Low” level while the sense pin voltage increases again to

reach the release voltage (VSEN< VDF +VHYS).

④ When the sense pin voltage continues to increase up to the release voltage level (VDF+VHYS), the N-ch transistor (M1) for

the delay capacitance (Cd) discharge will be turned OFF, and the delay capacitance (Cd) will start discharging via a delay

resistor (Rdelay). The inverter (Inv.1) will operate as a comparator (Rise Logic Threshold: VTLH=VTCD, Fall Logic

Threshold: VTHL=VSS) while the sense pin voltage keeps higher than the detect voltage (VSEN > VDF).

⑤ While the delay capacitance pin voltage (VCD) rises to reach the delay capacitance pin threshold voltage (VTCD) with the

sense pin voltage equal to the release voltage or higher, the sense pin will be charged by the time constant of the RC

series circuit. Assuming the time to the release delay time (tDR), it can be given by the formula (1).

tDR =

－

Rdelay

×

Cd

×

In (1

－

VTCD / VIN) …(1)

* In = a natural logarithm

The release delay time can also be briefly calculated with the formula (2) because the delay resistance is 2.0MΩ(TYP.) and

the delay capacitance pin voltage is VIN /2 (TYP.)

tDR = Rdelay

×

Cd

×

0.69…(2)

＊：Rdelay is 2.0MΩ（TYP.）

As an example, presuming that the delay capacitance is 0.68μF, tDR is :

2.0

×

106

×

0.68

×

10-6

×

0.69=938(ms)

* Note that the release delay time may remarkably be short when the delay capacitance (Cd) is not discharged to the

ground (=VSS) level because time described in ③ is short.

⑥ When the delay capacitance pin voltage reaches to the delay capacitance pin threshold voltage (VCD=VTCD), the inverter

(Inv.1) will be inverted. As a result, the output voltage changes into the “High” (=VIN) level. tDR0 is defined as time

which ranges from VSEN=VDF+VHYS to the VOUT of “High” level without connecting to the Cd.

⑦ While the sense voltage is higher than the detect voltage (VSEN > VDF), the delay capacitance pin is charged until the

delay capacitance pin voltage becomes the input voltage level. Therefore, the output voltage maintains the “High”(=VIN)

level.

13/22

XC6108

Series

TRANSITION OF VOUT CONDITION *1

VSEN Cd ① ②

L

H L

L

H H

⇒ L

L ⇒ L

H L ⇒

L

H

H H ⇒ H

DELAY CAPACITANCE [Cd]

(μF)

RELEASE DELAY TIME [tDR]

(TYP.)

(ms)

RELEASE DELAY TIME [tDR] *2

(MIN. ~ MAX.)

(ms)

0.010 13.8 11.0 ~ 16.6

0.022 30.4 24.3 ~ 36.4

0.047 64.9 51.9 ~ 77.8

0.100 138 110 ~ 166

0.220 304 243~ 364

0.470 649 519 ~ 778

1.000 1380 1100 ~ 1660

●Release Delay Time Chart

*1: VOUT transits from condition ① to ② because of the combination of VSEN and Cd.

●Example

ex. 1) VOUT ranges from ‘L’ to ‘H’ in case of VSEN = ‘H’ (VDR≧VSEN), Cd=’H’ (VTCD≧Cd) while VOUT is ‘L’.

ex. 2) VOUT maintains ‘H’ when Cd ranges from ‘H’ to ‘L’, VSEN=’H’ and Cd=’L’ when VOUT becomes ‘H’ in ex.1.

■OPERATIONAL EXPLANATION (Continued)

●Function Chart

* The release delay time values above are calculated by using the formula (2).

*2: The release delay time (tDR) is influenced by the delay capacitance Cd.

14/22

XC6108 Series

■OPERATIONAL EXPLANATION (Continued)

Figure 1: Typical application circuit example

Figure 2: The timing chart of Figure 1

*The XC6108N series (N-ch open

drain output) requires a pull-up

resistor for pulling up output.

Vref

Comparator Inverter

R1

R2

R3

M5

ＲＳEN=R1+R2+R3

M2

M1

M3

VOUT

VSS

Rdelay

Cd

VSEN

VIN

VIN VSEN

Cd

M4

VSEN (MIN.:0V, MAX.:6.0V)

VTCD

VDF+VHYS

VOUT (MIN.:VSS, MAX:VIN)

VCD(MIN.:VSS, MAX.:VIN)

VDF

15/22

XC6108

Series

VSEN

Cd

VSS

VIN

VOUT

VSENVIN

Cd

R=100kΩ

VOUT

(No resistor needed fo

r

CMOS output products)

1. Use this IC within the stated maximum ratings. Operation beyond these limits may cause degrading or permanent damage

to the device.

2. The power supply input pin voltage drops by the resistance between power supply and the VIN pin, and by through current

at operation of the IC. At this time, the operation may be wrong if the power supply input pin voltage falls below the

minimum operating voltage range. In CMOS output, for output current, drops in the power supply input pin voltage

similarly occur. Moreover, in CMOS output, when the VIN pin and the sense pin are short-circuited and used, oscillation of

the circuit may occur if the drops in voltage, which caused by through current at operation of the IC, exceed the hysteresis

voltage. Note it especially when you use the IC with the VIN pin connected to a resistor.

3. When the setting voltage is less than 1.0V, be sure to separate the VIN pin and the sense pin, and to apply the voltage over

1.0V to the VIN pin.

4. Note that a rapid and high fluctuation of the power supply input pin voltage may cause a wrong operation.

5. Power supply noise may cause operational function errors, Care must be taken to put the capacitor between VIN-GND and

test on the board carefully.

6. When there is a possibility of which the power supply input pin voltage falls rapidly (e.g.: 6.0V to 0V) at release operation

with the delay capacitance pin (Cd) connected to a capacitor, use a schottky barrier diode connected between the VIN pin

and the Cd pin as the Figure 3 shown below.

6. In N channel open drain output, VOUT voltage at detect and release is determined by resistance of a pull up resistor

connected at the VOUT pin. Please choose proper resistance values with reffering to Figure 4;

During detection : VOUT = Vpull / (1+Rpull / RON)

Vpull: Pull up voltage

RON(※1)：On resistance of N channel driver M3 can be calculated as VDS / IOUT1 from electrical characteristics,

For example, when (※2) RON = 0.5 / 0.8×10-3 = 625Ω（MIN.）at VIN=2.0V, Vpull = 3.0V and VOUT ≦0.1V at detect,

Rpull= (Vpull /VOUT-1)×RON= (3 / 0.1-1)×625≒18ｋΩ

In this case, Rpull should be selected higher or equal to 18kΩ in order to keep the output voltage less than 0.1V during

detection.

(※1) RON is bigger when VIN is smaller, be noted.

(※2) For calculation, Minimum VIN should be chosen among the input voltage range.

During releasing：VOUT = Vpull / (1 + Rpull / Roff)

Vpull：Pull up voltage

Roff：On resistance of N channel driver M3 is 15MΩ（MIN.） when the driver is off (as to VOUT / ILEAK)

For example：when Vpull = 6.0V and VOUT ≧ 5.99V,

Rpull = (Vpull / VOUT-1)×Roff = (6/5.99-1)×15×106 ≒25kΩ

In this case, Rpull should be selected smaller or equal to 25kΩ in order to obtain output voltage higher than 5.99V

during releasing.

Figure 3: Circuit example with the delay capacitance pin (Cd) connected to a schottky barrier diode

Figure 4: Circuit example of XC6108N Series

■NOTES ON USE

Figure 3

Figure 4

NOTE： Roff=VOUT/ILEAK

R1

Vref

R2

R3

M5

ＲＳEN=R1+R2+R3

Rdelay

M2

M1

M3

Comparator Inverter

Cd

VSEN

VIN

VIN VSEN VOUT

VSS

Vpull

Rpull

ILEA

K

16/22

XC6108 Series

■TYPICAL PERFORMANCE CHARACTERISTICS

(1) Supply Current vs. Sense Voltage

(2) Supply Current vs. Input Voltage

(3) Detect Voltage vs. Ambient Temperature (4) Detect Voltage vs. Input Voltage

XC6108C25AGR

0.0

0.5

1.0

1.5

2.0

0123456

Sense Voltage: VSEN (V)

Supply Current: ISS (μA)

25℃

-40℃

Ta=85℃

VIN =3.0V

XC6108C25AGR

2.45

2.50

2.55

-50 -25 0 25 50 75 100

Ambient Temperature: Ta (℃)

Detect Voltage: VDF (V)

VIN=4.0V

XC6108C25AGR

0.0

0.2

0.4

0.6

0.8

1.0

1.2

0123456

Input Voltage: VIN (V)

Supply Current: ISS (μA)

VSEN=2.25V

25℃

-40℃

Ta= 85℃

XC6108C25AGR

0.0

0.2

0.4

0.6

0.8

1.0

1.2

0123456

Input Voltage: VIN (V)

Supply Current: ISS (μA)

VSEN=2.75V

25℃

-40℃

Ta= 85℃

XC6108C25AGR

2.45

2.50

2.55

1.0 2.0 3.0 4.0 5.0 6.0

Input Voltage: VIN (V)

Detect Voltage: VDF (V)

85℃

-40℃

Ta= 25℃

Supply Current : ISS (μA)

Detect Voltage : VDF (V)

Sense Voltage : VSEN (V)

Input Voltage : VIN (V) Input Voltage : VIN (V)

Input Voltage : VIN (V)

Ambient Temperature : Ta (℃)

17/22

XC6108

Series

XC6108N25AGR

-1.0

0.0

1.0

2.0

3.0

4.0

0 0.5 1 1.5 2 2.5 3

Supply Voltage: VIN (V)

Output Voltage: VOUT (V)

VSEN=VIN Pull-up=VIN R=100kΩ

25℃

-40℃

Ta=85℃

■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)

(5) Hysteresis Voltage vs. Ambient Temperature (6) CD Pin Sink Current vs. Input Voltage

(7) Output Voltage vs. Sense Voltage (8) Output Voltage vs. Input Voltage

(9) Output Current vs. Input Voltage

XC6108C25AGR

0.05

0.10

0.15

0.20

-50 -25 0 25 50 75 100

Ambient Temperature: Ta (℃)

Hysteresis Voltage:

VHYS (V)

VIN = 4.0V

XC6108C25AGR

-1.0

0.0

1.0

2.0

3.0

4.0

5.0

6.0

7.0

0123456

Sense V olta

g

e: VSEN

(

V

)

Output Voltage: VOUT (V)

Ta=25

℃

4.0V

1.0V

VIN=6.0V

XC6108C25AGR

0.0

0.5

1.0

1.5

2.0

2.5

3.0

0123456

Input Voltage: VIN (V)

Cd PIN Sink Current: ICD (mA)

25℃

85℃

Ta= -40℃

VSEN=0V, VDS=0.5V

XC6108C25AGR

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

0123456

Input Voltage: VIN (V)

Output Current: IOUT (mA)

VDS(Nch)=0.5V

Ta=-40℃

25℃

85℃

XC6108C25AGR

-2.0

-1.5

-1.0

-0.5

0.0

0123456

Input Voltage: VIN (V)

Output Current: IOUT (mA)

VDS(Pch)=0.5V

-40℃

25℃

Ta= 85℃

Sense Voltage : VSEN (V)

Hysteresis Voltage : VHYS (V)

Cd PIN Sink Current : ICD (mA)

Output Voltage : VOUT (V)

Out

p

ut Current : IOUT

(

mA

)

Out

p

ut Current : IOUT

(

mA

)

Input Voltage : VIN (V)

Input Voltage : VIN (V) Input Voltage : VIN (V)

Ambient Temperature : Ta (℃)

18/22

XC6108 Series

XC6108C25AGR

1

1.5

2

2.5

3

3.5

4

-50 -25 0 25 50 75 100

Ambient Temperature: Ta (℃)

Delay Resistance: Rdelay

(MΩ)

VSEN=6.0V VCD=0.0V VIN=5.0V

XC6108N25AGR

0.10

0.15

0.20

0.25

-50 -25 0 25 50 75 100

Ambient Temperature: Ta (℃)

Leak Carrent: ILEAK ( μA)

VIN=VSEN=6.0V VOUT=6.0V

XC6108C25AGR

0.1

1

10

100

1000

10000

0.0001 0.001 0.01 0.1 1

Delay Capacitor: Cd (μF)

Release Delay time: TDR (ms)

Ta=25℃

TDR=Cd×2.0×10

6

×0.69

VIN=1.0V

3.0V

6.0V

■TYPICAL PERFORMANCE CHARACTERISTICS (Continued)

(10) Delay Resistance vs. Ambient Temperature (11) Release Delay Time vs. Delay Capacitance

(12) Detect Delay Time vs. Delay Capacitance

XC6108C25AGR

1

10

100

1000

0.0001 0.001 0.01 0.1 1

Delay Capacitance: Cd (μF)

Detect Delay Time: TDF (μs)

Ta=25℃

VIN=6.0V

4.0V

3.0V

2.0V

1.0V

Ambient Temperature : Ta (℃)

Detect Delay Time : TDF (μs) Delay Resistance : Rdelay (MΩ)

Release Delay Time : TDR (ms)

Delay Capacitance : Cd (μF)

(13) Leakage Current vs. Ambient Temperature

(14) Leakage Current vs. Supply Voltage

XC6108N25AGR

0.10

0.15

0.20

0.25

0123456

Output Voltage: VOUT (V)

Leak Current: ILEAK (

μA)

VIN=VSEN=6.0V

19/22

XC6108

Series

■PACKAGING INFORMATION

●USP-4

●SOT-25

13

2.9±0.2

0.4

+0.1

-0.05

1.9±0.2

0.15 +0.1

-0.05

0～0.1

2

5 4

(0.95)

*

S

o

ld

er

i

ng

fill

et su

r

f

ace

i

s not

formed because the sides of the

pins are plated.

20/22

XC6108 Series

●USP-4 Reference Pattern Layout ●USP-4 Reference Metal Mask Design

■PACKAGING INFORMATION (Continued)

21/22

XC6108

Series

①

②

③

④

123

5

4

③

1

2

4

3

① ②

④

(ex.)

MARK VOLTAGE (V) PRODUCT SERIES

3 x.3 XC6108xx3xxx

0 x.0 XC6108xx0xxx

MARK OPTIONS PRODUCT SERIES

A Built-in delay capacitance pin with hysteresis 5% (TYP.)

(Standard) XC6108xxxAxx

B Built-in delay capacitance pin with hysteresis less than 1%

(Standard) XC6108xxxBxx

C No built-in delay capacitance pin with hysteresis 5% (TYP.)

(Semi-custom) XC6108xxxCxx

D No built-in delay capacitance pin with hysteresis less than 1%

(Semi-custom) XC6108xxxDxx

(ex.)

MARK VOLTAGE (V) PRODUCT SERIES

3 x.3 XC6108xx3xxx

0 x.0 XC6108xx0xxx

MARK OPTIONS PRODUCT

SERIES

A Built-in delay capacitance pin with hysteresis 5% (TYP.)

(Standard) XC6108xxxAxx

B Built-in delay capacitance pin with hysteresis less than 1%

(Standard) XC6108xxxBxx

C No built-in delay capacitance pin with hysteresis 5% (TYP.)

(Semi-custom) XC6108xxxCxx

D No built-in delay capacitance pin with hysteresis less than 1%

(Semi-custom) XC6108xxxDxx

MARK VOLTAGE (V) MARK VOLTAGE (V)

A 0.x K 0.x

B 1.x L 1.x

C 2.x M 2.x

D 3.x N 3.x

E 4.x P 4.x

F 5.x R 5.x

MARK VOLTAGE (V) MARK VOLTAGE (V)

A 0.x K 0.x

B 1.x L 1.x

C 2.x M 2.x

D 3.x N 3.x

E 4.x P 4.x

F 5.x R 5.x

■MARKING RULE

① represents output configuration and integer number of detect voltage

CMOS Output (XC6108C Series) N-ch Open Drain Output (XC6108N Series)

② represents decimal number of detect voltage

③ represents options

④

r

epresents production lot numbe

r

0 to 9, A to Z or inverted characters of 0 to 9, A to Z repeated.

(G, I, J, O, Q, W excluded)

●SOT-25

① represents output configuration and integer number of detect voltage

CMOS Output (XC6108C Series) N-ch Open Drain Output (XC6108N Series)

②

r

epresents decimal number of detect voltage

③ represents options

④

r

epresents production lot numbe

r

0 to 9, A to Z repeated. (G, I, J, O, Q, W excluded)

*No character inversion used.

●USP-4

SOT-25

(

TOP VIEW

)

USP-4

(

TOP VIEW

)

22/22

XC6108 Series

1. The products and product specifications contained herein are subject to change without

notice to improve performance characteristics. Consult us, or our representatives

before use, to confirm that the information in this datasheet is up to date.

2. We assume no responsibility for any infringement of patents, patent rights, or other

rights arising from the use of any information and circuitry in this datasheet.

3. Please ensure suitable shipping controls (including fail-safe designs and aging

protection) are in force for equipment employing products listed in this datasheet.

4. The products in this datasheet are not developed, designed, or approved for use with

such equipment whose failure of malfunction can be reasonably expected to directly

endanger the life of, or cause significant injury to, the user.

(e.g. Atomic energy; aerospace; transport; combustion and associated safety

equipment thereof.)

5. Please use the products listed in this datasheet within the specified ranges.

Should you wish to use the products under conditions exceeding the specifications,

please consult us or our representatives.

6. We assume no responsibility for damage or loss due to abnormal use.

prior permission of TOREX SEMICONDUCTOR LTD.