©2005 Fairchild Semiconductor Corporation
1
www.fairchildsemi.com
July 2005
Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.3
Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
Single-channel: 6N137, HCPL-2601, HCPL-2611
Dual-Channel: HCPL-2630, HCPL-2631
High Speed-10 MBit/s Logic Gate Optocouplers
Features
■
Very high speed-10 MBit/s
■
Superior CMR-10 kV/µs
■
Double working voltage-480V
■
Fan-out of 8 over -40°C to +85°C
■
Logic gate output
■
Strobable output
■
Wired OR-open collector
■
U.L. recognized (File # E90700)
Applications
■
Ground loop elimination
■
LSTTL to TTL, LSTTL or 5-volt CMOS
■
Line receiver, data transmission
■
Data multiplexing
■
Switching power supplies
■
Pulse transformer replacement
■
Computer-peripheral interface
Description
The 6N137, HCPL-2601/2611 single-channel and HCPL-2630/
2631 dual-channel optocouplers consist of a 850 nm AlGaAS
LED, optically coupled to a very high speed integrated photo-
detector logic gate with a strobable output. This output features
an open collector, thereby permitting wired OR outputs. The
coupled parameters are guaranteed over the temperature range
of -40°C to +85°C. A maximum input signal of 5 mA will provide
a minimum output sink current of 13mA (fan out of 8).
An internal noise shield provides superior common mode rejec-
tion of typically 10kV/µs. The HCPL- 2601 and HCPL- 2631 has
a minimum CMR of 5 kV/µs. The HCPL-2611 has a minimum
CMR of 10 kV/µs.
PackageSchematic
Truth Table (Positive Logic)
A 0.1µF bypass capacitor must be connected between pins 8 and 5. (See note 1)
8
8
1
8
1
1
1
2
3
4 5
6
7
8
N/C
_
V
CC
V
E
V
O
GND
+
N/C
V
F
1
2
3
4 5
6
7
8
+
_
V
F1
V
CC
V
01
V
02
GND
V
F2
_
+
HCPL-2630
HCPL-2631
6N137
HCPL-2601
HCPL-2611
Input Enable Output
H H L
L H H
H L H
L L H
H NC L
L NC H
2
www.fairchildsemi.com
Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.3
Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
Absolute Maximum Ratings
(T
A
= 25°C unless otherwise specified)
Recommended Operating Conditions
*6.3mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value is
5.0 mA or less.
Parameter Symbol Value Units
Storage Temperature T
STG
-55 to +125 °C
Operating Temperature T
OPR
-40 to +85 °C
Lead Solder Temperature T
SOL
260 for 10 sec °C
EMITTER
DC/Average Forward Single Channel I
F
50 mA
Input Current Dual Channel (Each Channel) 30
Enable Input Voltage
Not to exceed V
CC
by more than 500 mV
Single Channel V
E
5.5 V
Reverse Input Voltage Each Channel V
R
5.0 V
Power Dissipation Single Channel P
I
100 mW
Dual Channel (Each Channel)
45
DETECTOR
Supply Voltage V
CC
(1 minute max)
7.0 V
Output Current Single Channel I
O
50 mA
Dual Channel (Each Channel) 50
Output Voltage Each Channel V
O
7.0 V
Collector Output Single Channel P
O
85 mW
Power Dissipation Dual Channel (Each Channel) 60
Parameter Symbol Min Max Units
Input Current, Low Level I
FL
0 250 µA
Input Current, High Level I
FH
*6.3 15 mA
Supply Voltage, Output V
CC
4.5 5.5 V
Enable Voltage, Low Level V
EL
0 0.8 V
Enable Voltage, High Level V
EH
2.0 V
CC
V
Low Level Supply Current T
A
-40 +85 °C
Fan Out (TTL load) N 8
3
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Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.3
Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
Electrical Characteristics
(T
A
= 0 to 70°C Unless otherwise specified)
Individual Component Characteristics
Switching Characteristics
(T
A
= -40°C to +85°C, V
CC
= 5 V, I
F
= 7.5 mA Unless otherwise specified)
Parameter Test Conditions Symbol Min Typ** Max Unit
EMITTER
(I
F
= 10mA) V
F
1.8 V
Input Forward Voltage T
A
= 25°C 1.4 1.75
Input Reverse Breakdown Voltage (I
R
= 10µA) B
VR
5.0 V
Input Capacitance (V
F
= 0, f = 1 MHz) C
IN
60 pF
Input Diode Temperature Coefficient (I
F
= 10mA)
∆
V
F
/
∆
T
A
-1.4 mV/°C
DETECTOR
High Level Supply Current Single Channel (V
CC
= 5.5 V, I
F
= 0 mA) I
CCH
710mA
Dual Channel (V
E
= 0.5V) 10 15
Low Level Supply Current Single Channel (V
CC
= 5.5 V, I
F
= 10 mA) I
CCL
913mA
Dual Channel (V
E
= 0.5V) 14 21
Low Level Enable Current (V
CC
= 5.5 V, V
E
= 0.5V) I
EL
-0.8 -1.6 mA
High Level Enable Current (V
CC
= 5.5 V, V
E
= 2.0V) I
EH
-0.6 -1.6 mA
High Level Enable Voltage (V
CC
= 5.5 V, I
F
= 10 mA) V
EH
2.0 V
Low Level Enable Voltage (V
CC
= 5.5 V, I
F
= 10 mA)(Note 3) V
EL
0.8 V
AC Characteristics Test Conditions Symbol Min Typ** Max Unit
Propagation Delay Time
to Output High Level
(Note 4) (T
A
= 25°C) T
PLH
20 45 75 ns
(R
L
= 350
Ω
, C
L
= 15 pF) (Fig. 12) 100
Propagation Delay Time
to Output Low Level
(Note 5) (T
A
= 25°C) T
PHL
25 45 75 ns
(R
L
= 350
Ω
, C
L
= 15 pF) (Fig. 12) 100
Pulse Width Distortion (R
L
= 350
Ω
, C
L
= 15 pF) (Fig. 12) |T
PHL
-
T
PLH
|
335ns
Output Rise Time
(10-90%)
(R
L
= 350
Ω
, C
L
= 15 pF)
(Note 6) (Fig. 12)
t
r
50 ns
Output Rise Time
(90-10%)
(R
L
= 350
Ω
, C
L
= 15 pF)
(Note 7) (Fig. 12)
t
f
12 ns
Enable Propagation Delay
Time to Output High Level
(I
F
= 7.5 mA, V
EH
= 3.5 V)
(R
L
= 350
Ω
, C
L
= 15 pF) (Note 8) (Fig. 13)
t
ELH
20 ns
Enable Propagation Delay
Time to Output Low Level
(I
F
= 7.5 mA, V
EH
= 3.5 V)
(R
L
= 350
Ω
, C
L
= 15 pF) (Note 9) (Fig. 13)
t
EHL
20 ns
Common Mode Transient
Immunity (at Output High
Level)
(T
A
= 25°C) |V
CM
| = 50V, (Peak)
(I
F
= 0 mA, V
OH
(Min.) = 2.0V)
|CM
H
| V/µs
6N137, HCPL-2630
HCPL-2601, HCPL-2631
(R
L
= 350Ω) (Note 10)
(Fig. 14) 5000
10,000
10,000
HCPL-2611 |VCM| = 400V 10,000 15,000
Common Mode Transient
Immunity (at Output Low
Level)
(RL = 350Ω) (IF = 7.5 mA, VOL (Max.) = 0.8V |CML| 10,000 V/µs
6N137, HCPL-2630 |VCM| = 50V (Peak)
HCPL-2601, HCPL-2631 (TA = 25°C)(Note 11)(Fig. 14) 5000 10,000
HCPL-2611(TA = 25°C) |VCM| = 400V 10,000 15,000
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Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.3
Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
Transfer Characteristics (TA = -40 to +85°C Unless otherwise specified)
Isolation Characteristics (TA = -40°C to +85°C Unless otherwise specified.)
** All Typicals at VCC = 5V, TA = 25°C
NOTES
1. The VCC supply to each optoisolator must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic or solid
tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package VCC and
GND pins of each device.
2. Each channel.
3. Enable Input - No pull up resistor required as the device has an internal pull up resistor.
4. tPLH -Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current pulse to the 1.5 V
level on the LOW to HIGH transition of the output voltage pulse.
5. tPHL -Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current pulse to the 1.5 V
level on the HIGH to LOW transition of the output voltage pulse.
6. tr -Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.
7. tf -Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.
8. tELH -Enable input propagation delay is measured from the 1.5 V level on the HIGH to LOW transition of the input voltage pulse to
the 1.5 V level on the LOW to HIGH transition of the output voltage pulse.
9. tEHL -Enable input propagation delay is measured from the 1.5 V level on the LOW to HIGH transition of the input voltage pulse to
the 1.5 V level on the HIGH to LOW transition of the output voltage pulse.
10. CMH -The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high state (i.e., VOUT
> 2.0 V). Measured in volts per microsecond (V/µs).
11. CML -The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the low output state (i.e.,
VOUT < 0.8 V). Measured in volts per microsecond (V/µs).
12. Device considered a two-terminal device: Pins 1,2,3 and 4 shorted together, and Pins 5,6,7 and 8 shorted together.
DC Characteristics Test Conditions Symbol Min Typ** Max Unit
High Level Output Current (VCC = 5.5 V, VO = 5.5 V)
(IF = 250 µA, VE = 2.0 V) (Note 2)
IOH 100 µA
Low Level Output Current (VCC = 5.5 V, IF = 5 mA)
(VE = 2.0 V, ICL = 13 mA) (Note 2)
VOL .35 0.6 V
Input Threshold Current (VCC = 5.5 V, VO = 0.6 V,
VE = 2.0 V, IOL = 13 mA)
IFT 3 5 mA
Characteristics Test Conditions Symbol Min Typ** Max Unit
Input-Output
Insulation Leakage
Current
(Relative humidity = 45%)
(TA = 25°C, t = 5 s)
(VI-O = 3000 VDC)
(Note 12)
II-O 1.0* µA
Withstand Insulation Test Voltage (RH < 50%, TA = 25°C)
(Note 12) ( t = 1 min.)
VISO 2500 VRMS
Resistance (Input to Output) (VI-O = 500 V) (Note 12) RI-O 1012 Ω
Capacitance (Input to Output) (f = 1 MHz) (Note 12) CI-O 0.6 pF
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Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.3
Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
Fig.1 Low Level Output Voltage vs. Ambient Temperature
TA - Ambient Temperature (°C)
TA - Ambient Temperature (°C)
TA - Ambient Temperature (°C)
-40 -20 0 20 40 60 80
V
OL
- Low Level Output Voltage (V)
T
P
- Propagation Delay (ns)
I
F
- Forward Current (mA)
I
OL
- Low Level Output Current (mA)
V
O
- Output Voltage (V)
I
F
- Forward Current (mA)
I
F
- Forward Current (mA)
IOL
= 16 mA
Fig. 4 Low Level Output Current
vs. Ambient Temperature
-40 -20 0 20 40 60 80
-40 -20 0 20 40 60 80
IF
= 5 mA
IF = 10 mA
IF = 15 mA
Fig. 5 Input Threshold Current
vs. Ambient Temperature
IFT - Input Threshold Current (mA)
RL = 350
RL = 1kΩ
RL = 4kΩ
Fig. 6 Output Voltage vs. Input Forward Current
RL = 350Ω
RL = 1kΩ
RL =4kΩ
IOL
= 6.4 mA
IOL
= 9.6 mA
IOL
= 12.8 mA
Conditions:
IF = 5 mA
VE = 2 V
VCC
= 5.5V
Conditions:
VCC
= 5.0 V
VO
= 0.6 V
Fig. 2 Input Diode Forward Voltage
vs. Forward Current
VF - Forward Voltage (V)
0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6
Conditions:
VCC
= 5 V
VE = 2 V
VOL
= 0.6 V
Fig.3 Switching Time vs. Forward Current
5
0123456
791113 15
VCC = 5 V
RL = 1 kΩ(TPLH)
RL = 4 kΩ(TPLH)
RL = 350 Ω (TPLH)
RL = 1 kΩ
RL = 4 kΩ
RL = 350 kΩ
(TPHL)
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
1
2
3
4
0
20
40
60
80
100
120
20
25
30
35
40
45
50
0
1
2
3
4
5
6
0.001
0.01
0.1
1
10
16
30
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Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.3
Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
Fig. 7 Pulse Width Distortion vs. Temperature
TA - Temperature (°C) TA - Temperature (°C)
TA - Temperature (°C)
TA - Temperature (°C)
TA - Temperature (°C)
-60 -40 -20 0 20 40 60 80 100
-60 -40 -20 0 20 40 60 80 100
-60 -40 -20 0 20 40 60 80 100
-60 -40 -20 0 20 40 60 80 100
-60 -40 -20 0 20 40 60 80 100
PWD - Pulse Width Distortion (ns)
TE - Enable Propagation Delay (ns)
IOH - High Level Output Current (µA)
TP - Propagation Delay (ns) Tr/Tf - Rise and Fall Time (ns)
RL = 4 kΩ
RL = 1 kΩ
RL = 350Ω
F
Conditions:
I = 7.5 mA
VCC = 5 V
Fig. 8 Rise and Fall Time vs. Temperature
LR = 4 kΩ(tr)
Conditions:
IF = 7.5 mA
VCC = 5 V
RL = 1 kΩ(tr)
RL = 350Ω (tr)
RL = 1 kΩ
RL = 4 kΩ(tf)
RL = 350Ω
Fig. 9 Enable Propagation Delay vs. Temperature
RL = 4 kΩ (TELH)
RL = 1 kΩ (TELH)
RL = 350Ω (TELH)
RL = 350Ω
RL = 1 kΩ
RL = 4 kΩ
(TEHL)
Fig. 10 Switching Time vs. Temperature
RL = 1 kΩ TPLH
RL = 350Ω TPLH
RL = 4 kΩ TPLH
RL = 1 kΩ
RL = 4 kΩ
RL = 350Ω
TPHL
Fig. 11 High Level Output Current
vs. Temperature
VCC = 5.5 V
Conditions:
VO = 5.5 V
VE = 2.0 V
IF = 250 µA
0
20
40
60
80
0
100
200
300
400
500
600
0
20
40
60
80
100
120
20
40
60
80
100
120
0
5
10
15
20
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Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.3
Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
47
PHL
t
F
I = 7.5 mA
1.5 V
90%
10%
7.5 mA
+5V
1.5 V
3.0 V
1.5 V
3
2
1
4
8
7
6
5
4 5
Pulse
1
2
3
Generator
tr = 5ns
Z = 50Ω
O
8
7
6
+5V
GND
PLH
t
I = 3.75 mA
F
Output
O
(V )
Input
(I )
F
Output
(V )
O
f
t
r
t
CC
V
Output
(V )
O
L
R
C
L
(I )
Input
F
Monitor
O
Z = 50Ω
Pulse
Generator
tr = 5ns
(V )
E
Input
Monitor
GND
V
CC
O
(V )
Output
L
R
L
C
(V )
Output
O
Input
(V )
E
EHL
tt
ELH
bypass
.1 µf
bypass
.1 µf
Fig. 12 Test Circuit and Waveforms for tPLH, tPHL, trand tf.
Fig. 13 Test Circuit tEHL and tELH.
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Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.3
Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
+5V
Peak
3
2
1
4
8
7
6
5
GND
V
CC
O
(V )
Output
350Ω
V
CM
FF
V
A
B
Pulse Gen
I
F
CM
V
0V
O
V
5V Switching Pos. (A), I = 0
F
O
V (Max)
CM
0.5 V
O
VSwitching Pos. (B), I = 7.5 mA
F
H
CM
L
V (Min)
O
bypass
.1 µf
Fig. 14 Test Circuit Common Mode Transient Immunity
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Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.3
Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
NOTE
All dimensions are in inches (millimeters)
Package Dimensions (Through Hole)
0.200 (5.08)
0.140 (3.55)
0.100 (2.54) TYP
0.022 (0.56)
0.016 (0.41)
0.020 (0.51) MIN
0.390 (9.91)
0.370 (9.40)
0.270 (6.86)
0.250 (6.35)
3
0.070 (1.78)
0.045 (1.14)
241
56 78
0.300 (7.62)
TYP
0.154 (3.90)
0.120 (3.05)
0.016 (0.40)
0.008 (0.20)
15° MAX
PIN 1
ID.
SEATING PLANE
Package Dimensions (Surface Mount)
Lead Coplanarity : 0.004 (0.10) MAX
0.270 (6.86)
0.250 (6.35)
0.390 (9.91)
0.370 (9.40)
0.022 (0.56)
0.016 (0.41)
0.100 (2.54)
TYP
0.020 (0.51)
MIN
0.070 (1.78)
0.045 (1.14)
0.300 (7.62)
TYP
0.405 (10.30)
MIN
0.315 (8.00)
MIN
0.045 [1.14]
32 14
5678
0.016 (0.41)
0.008 (0.20)
PIN 1
ID.
Package Dimensions (0.4"Lead Spacing)
0.200 (5.08)
0.140 (3.55)
0.100 (2.54) TYP
0.022 (0.56)
0.016 (0.41)
0.004 (0.10) MIN
0.390 (9.91)
0.370 (9.40)
0.270 (6.86)
0.250 (6.35)
3
0.070 (1.78)
0.045 (1.14)
241
56 78
0.400 (10.16)
TYP
0.154 (3.90)
0.120 (3.05)
0.016 (0.40)
0.008 (0.20)
0° to 15°
PIN 1
ID.
SEATING PLANE
Recommended Pad Layout for
Surface Mount Leadform
0.070 (1.78)
0.060 (1.52)
0.030 (0.76)
0.100 (2.54)
0.295 (7.49)
0.415 (10.54)
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Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.3
Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
Ordering Information
Option Example Part Number Description
S 6N137S Surface Mount Lead Bend
SD 6N137SD Surface Mount; Tape and reel
W 6N137W 0.4" Lead Spacing
V 6N137V VDE0884
TV 6N137TV VDE0884; 0.4” lead spacing
SV 6N137SV VDE0884; surface mount
SDV 6N137SDV VDE0884; surface mount; tape and reel
QT Carrier Tape Specifications (“D” Taping Orientation)
4.0 ± 0.1
Ø1.55 ± 0.05
User Direction of Feed
4.0 ± 0.1
1.75 ± 0.10
7.5 ± 0.1
16.0 ± 0.3
12.0 ± 0.1
0.30 ± 0.05
13.2 ± 0.2
4.90 ± 0.20
0.1 MAX 10.30 ± 0.20
10.30 ± 0.20
Ø1.6 ± 0.1
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Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.3
Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
Marking Information
1
2
6
43 5
Definitions
1Fairchild logo
2Device number
3VDE mark (Note: Only appears on parts ordered with VDE option –
See order entry table)
4Two digit year code, e.g., ‘03’
5Two digit work week ranging from ‘01’ to ‘53’
6 Assembly package code
2601
T1YYXXV
Reflow Profile
• Peak reflow temperature: 225 C (package surface temperature)
• Time of temperature higher than 183 C for 60–150 seconds
• One time soldering reflow is recommended
215 C, 10–30 s
225 C peak
Time (Minute)
0
300
250
200
150
100
50
0
0.5 1 1.5 2 2.5 3 3.5 4 4.5
Temperature (°C)
Time above 183 C, 60–150 sec
Ramp up = 3 C/sec
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Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 Rev. 1.0.3
Single-channel: 6N137, HCPL-2601, HCPL-2611 Dual-Channel: HCPL-2630, HCPL-2631 High Speed-10 MBit/s Logic Gate Optocouplers
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
ISOPLANAR™
LittleFET™
MICROCOUPLER™
MicroFET™
MicroPak™
MICROWIRE™
MSX™
MSXPro™
OCX™
OCXPro™
OPTOLOGIC
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerEdge™
FAST
FASTr™
FPS™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
I2C™
i-Lo™
ImpliedDisconnect™
IntelliMAX™
Rev. I16
ACEx™
ActiveArray™
Bottomless™
Build it Now™
CoolFET™
CROSSVOLT™
DOME™
EcoSPARK™
E2CMOS™
EnSigna™
FACT™
FACT Quiet Series™
PowerSaver™
PowerTrench
QFET
QS™
QT Optoelectronics™
Quiet Series™
RapidConfigure™
RapidConnect™
µSerDes™
SILENT SWITCHER
SMART START™
SPM™
Stealth™
SuperFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic
TINYOPTO™
TruTranslation™
UHC™
UltraFET
UniFET™
VCX™
Wire™
Across the board. Around the world.™
The Power Franchise
Programmable Active Droop™