1
®
FN8178.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X9314
Terminal Voltages ±5V, 32 Taps, Log Taper
Single Digitally Controlled Potentiometer
(XDCP™)
The Intersil X9314 is a solid state nonvolatile potentiometer and
is ideal for digitally controlled resistance trimming.
The X9314 is a resistor array composed of 31 resistive
elements. Between each element and at either end are tap
points accessible to the wiper element. The position of the
wiper element is controlled by the CS, U/D, and INC inputs.
The position of the wiper can be stored in nonvolatile
memory and then be recalled upon a subseque nt power-up
operation.
The XDCP can be used as a three-terminal potentiometer or
as a two-terminal variable resistor in a wide vari ety of
applications including control, parameter adjustments, and
signal processing.
Features
• Solid State Potentiometer
•32 Taps
•10kΩ End to End Resistance
• Three-Wire Up/Down Serial Interface
• Wiper Resistance, 40Ω Typical
• Nonvolatile St orage and Recall on Power-up of Wiper
Position Standby Current < 500µA Max (Total Package)
•V
CC = 3V to 5.5V Operation
• 100 Year Data Retention
• Offered in 8 Ld MSOP, SOIC and PDIP Packages
• Pb-Free Plus Anneal Available (RoHS Compliant)
Block Diagram
5-Bit
Up/Down
Counter
5-Bit
Nonvolatile
Memory
Store and
Recall
Control
Circuitry
One
of
Thirty-Two
Decoder Resistor
Array
31
30
29
28
2
1
0
VL/RL
VW/RW
VH/RH
U/D
INC
CS
VCC
VSS
Transfer
Gates
Data Sheet September 5, 2006
2FN8178.2
September 5, 2006
Pin Descriptions
VH/RH and VL/RL
The high (VH/RH) and low (VL/RL) terminal s of the X9314
are equivalent to the fixed terminals of a mech anical
potentiometer. The minimum voltage is –5V and the
maximum is +5V. It should be noted that the terminology of
VL/RL and VH/RH references the relative position of the
terminal in relation to wiper movement direction selected by
the U/D input and not the voltage potential on the terminal.
VW/RW
VW/RW is the wiper terminal, equivalent to the movable
terminal of a mechanical potentiometer. The position of the
wiper within the array is determined by the control inputs.
The wiper terminal series resistance is typically 40Ω.
Up/Down (U/D)
The U/D input controls the direction of the wiper movement
and whether the counter is incremented or decremented.
Increment (INC)
The INC input is negative-edge triggered. Toggling INC will
move the wiper and either increment or decrement the
counter in the direction indicated by the logic level on the
U/D input.
Chip Select (CS)
The device is selected when the CS input is LOW. The
current counter value is stored in nonvolatile memory when
CS is returned HIGH while th e INC input is also HIGH. After
the store operation is complete the X9314 will be placed in
the low power standby mode until the device is selected
once again.
Pin Configuration
Ordering Information
PART NUMBER PART MARKING VCC RANGE
(V) RTOTAL
(kΩ)TEMP RANGE
(°C) PACKAGE PKG.
DWG. #
X9314WMI* 14WI 5 ±10% 10 -40 to +85 8 Ld MSOP M8.118
X9314WP X9314WP 0 to +70 8 Ld PDIP MDP0031
X9314WPI X9314WP I -40 to +85 8 Ld PDIP MDP0031
X9314WS* X9314W 0 to +70 8 Ld SOIC M8.15
X9314WSI* X9314W I -40 to +85 8 Ld SOIC M8.15
X9314WSIZ (Note) X9314W ZI -40 to +85 8 Ld SOIC (Pb-free) M8.15
X9314WSZ* (Note) X9314W Z 0 to +70 8 Ld SOIC (Pb-free) M8.15
X9314WMI-3* AAY 3 to 5.5 -40 to +85 8 Ld MSOP M8.118
X9314WMIZ-3* (Note) DEX -40 to +85 8 Ld MSOP (Pb-free) M8.118
X9314WS-3* X9314W D 0 to +70 8 Ld SOIC M8.15
X9314WSZ-3* (Note) X9314W ZD 0 to +70 8 Ld SOIC (Pb-free) M8.15
*Add "T1" suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
Pin Names
SYMBOL DESCRIPTION
VH/RHHigh Terminal
VW/RWWiper Terminal
VL/RLLow Terminal
VSS Ground
VCC Supply Voltage
U/D Up/Down Input
INC Increment Input
CS Chip Select Input
U/D
INC
VCC
CS
VH/RH
VSS
VW/RW
VL/RL
1
2
3
4
8
7
6
5
X9314
8 LD MSOP
VCC
CS
VL/RL
VW/RW
INC
U/D
VH/RH
VSS
1
2
3
4
8
7
6
5
X9314
8 LD PDIP/SOIC
X9314
3FN8178.2
September 5, 2006
Typical Attenuation Characteristics (dB)
Principles of Operation
There are three sections of the X9314: the input control,
counter and decode section; the nonvolatile memory; and the
resistor array. The input control section operates just like an
up/down counter. The output of this counter is decoded to turn
on a single electronic switch connecting a point on the resistor
array to the wiper output. Under the proper conditions the
contents of the counter can be stored in nonvolatile memory
and retained for future use. The resistor array is comprised of
31 individual resistors connected in series. At either end of the
array and between each resistor is an electronic switch that
transfers the potential at that point to the wiper .
The INC, U/D and CS inputs control the movement of the
wiper along th e re sistor array. With CS set LOW the X9314
is selected and enabled to respond to the
U/D and INC inputs. HIGH to LOW transitions on INC will
increment or decrement (depending on the state of the U/D
input) a five bit counter. The output of this counter is
decoded to select one of thirty-two wiper positions along the
resistive array.
The wiper, when at either fixed terminal, acts like its
mechanical equivalent and does not move beyond the last
position. That is, the counter does not wrap aroun d when
clocked to either extreme.
The value of the counter is stored in nonvolatile memory
whenever CS transistions HIGH while th e INC input is also
HIGH.
When the X9314 is powered -d own, the last counter position
stored will be maintained in the nonvolatile memory. When
power is restored, the contents of the memory are recalled
and the counter is reset to the value last stored.
Operation Notes
The system may select the X9314, move the wiper and
deselect the device without having to store the latest wiper
position in nonvolatile memory. The wiper
movement is performed as described above; once the new
position is reached, the system would keep the INC LOW
while taking CS HIGH. The new wiper position would be
maintained until changed by the system or until a power-
up/down cycle recalled the previously stored data.
This would allow the system to always power-up to a preset
value stored in nonvolatile memory; then during system
operation minor adjustments could be made. The
adjustments might be based on user preference, system
parameter changes due to temperature drift, etc.
The state of U/D may be changed while CS remains LOW.
This allows the host system to enable the X9314 and then
move the wiper up and down until the proper trim is attained.
tIW/RTOTAL
The electronic switches on the X9314 operate in a “make
before break” mode when the wiper changes tap positions. If
the wiper is moved several positions multiple taps are
connected to the wiper for tIW (INC to VW change). The
RTOTAL value for the device can temporarily be reduced by
a significant amount if the wiper is moved several positions.
Power-up and Down Requirement
The are no restrictions on the sequencing of V CC and the
voltages applied to the potentiometer pins during power-up
or power-down conditions. During power-up, the data sheet
parameters for the DCP do not fully apply until 1 millisecond
after VCC reaches its final value. The VCC ramp rate spec is
always in effect.
Tap Position
0
48
12
1620242831
-20
-40
-43.5
0
-60
Attenuation (dB)
X9314
4FN8178.2
September 5, 2006
NOTE:
1. This parameter is periodically sampled and not 100% tested.
Absolute Maximum Ratings Recommended Operating Conditions
Temperature under bias. . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C
Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage on CS, INC, U/D, and
VCC with respect to VSS . . . . . . . . . . . . . . . . . . . . . . . -1V to +7V
Voltage on VH/RH and VL/RL referenced
to VSS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -8V to +8V
∆V = |VH/RH - VL/RL| . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10V
Lead temperature (soldering 10s) . . . . . . . . . . . . . . . . . . . . .+300°C
Wiper current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1mA
IW (10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±8.8mA
Temperature (Commercial) . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Temperature (Industrial). . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Supply Voltage (VCC) Limits
X9314. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V ± 10%
X9314-2.7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 5.5V
CAUTION: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only; the functional
operation of the device (at these or any other conditions above those listed in the operational sections of this specification) is not implied. E xposure to ab solute maxim um
rating conditio ns for ext e nded pe rio ds may a ffe ct d evice reli abi lit y.
Potentiometer Characteristics (Over recommended operating conditions unless otherwise stated.)
SYMBOL PARAMETER TEST CONDITIONS/NOTES
LIMITS
MIN TYP MAX UNITS
RTOTAL End to End Resistance Tolerance ±20 %
VH/RH Terminal Voltage -5 +5 V
VVL/RL VL/RL Terminal Voltage -5 +5 V
Power Rating at +25°C 10 mW
RWWiper Resistance IW = ±1mA, VCC = 5V 40 100 Ω
IWWiper Current ±4.4 mA
Noise Ref: 1kHz -120 dBV
Relative variation. Error in step size
between taps. log (Rw(n)) - log Rw(n - 1)) 0.07-
0.003 0.07 + 0.003
RTOTAL Temperature Coefficient for -40°C to +85°C ±600 ppm/°C
Ratiometric Temperature Coefficient ±20 ppm/°C
CH/CL/CWPotentiometer Capacitance See Circuit #3 10/10/25 pF
X9314
5FN8178.2
September 5, 2006
NOTES:
2. Typical values are for TA = +25°C and nominal supply voltage.
3. This parameter is periodically sampled and not 100% tested.
SYMBOL TABLE
DC Electrical Specifications (Over recommended operating conditions unless otherwise specified.)
SYMBOL PARAMETER TEST CONDITIONS
LIMITS
UNITSMIN TYP(2) MAX
ICC VCC Active Current CS = VIL, U/D = VIL or VIH and
INC = 0.4V/2.4V @ max. tCYC 13mA
ISB Standby Supply Current CS = VCC - 0.3V, U/D and INC =V
SS or
VCC - 0.3V 500 µA
ILI CS, INC, U/D Input Leakage Current VIN = VSS to VCC ±10 µA
VIH CS, INC, U/D Input HIGH Voltage 2 VCC + 1 V
VIL CS, INC, U/D Input LOW Voltage -1 0.8 V
CIN(3) CS, INC, U/D Input Capacitance VCC = 5V , VIN = VSS, TA = +25°C, f = 1MHz 10 pF
Standard Parts
PART NUMBER MAXIMUM RESISTANCE WIPER INCREMENTS MINIMUM RESISTANCE
X9314W 10kΩLog Taper 40Ω
Test Circuit #1 Test Circuit #2 Circuit #3 SPICE Macromodel
Test Point
VW/RW
VH/RH
VL/RL
Force
Current
VW/RW
VH/RH
VL/RL
Test Point
10pF
RH
RTOTAL
CH
25pF
CW
CL
10pF
RW
RL
Macro Model
A.C. Conditions of Test
INPUT PULSE LEVELS 0V to 3V
Input rise and fall times 10ns
Input reference levels 1.5V
Mode Selection
CS INC U/D MODE
L H Wiper up
L L Wiper down
H X Store wiper position
H X X Standby
L X No store, return to standby
WAVEFORM INPUTS OUTPUTS
Must be
steady
Will be
steady
May change
from Low to
High
Will change
from Low to
High
May change
from High to
Low
Will change
from High to
Low
Don’t Care:
Changes
Allowed
Changing:
State Not
Known
N/A Center Line
is High
Impedance
X9314
6FN8178.2
September 5, 2006
A.C. Timing
NOTES:
4. Typical values are for TA = +25°C and nominal supply voltage.
5. This parameter is periodically sampled and not 100% tested.
6. MI in the A.C. timing diagram refers to the minimum incremental change in the VW output due to a change in the wiper position.
AC Electrical Specifications (Over recommended operating conditions unless otherwise specified)
SYMBOL PARAMETER
LIMITS
UNITSMIN TYP(4) MAX
tCl CS to INC Setup 100 ns
tlD INC HIGH to U/D Change 100 ns
tDI U/D to INC Setup 2.9 µs
tlL INC LOW Period 1 µs
tlH INC HIGH Period 1 µs
tlC INC Inactive to CS Inactive 1 µs
tCPH CS Deselect Time 20 ms
tIW INC to VW Change 100 500 µs
tCYC INC Cycle Time 4 µs
tR, tF(5) INC Input Rise and Fall Time 500 µs
tPU(5) Power-up to Wiper Stable 500 µs
tR VCC VCC Power-up Rate 0.2 50 mV/µs
CS
INC
U/D
VW
tCI
tIH
tCYC
tID tDI
tIW
MI (6)
tIC tCPH
tFtR
10%
90% 90%
tIL
X9314
7FN8178.2
September 5, 2006
X9314
Mini Small Outline Plastic Packages (MSOP)
NOTES:
1. These package dimensions are within allowable dimensions of
JEDEC MO-187BA.
2. Dimensioning and tolerancing per ANSI Y14.5M-1994.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs and are measured at Datum Plane. Mold flash, protrusion
and gate burrs shall not exceed 0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions
and are measured at Datum Plane. Interlead flash and
protrusions shall not exceed 0.15mm (0.006 inch) per side.
5. Formed leads shall be planar with respect to one another within
0.10mm (0.004) at seating Plane.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Datums and to be determined at Datum plane
.
11. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are for reference only.
L
0.25
(0.010)
L1
R1
R
4X θ
4X θ
GAUGE
PLANE
SEATING
PLANE
EE1
N
12
TOP VIEW
INDEX
AREA
-C-
-B-
0.20 (0.008) ABC
SEATING
PLANE
0.20 (0.008) C
0.10 (0.004) C
-A-
-H-
SIDE VIEW
b
e
D
A
A1
A2
-B-
END VIEW
0.20 (0.008) CD
E1
C
L
C
a
- H -
-A - - B -
- H -
M8.118 (JEDEC MO-187AA)
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.037 0.043 0.94 1.10 -
A1 0.002 0.006 0.05 0.15 -
A2 0.030 0.037 0.75 0.95 -
b 0.010 0.014 0.25 0.36 9
c 0.004 0.008 0.09 0.20 -
D 0.116 0.120 2.95 3.05 3
E1 0.116 0.120 2.95 3.05 4
e 0.026 BSC 0.65 BSC -
E 0.187 0.199 4.75 5.05 -
L 0.016 0.028 0.40 0.70 6
L1 0.037 REF 0.95 REF -
N8 87
R 0.003 - 0.07 - -
R1 0.003 - 0.07 - -
05
o15o5o15o-
α0o6o0o6o-
Rev. 2 01/03
8FN8178.2
September 5, 2006
X9314
Small Outline Plastic Packages (SOIC)
INDEX
AREA E
D
N
123
-B-
0.25(0.010) C AMBS
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45°
C
H0.25(0.010) BM M
α
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.0532 0.0688 1.35 1.75 -
A1 0.0040 0.0098 0.10 0.25 -
B 0.013 0.020 0.33 0.51 9
C 0.0075 0.0098 0.19 0.25 -
D 0.1890 0.1968 4.80 5.00 3
E 0.1497 0.1574 3.80 4.00 4
e 0.050 BSC 1.27 BSC -
H 0.2284 0.2440 5.80 6.20 -
h 0.0099 0.0196 0.25 0.50 5
L 0.016 0.050 0.40 1.27 6
N8 87
α0° 8° 0° 8° -
Rev. 1 6/05
9
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No lice nse is gran t ed by i mpli catio n or other wise u nder an y p a tent or patent rights of Intersil or its subsidiari es.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN8178.2
September 5, 2006
X9314
Plastic Dual-In-Line Packages (PDIP)
MDP0031
PLASTIC DUAL-IN-LINE PACKAGE
SYMBOL PDIP8 PDIP14 PDIP16 PDIP18 PDIP20 TOLERANCE NOTES
A 0.210 0.210 0.210 0.210 0.210 MAX
A1 0.015 0.015 0.015 0.015 0.015 MIN
A2 0.130 0.130 0.130 0.130 0.130 ±0.005
b 0.018 0.018 0.018 0.018 0.018 ±0.002
b2 0.060 0.060 0.060 0.060 0.060 +0.010/-0.015
c 0.010 0.010 0.010 0.010 0.010 +0.004/-0.002
D 0.375 0.750 0.750 0.890 1.020 ±0.010 1
E 0.310 0.310 0.310 0.310 0.310 +0.015/-0.010
E1 0.250 0.250 0.250 0.250 0.250 ±0.005 2
e 0.100 0.100 0.100 0.100 0.100 Basic
eA 0.300 0.300 0.300 0.300 0.300 Basic
eB 0.345 0.345 0.345 0.345 0.345 ±0.025
L 0.125 0.125 0.125 0.125 0.125 ±0.010
N 8 14 16 18 20 Reference
Rev. B 2/99
NOTES:
1. Plastic or metal protrusions of 0.010” maximum per side are not included.
2. Plastic interlead protrusions of 0.010” maximum per side are not included.
3. Dimensions E and eA are measured with the leads constrained perpendicular to the seating plane.
4. Dimension eB is measured with the lead tips unconstrained.
5. 8 and 16 lead packages have half end-leads as shown.
D
L
A
eb
A1
NOTE 5
A2
SEATING
PLANE
L
N
PIN #1
INDEX
E1
12 N/2
b2
E
eB
eA
c
