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© 2011-2012 by RF Monolithics, Inc. DNT24A - 08/01/12
DNT24CA
DNT24PA
Rating Value Units
Power Supply Input -0.5 to +6.5 V
All Input/Output Pins -0.5 to +3.3 V
Input Power to RFIO Port 0 dBm
Non-Operating Ambient Temperature Range -40 to +85 oC
DNT24CA/PA Absolute Maximum Ratings
DNT24CA/PA Electrical Characteristics
Characteristic Sym Notes Minimum Typical Maximum Units
Operating Frequency Range 2406 2475 MHz
Hop Duration 1 8 100 ms
Number of RF Channels 1 15 or 24
Modulation FSK
RF Data Transmission Rate 250 kbps
Receiver Sensitivity @ 10-5 BER -100 dBm
Transmitter RF Output Power 1 10 or 63 mW
Antenna Dielectric Chip Antenna
System Topologies Point-to-Point, Point-to-Multipoint,
Peer-to-Peer and Store & Forward
Access Scheme Ad Hoc TDMA
Low Cost
2.4 GHz FHSS
Transceiver
Modules with
I/O
The DNT24CA and DNT24PA FHSS transceiver modules provide a low-cost, versatile solu-
tion for wireless data communications in the 2.4 GHz ISM band. The RF output power can be
set at 10 or 63 mW. The modules include analog, digital and serial I/O, providing the flexibility
to serve applications ranging from cable replacements to sensor networks. The built-in chip
antenna makes these modules very easy to integrate.
2.4 GHz Frequency Hopping Spread Spectrum Transceiver
Point-to-point, Point-to-multipoint, Peer-to-peer and
Store & Forward Capabilities
Transmitter RF Power Configurable - 10 or 63 mW
Built-in Chip Antenna
250 kbps RF Data Rate
Serial Port Data Rate up to 250 kbps, SPI Port Data Rate up to 500 kbps
128-Bit AES Encryption
Separate Serial Port for Diagnostics
Analog and Digital I/O for Sensor Applications
FCC, Canadian IC and ETSI Certified for Unlicensed Operation
Notes:
1. The DNT24CA and DNT24PA achieve regulatory certification under FHSS rules.
2. Maximum sleep current occurs at +85 oC.
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© 2011-2012 by RF Monolithics, Inc. DNT24A - 08/01/12
Characteristic Sym Notes Minimum Typical Maximum Units
ADC Input Range 0 2.7 V
ADC Input Resolution 12 bits
ADC Sample Rate 100 Hz
Signal Source Impedance for ADC Reading 10 KΩ
ADC External Reference Voltage Range 1.0 2.7 V
DAC Output Range 0 3.3 V
DAC Output Resolution 12 bits
Primary and Diagnostic Serial Port Baud Rates 1.2, 2.4, 4.8, 9.6, 14.4, 19.2, 28.8,
38.4, 57.6, 115.2, 230.4, 250.0 kbps
Serial Peripheral Interface Data Rate 125 500 kbps
Digital I/O:
Logic Low Input Level -0.5 0.8 V
Logic High Input Level 2.45 3.3 V
Logic Input Internal Pull-up Resistor 20 KΩ
Power Supply Voltage Range VCC +3.3 +5.5 Vdc
Power Supply Voltage Ripple 10 mVP-P
Peak Transmit Mode Current, 63 mW Output 140 mA
Average Operating Receive Current:
Base and Remote, Continuous Data Stream 55 mA
Remote, Linked, No Data Transmission 15 mA
Sleep Current 2 3 6 µA
DNT24CA Mounting Reflow Soldering
DNT24PA Mounting Socket
Operating Temperature Range -40 85 oC
Operating Relative Humidity Range, Non-condensing 10 90 %
DNT24CA/PA Electrical Characteristics
CAUTION: Electrostatic Sensitive Device. Observe precautions when handling.
DNT24CA/PA Hardware
The major components of these modules include a
2.4 GHz FHSS transceiver and a low current 8-bit
microcontroller. These modules operate in the 2.4
GHz ISM band. There are 12 selectable hopping pat-
terns providing compatibility with frequency allocations
in most regions of the world. The modules also have
two selectable RF output power levels: 10 mW and
63 mW.
The DNT24CA/PA provide a variety of hardware inter-
faces. There are two serial ports plus one SPI port. Ei-
ther the primary serial port or the SPI port can be
selected for data communications. The second serial
port is dedicated to diagnostics. The primary and diag-
nostic serial ports support most standard baud rates
up to 250.0 kbps. The SPI port supports data rates up
to 500 kbps. These modules also include three ADC
inputs, two DAC outputs, and six general-purpose digi-
tal I/O ports. Four of the digital I/O ports support an
optional interrupt-from-sleep mode when configured
as inputs. The DNT24CA is designed for solder reflow
mounting. The DNT24PA is designed for plug-in con-
nector mounting.
DNT24CA/PA Firmware
DNT24CA/PA firmware operates using hybrid Ad Hoc
TDMA channel access optimized for periodic burst
transmissions. DNT24CA/PA firmware operates “out
of the box” using point-to-point transparent serial
mode, with point-to-multipoint, peer-to-peer and store
& forward system topologies also supported.
The firmware provides the user with a rich set of con-
figuration options including a choice of hopping pat-
terns, hopping dwell times, serial and/or SPI data port
operation, serial and SPI data rate selection, RF out-
put power selection, plus configurable analog and digi-
tal I/O lines.
Data integrity is protected by 24-bit error detection,
with optional ACK and automatic transmission retries
or redundant transmissions. 128-bit AES encryption
provides a high level of data security for sensitive
applications. Sensor networks can take advantage of
timer or event-based data reporting and remote node
sleep cycling for extended battery life.
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© 2011-2012 by RF Monolithics, Inc. DNT24A - 08/01/12
1 8 1 9 2 0 2 1 2 2 2 31 71 6 2 4 2 5 2 6
1 5
1 4
1 3
1 2
1 1
1 0
9
8
7
6
5
D N T 2 4 C A / D N T 2 4 P A B l o c k D i a g r a m
2 7
M i c r o c o n t r o l l e r
4
3
2
1
R e g
G N D
A C T ( D I A G _ T X )
/ D C D ( D I A G _ R X )
G P I O 0
R A D I O _ T X D
R A D I O _ R X D
G P I O 4 ( / H O S T _ C T S )
G P I O 5 ( / H O S T _ R T S )
D A C 0
G P I O 2
G P I O 1
G P I O 3 ( D A V )
D A C 1
V C C
G N D
G N D
/ R E S E T
ADC1
M I S O
M O S I
/ S S
S C L K
3 . 3 V _ O U T
A D C _ E X T _ R E F
ADC0
+ 3 . 3 V
2 8 2 9 3 0
G N D
G N D
R S V D
2 . 4 G H z
T r a n s c e i v e r
I R Q 0
I R Q 1 / D C L K
D A T A
P L L _ L O C K
S C K
S D I
S D O
n S S _ D A T A
n S S _ C O N F I G
R S V D
R S V D
R F I O
T / R
T / R
P W R
P R E
F i l t e r
C h i p
A n t e n n a
Figure 1
Pin Name I/O Description
1GND - Power supply and signal ground. Connect to the host circuit board ground.
2ACT
(DIAG_TX)
O
(O)
This pin’s default configuration is data activity output. On a base, this signal blinks when a valid packet is
received. On a remote, this signal blinks when a packet is transmitted. On a router, this signal blinks when
a valid upstream packet is received or a downstream packet is transmitted. Alternate pin function is the di-
agnostic serial port output.
3/DCD
(DIAG_RX)
O
(I)
This pin’s default configuration is data carrier detect output. On a base, this signal is asserted when any
valid packet is received, and is cleared if no packets are heard for the configured router/remote registra-
tion time-out interval. On a router or remote, this signal is asserted when the radio obtains hopping pattern
synchronization, and remains asserted until no beacons are heard for 50 hops. Alternate pin function is
the diagnostic serial port input.
4GPIO0 I/O
Configurable digital I/O port 0. When configured as an input, an internal pull-up resistor can be selected
and direct interrupt from sleep can be invoked. When configured as an output, the power-on state is
configurable. In sleep mode the pin direction, input pull-up selection or output state are also separately
configurable.
5 RADIO_TXD O Serial data output from the radio.
6RADIO_RXD I Serial data input to the radio.
7GPOI4
(/HOST_CTS)
I/O
(O)
Default pin function is GPIO4 with the same configuration options as GPIO0. Alternate pin function is
UART/SPI flow control output. The module sets this line low when it is ready to accept data from the host
on the RADIO_RXD or MOSI input. When the line goes high, the host must stop sending data.
8GPOI5
(/HOST_RTS)
I/O
(I)
Default pin function is GPIO5 with the same configuration options as GPIO0. Alternate pin function is
UART/SPI flow control input. The host sets this line low to allow data to flow from the module on
the RADIO_TXD pin. When the host sets this line high, the module will stop sending data to the host.
9DAC0 O 12-bit DAC 0 output. Full scale output can be referenced to the voltage at pin 25 or the 3.3 V regulated
module bus voltage.
10 GPIO2 I/O Configurable digital I/O port 2. Same configuration options as GPIO0.
11 GPIO1 I/O Configurable digital I/O port 1. Same configuration options as GPIO0.
12 GPIO3
(DAV)
I/O
(O)
Default pin function is GPIO3 with the same configuration options as GPIO0. When SPI slave mode oper-
ation is enabled, a logic high on this pin indicates when data is available to be clocked out by the SPI
master.
13 DAC1 O 12-bit DAC 1 output. Same specifications and configuration options as DAC0.
14 VCC I Power supply input, +3.3 to +5.5 Vdc.
15 GND -Power supply and signal ground. Connect to the host circuit board ground.
16 GND -Power supply and signal ground. Connect to the host circuit board ground.
17 /RESET I Active low module hardware reset.
18 ADC0 I
ADC input 0. This pin is a direct ADC input when the ADC is operating in single-ended mode, or the differ-
ential negative input for positive inputs applied to ADC1 or ADC2 when the ADC is operating in differential
mode. Full-scale reading can be referenced to Pin 25 for ratiometric measurements. For absolute mea-
surements, the ADC can use either the regulated supply voltage divided by 1.6 (about 2.06 V), or an ex-
ternal voltage applied to Pin 25. In single-ended mode, ADC measurements are 11-bit unsigned values
with full scale nominally 2.7 V when referenced to a 2.7 V input on Pin 27. In differential mode, ADC mea-
surements are 12-bit signed values.
19 ADC1 IADC input 1. Direct input when the ADC is operating in single-ended mode, positive differential input rela-
tive to ADC0 when the ADC is operating in differential mode.
20 MISO I/O This pin is the SPI master mode input or slave mode output.
21 MOSI I/O This pin is the SPI master mode output or slave mode input.
22 /SS I/O SPI active low slave select. This pin is an output when the module is operating as a master, and an input
when it is operating as a slave.
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© 2011-2012 by RF Monolithics, Inc. DNT24A - 08/01/12
DNT24CA/PA I/O Descriptions
Pin Name I/O Description
23 SCLK I/O SPI clock signal. This pin is an output when operating as a master, and an input when operating as
a slave.
24 ADC2 IADC input 2. Direct input when the ADC is operating in single-ended mode, positive differential input rela-
tive to ADC0 when the ADC is operating in differential mode.
25 ADC_EXT_
REF I/O
ADC external reference voltage pin. The voltage at this pin can be used by the ADCs as a reference for
ratiometric measurements. With no external voltage or load applied, this pin presents a nominal 2.7 V out-
put through a 2.126 K source resistance. A low impedance external reference voltage in the range of 1 to
2.7 V may be applied to this pin as an option.
26 RSVD -Reserved pin. Leave unconnected.
27 RSVD -Reserved pin. Leave unconnected.
28 GND -Connect to the host circuit board ground plane.
29 RSVD -Reserved pin. Leave unconnected.
30 GND - Connect to the host circuit board ground plane.
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© 2011-2012 by RF Monolithics, Inc. DNT24A - 08/01/12
1 . 5 0 0
( 3 8 . 1 0 )
0 . 9 8 0
( 2 4 . 9 0 )
D N T 2 4 C A O u t l i n e a n d M o u n t i n g D i m e n s i o n s
0 . 0 5 0 ( 1 . 2 7 )
1
T o p V i e w
0 . 1 2 5
( 3 . 1 8 )
1 5
1 6 3 0
D i m e n s i o n s i n i n c h e s ( m m )
0 . 4 5 0 ( 1 1 . 4 0 ) 0 . 3 5 0 ( 8 . 8 9 )
A n t e n n a
Figure 4
0 . 0 6 0 ( 1 . 5 2 )
1 . 5 0 0 ( 3 8 . 1 0 )
0 . 9 8 0
( 2 4 . 9 0 )
D N T 2 4 C A S o l d e r P a d D i m e n s i o n s
0 . 0 5 0 ( 1 . 2 7 )
1
T o p V i e w
1 5
1 6 3 0
D i m e n s i o n s i n i n c h e s ( m m )
0 . 0 3 5 ( 0 . 8 9 )
1 . 0 4 0
( 2 6 . 4 2 )
Figure 5
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© 2011-2012 by RF Monolithics, Inc. DNT24A - 08/01/12
0.980
( 2 4 . 9 )
0.050
( 1 . 2 7 )
0.700
( 1 7 . 8 )
0.100
( 2 . 5 4 )
0.800
( 2 0 . 3 )
D N T 2 4 P A I n t e r f a c e C o n n e c t o r
P C B L a y o u t D e t a i l
C o n n e c t o r s a r e S A M T E C
S L M - 1 1 5 - 0 1 - G - S
o r E q u i v a l e n t
D i m e n s i o n s a r e i n i n c h e s ( m m )
Figure 7
Note: Specifications subject to change without notice.
Part # M-0024-0000, Rev B
0 . 0 6 0
( 1 . 5 2 )
1 . 5 0 0
( 3 8 . 1 0 )
1 . 1 0 0
( 2 7 . 9 4 )
D N T 2 4 P A O u t l i n e a n d M o u n t i n g D i m e n s i o n s
0 . 0 5 0 ( 1 . 2 7 )
1
T o p V i e w
0 . 1 2 5
( 3 . 1 8 )
1 5
1 6 3 0
D i m e n s i o n s i n i n c h e s ( m m )
0 . 4 5 0 ( 1 1 . 4 3 )
0 . 2 2 5
( 5 . 7 2 )
0 . 9 8 0
( 2 4 . 9 0 )
0 . 3 5 0 ( 8 . 8 9 )
A n t e n n a
Figure 6
