FEATURES
DLOW OFFSET VOLTAGE: 5µV (max)
DZERO DRIFT: 0.05µV/°C max
DQUIESCENT CURRENT: 750µA (max)
DSINGLE-SUPPLY OPERATION
DLOW BIAS CURRENT: 200pA (max)
DSHUTDOWN
DMicroSIZE PACKAGES
DWIDE SUPPLY RANGE: 2.7V to 12V
APPLICATIONS
DTRANSDUCER APPLICATIONS
DTEMPERATURE MEASUREMENTS
DELECTRONIC SCALES
DMEDICAL INSTRUMENTATION
DBATTERY-POWERED INSTRUMENTS
DHANDHELD TEST EQUIPMENT
DESCRIPTION
The OPA734 and OPA735 series of CMOS operational
amplifiers use auto-zeroing techniques to simultaneously
provide low offset voltage (5µV max) and near-zero drift
over time and temperature. These miniature, high-preci-
sion, low quiescent current amplifiers offer high input
impedance and rail-to-rail output swing within 50mV of t h e
rails. Either single or bipolar supplies can be used in the
range of +2.7V to +12V (±1.35V to ±6V). They are
optimized for low-voltage, single-supply operation.
The OPA734 family includes a shutdown mode. Under
logic control, the amplifiers can be switched from normal
operation to a standby current that is 9µA (max) and the
output placed in a high-impedance state.
The single version is available in the MicroSIZE SOT23-5
(SOT23-6 for shutdown version) and the SO-8 packages.
The dual version is available in the MSOP-8 and SO-8
packages (MSOP-10 only for the shutdown version). All
versions are specified for operation from −40°C to +85°C.
1/2
OPA2735
R3
10kΩ
R3
10kΩ
R1
1kΩ
1/2
OPA2735
R2
1kΩ
C4
1nF
C4
1nF
RG
10V
C1
1nF
C2
10nF
C3
1nF
VREF = 15V
REF102 G=1+2 R3
RG
OPA734, OPA2734
OPA735, OPA2735
SBOS282B − DECEMBER 2003 − REVISED FEBRUARY 2005
0.05µV/°C max, SINGLE-SUPPLY CMOS
OPERATIONAL AMPLIFIERS
Zer∅-Drift Series
! !
www.ti.com
Copyright 2003-2005, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
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2
ABSOLUTE MAXIMUM RATINGS(1)
Supply Voltage +13.2V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Signal Input Terminals, Voltage(2) (V−) − 0.5V to (V+) + 0.5V. . . . . . . . . . .
Current(2) ±10mA. . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Short Circuit(3) Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Temperature −40°C to +150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature −65°C to +150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Junction Temperature +150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead Temperature (soldering, 10s) +300°C. . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD Rating (Human Body Model), OPA734 1000V. . . . . . . . . . . . . . . . . . . .
ESD Rating (Human Body Model), OPA735, OPA2734, OPA2735 2000V. . . .
(1) Stresses above these ratings may cause permanent damage. Exposure
to absolute maximum conditions for extended periods may degrade
device reliability. These are stress ratings only, and functional operation of
the device at these or any other conditions beyond those specified is not
implied.
(2) Input terminals are diode-clamped to the power-supply rails. Input signals
that can swing more than 0.5V beyond the supply rails should be current
limited to 10mA or less.
(3) Short-circuit to ground, one amplifier per package.
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
PACKAGE/ORDERING INFORMATION(1)
PRODUCT PACKAGE-LEAD PACKAGE
DESIGNATOR
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING ORDERING
NUMBER TRANSPORT MEDIA,
QUANTITY
Shutdown Version
OPA734 SOT23-6 DBV −40°C to +85°C NSB OPA734AIDBVT Tape and Reel, 250
″ ″ ″ ″ ″ OPA734AIDBVR Tape and Reel, 3000
OPA734 SO-8 D −40°C to +85°C OPA734A OPA734AID Rails, 100
″ ″ ″ ″ ″ OPA734AIDR Tape and Reel, 2500
OPA2734 MSOP-10 DGS −40°C to +85°C BGO OPA2734AIDGST Tape and Reel, 250
″ ″ ″ ″ ″ OPA2734AIDGSR Tape and Reel, 2500
Non-Shutdown Version
OPA735 SOT23-5 DBV −40°C to +85°C NSC OPA735AIDBVT Tape and Reel, 250
″ ″ ″ ″ ″ OPA735AIDBVR Tape and Reel, 3000
OPA735 SO-8 D −40°C to +85°C OPA735A OPA735AID Rails, 100
″ ″ ″ ″ ″ OPA735AIDR Tape and Reel, 2500
OPA2735 SO-8 D −40°C to +85°C OPA2735A OPA2735AID Rails, 100
″ ″ ″ ″ ″ OPA2735AIDR Tape and Reel, 2500
OPA2735 MSOP-8 DGK −40°C to +85°C BGN OPA2735AIDGKT Tape and Reel, 250
″ ″ ″ ″ ″ OPA2735AIDGKR Tape and Reel, 2500
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com.
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3
ELECTRICAL CHARACTERISTICS: VS = ±5V (VS = +10V)
Boldface limits apply over the specified temperature range, TA = −40°C to +85°C.
At TA = +25°C, RL = 10kΩ connected to VS/2, and VOUT = VS/2, unless otherwise noted.
OPA734, OPA2734, OPA735, OPA2735
PARAMETER CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE
Input Offset Voltage VOS 1 5 µV
vs Temperature dVOS/dT 0.01 0.05 µV/°C
vs Power Supply PSRR VS = 2.7V to 12V, VCM = 0V 0.2 1.8 µV/V
Long-Term Stability Note (1)
Channel Separation, dc 0.1 µV/V
INPUT BIAS CURRENT
Input Bias Current IBVCM = VS/2 ±100 ±200 pA
over Temperature See Typical Characteristics pA
Input Offset Current IOS VCM = VS/2 ±200 ±300 pA
NOISE
Input Voltage Noise, f = 0.01Hz to 1Hz en0.8 µVPP
Input Voltage Noise, f = 0.1Hz to 10Hz en2.5 µVPP
Input Voltage Noise Density , f = 1kHz en135 nV/√Hz
Input Current Noise Density, f = 1kHz in40 fA/√Hz
INPUT VOLTAGE RANGE
Common-Mode Voltage Range VCM (V−) − 0.1 (V+) − 1.5 V
Common-Mode Rejection Ratio CMRR (V−) − 0.1V < VCM < (V+) − 1.5V 115 130 dB
INPUT CAPACITANCE
Differential 2 pF
Common-Mode 10 pF
OPEN-LOOP GAIN
Open-Loop Voltage Gain AOL (V−) + 100mV < VO < (V+) − 100mV 115 130 dB
FREQUENCY RESPONSE
Gain-Bandwidth Product GBW 1.6 MHz
Slew Rate SR G = +1 1.5 V/µs
OUTPUT
Voltage Output Swing from Rail RL = 10kΩ20 50 mV
Short-Circuit Current ISC ±20 mA
Open-Loop Output Impedance f = 1MHz, IO = 0 125 Ω
Capacitive Load Drive CLOAD See Typical Characteristics
ENABLE/SHUTDOWN
tOFF 1.5 µs
tON(2) 150 µs
VL (amplifier is shutdown) V− (V−) + 0.8 V
VH (amplifier is active) (V−) + 2 V+ V
IQSD (per amplifier) 4 9 µA
Input Bias Current of Enable Pin 3µA
POWER SUPPLY
Operating Voltage Range VS2.7 to 12
(±1.35 to ±6) V
Quiescent Current (per amplifier) IQIO = 0 0.6 0.75 mA
TEMPERATURE RANGE
Specified Range −40 +85 °C
Operating Range −40 +150 °C
Storage Range −65 +150 °C
Thermal Resistance qJA °C/W
SOT23-5, SOT23-6 200 °C/W
MSOP-8, MSOP-10, SO-8 150 °C/W
(1) 300-hour life test at 150°C demonstrated randomly distributed variation in the range of measurement limits—approximately 1µV.
(2) Device requires one complete auto-zero cycle to return to VOS accuracy.
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4
PIN CONFIGURATIONS
1
2
3
5
4
V+
−IN
Out
V−
+IN
OPA735
SOT23−5
1
2
3
4
8
7
6
5
Enable
V+
OUT
NC(1)
NC(1)
−IN
+IN
V−
OPA734
SO−8
1
2
3
4
5
10
9
8
7
6
V+
OUT B
−IN B
+IN B
Enable B
OUT A
−IN A
+IN A
V−
Enable A
OPA2734
MSOP−10
(1) NC = No Connection
(2) Pin 1 of the SOT23-6 is determined by orienting the package marking as shown in the diagram.
1
2
3
4
8
7
6
5
V+
OUT B
−IN B
+IN B
OUT A
−IN A
+IN A
V−
OPA2735
SO−8, MSOP−8
1
2
3
6
5
4
V+
Enable
−IN
Out
V−
+IN
OPA734
SOT23−6(2)
NSB
1
2
3
4
8
7
6
5
NC(1)
V+
OUT
NC(1)
NC(1)
−IN
+IN
V−
OPA735
SO−8
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5
TYPICAL CHARACTERISTICS
At TA = +25°C, VS = ±5V (same as +10V).
OUTPUT VOLTAGE PRODUCTION DISTRIBUTION
Offset Voltage (µV)
Population
−5.0
−4.5
−4.0
−3.5
−3.0
−2.5
−2.0
−1.5
−1.0
−0.5
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
OUTPUT VOLTAGE DRIFT PRODUCTION DISTRIBUTION
Offset Voltage Drift (µV/_C)
Population
0
0.005
0.010
0.015
0.020
0.025
0.030
0.035
0.040
0.045
0.050
Absolute Value;
Centered Around Zero
6
4
2
0
−2
−4
−6
OUTPUT VOLTAGE SWING TO RAIL
vs OUTPUT CURRENT
Output Current (mA)
VOUT Voltage Swing (V)
0 5 10 15 20 25 30 35
−40_C
+85_C+25_C
1000
0
−1000
−2000
−3000
−4000
−5000
−6000
−7000
−8000
−9000
−10000
INPUT BIAS CURRENT vs TEMPERATURE
Temperature (_C)
Input Bias Current (pA)
−50 −250 255075100125
−IB+IB
85
VCM =V
−
10 Representative Units
1000
800
600
400
200
0
−200
−400
−600
−800
−1000
INPUT BIAS CURRENT vs TEMPERATURE
Temperature (_C)
Input Bias Current (pA)
−50 −25 0 25 50 75 100 125
−IB
+IB
85
VCM =V
S/2
10 Representative Units
800
600
400
200
0
SUPPLY CURRENT vs TEMPERATURE
Temperature (_C)
Supply Current(µA)
−50 −25 0 25 50 75 100 125
±1.35V
±6V
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6
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±5V (same as +10V).
OPEN−LOOP GAIN AND PHASE MARGIN
vs FREQUENCY
AOL (dB)
Phase Margin (_)
Frequency (Hz)
180
160
140
120
100
80
60
40
20
0
−20
−40
180
160
140
120
100
80
60
40
20
0
−20
−40
0.1 100 1k 10k 100k 1M1 10 10M
LARGE−SIGNAL RESPONSE
Time (5µs/div)
Output Voltage (2V/div)
SMALL−SIGNAL RESPONSE
Time (250ns/div)
Output Voltage (10mV/div)
POSITIVE OVERVOLTAGE RECOVERY
Time (2.5µs/div)
Voltage (2V/div)
Input
Output
OPA735
+5V
−5V
10kΩ
10kΩ
NEGATIVE OVERVOLTAGE RECOVERY
Time (2.5µs/div)
Voltage (2V/div)
Input
Output
OPA735
+5V
−5V
10kΩ
10kΩ
COMMON−MODE REJECTION RATIO vs FREQUENCY
CMRR (dB)
Frequency (Hz)
140
120
100
80
60
40
20
011k 10k 100k 1M10 100 10M
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7
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = ±5V (same as +10V).
POWER−SUPPLY REJECTION RATIO vs FREQUENCY
PSRR (dB)
Frequency (Hz)
160
140
120
100
80
60
40
20
011k 10k 100k10 100 1M
+PSRR
−PSRR
VOLTAGE NOISE vs FREQUENCY
Frequency (Hz)
1k
100
10 1 1k 10k10 100 100k
Noise (nV/√Hz)
0.1Hz TO 10Hz NOISE
1s/div
1µV/div
20.0
19.5
19.0
18.5
18.0
17.5
17.0
16.5
16.0
SAMPLING FREQUENCY vs TEMPERATURE
Temperature (_C)
Sampling Frequency (kHz)
−50 −25 0 25 50 75 100 125 150
VS=12V
VS=2.7V
50
40
30
20
10
0
SMALL−SIGNAL OVERSHOOT vs CAPACITIVE LOAD
Capacitance (pF)
Overshoot (%)
1101001000
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8
APPLICATIONS INFORMATION
The OPA734 and OPA735 series of op amps are
unity-gain stable and free from unexpected output phase
reversal. They use auto-zeroing techniques to provide lo w
offset voltage and demonstrate very low drift over time and
temperature.
Good layout practice mandates the use of a 0.1µF
capacitor placed closely across the supply pins.
For lowest offset voltage and precision performance,
circuit layout and mechanical conditions should be
optimized. Avoid temperature gradients that create
thermoelectric (Seebeck) effects in thermocouple
junctions formed from connecting dissimilar conductors.
These thermally-generated potentials can be made to
cancel by assuring that they are equal on both input
terminals:
1. Use low thermoelectric-coefficient connections
(avoid dissimilar metals).
2. Thermally isolate components from power supplies
or other heat sources.
3. Shield op amp and input circuitry from air currents
such as cooling fans.
Following these guidelines will reduce the likelihood of
junctions being at dif ferent temperatures, which can cause
thermoelectric voltages of 0.1µV/°C or higher, depending
on the materials used.
OPERATING VOLTAGE
The OPA734 and OPA735 op amp family operates with a
power-supply range of +2.7V to +12V (±1.35V to ±6V).
Supply voltages higher than +13.2V (absolute maximum)
can permanently damage the amplifier. Parameters that
vary over supply voltage or temperature are shown in the
Typical Characteristics section of this data sheet.
OPA734 ENABLE FUNCTION
The enable/shutdown digital input is referenced to the V−
supply voltage of the op amp. A logic HIGH enables the op
amp. A valid logic HIGH is defined as > (V−) + 2V. The valid
logic HIGH signal can be up to the positive supply,
independent of the negative power supply voltage. A valid
logic LOW is defined as < 0.8V above the V− supply pin.
If dual or split power supplies are used, be sure that logic
input signals are properly referred to the negative supply
voltage. The Enable pin is connected to internal pull-up
circuitry and will enable the device if this pin is left open
circuit.
The logic input is a CMOS input. Separate logic inputs are
provided for each op amp on the dual version. For
battery-operated applications, this feature can be used to
greatly reduce the average current and extend battery life.
The enable time is 150µs, which includes one full
auto-zero cycle required by the amplifier to return to VOS
accuracy. Prior to returning to full accuracy, the amplifier
may function properly, but with unspecified offset voltage.
Disable time is 1.5µs. When disabled, the output assumes
a high-impedance state. The disable state allows the
OPA734 to b e operated as a gated amplifier, or to have the
output multiplexed onto a common analog output bus.
INPUT VOLTAGE
The input common-mode range extends from (V−) − 0.1V
to (V+) − 1.5V. For normal operation, the inputs must be
limited to this range. The common-mode rejection ratio is
only valid within the specified input common-mode range.
A lower supply voltage results in lower input common-
mode range; therefore, attention to these values must be
given when selecting the input bias voltage. For example,
when operating on a single 3V power supply, common-
mode range is from 0.1V below ground to half the
power-supply voltage.
Normally, input bias current is approximately 100pA;
however, input voltages exceeding the power supplies can
cause excessive current to flow in or out of the input pins.
Momentary voltages greater than the power supply can be
tolerated if the input current is limited to 10mA. This is
easily accomplished with an input resistor, as shown in
Figure 1.
50ΩOPA735
+5V
VIN
VOUT
10mA max
IOVERLOAD
Current−limited resistor required
if input voltage exceeds supply
rails by ≥0.5V.
Figure 1. Input Current Protection
INTERNAL OFFSET CORRECTION
The OPA734 and OPA735 series of op amps use an
auto-zero topology with a time-continuous 1.6MHz op amp
in the signal path. This amplifier is zero-corrected every
100µs using a proprietary technique. Upon power-up, the
amplifier requires one full auto-zero cycle of approximately
100µs in addition to the start-up time for the bias circuitry
to achieve specified VOS accuracy. Prior to this time, the
amplifier may function properly but with unspecified offset
voltage.
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9
Low-gain (< 20) operation demands that the auto-zero
circuitry correct for common-mode rejection errors of the
main amplifier. Because these errors can be larger than
0.1% of a full-scale input step change, one calibration
cycle (100µs) can be required to achieve full accuracy.
The term clock feedthrough describes the presence of the
clock frequency in the output spectrum. In auto-zeroed op
amps, clock feedthrough may result from the settling of the
internal sampling capacitor, or from the small amount of
charge injection that occurs during the sample-and-hold of
the op amp of fset voltage. Feedthrough can be minimized
by keeping the source impedance relatively low (< 1kΩ)
and matching the source impedance on both input
terminals. If the source resistance is high (> 1kΩ)
feedthrough can generally be reduced with a capacitor of
1nF or greater in parallel with the source or feedback
resistors. See the circuit application examples.
LAYOUT GUIDELINES
Attention to good layout practices is always recom-
mended. Keep traces short. When possible, use a PCB
ground plane with surface-mount components placed as
close to the device pins as possible. Place a 0.1µF
capacitor closely across the supply pins. These guidelines
should be applied throughout the analog circuit to improve
performance and provide benefits such as reducing the
electromagnetic-interference (EMI) susceptibility.
R1
VEX
VOUT
VREF
R1
OPA734
R
R
RR +10V
1nF
1nF
Figure 2. Single Op Amp Bridge Amplifier Circuit
1/2
OPA2735
R3
10kΩ
R3
10kΩ
R1
1kΩ
1/2
OPA2735
R2
1kΩ
C4
1nF
C4
1nF
RG
10V
C1(1)
1nF
C2(1)
10nF
C3(1)
1nF
VREF = 15V
2
4
6
REF102
NOTE: (1) Place close to input pins.
R
R
RR
G=1+2 R3
RG
Figure 3. Differential Output Bridge Amplifier
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10
VIN VREF R1R2
±10V 5V 42.2kΩ14.7kΩ
±5V 5V 20.8kΩ19.6kΩ
0V to 10V 5V 20.8kΩ5.11kΩ
0V to 5V 5V 10.5kΩ10kΩ
Figure 4. Driving ADC
R4
10kΩ
R3
6.8kΩ
R1
22kΩ
TPS434 Thermopile
R5
1.5MΩ
+5V R7
10kΩ
R8
10kΩ
R2
1kΩ
OPA735
C2
100nF
C3
1µF
−5V
R9
10kΩ
+5V
1/2
OPA2703
C4
1µF
−5V
R6
11kΩ
+5V
1/2
OPA2703
−5V
−5V
REF1112
VOUT
NOTE: The TPS434, by Perkin Elmer Optoelectronics, is a thermopile detector
with integrated thermistor for cold−junction reference.
Figure 5. Thermopile Non-Contact Surface Temperature Measurement
ADS8342
ADS8325
ADS1100
VIN
VREF
R4= 10kΩ
R3
10kΩ
C1
1nF
CF
500pF
0.1V to 4.9V
RF
300Ω
R2
R1
C2= 1nF
Optional filter for use
with SAR−type
converters
operating at
sampling rates of
50kHz and below.
+5V
OPA735
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11
R1
536kΩ
R1
536kΩ
R3
268kΩ
OPA735
C1
5nF C2
5nF
C3
10nF
VOUT
+5V
−5V
fn=1
2πRC ;whereR=R
1=R
2=2R
3
C=C
1=C
2=C
3/2
(fn= 60Hz for values shown)
Figure 6. Twin-T Notch Filter
NOTE: FilterPro is a low-pass filter design program available for download at no cost from TI’s web site (www.ti.com).
The program can be used to easily determine component values for other cutoff frequencies or filter types.
68.0nF
C2
C3
6.80nF
R3
20.8kΩ
R2
2.64kΩ
C1
15.0nF
R1
10.6kΩ1/2
OPA2735 1/2
OPA2735 VOUT
VIN
Cutoff frequency = 2kHz for values shown.
Figure 7. High DC Accuracy, 3-Pole Low-Pass Filter
1/2
OPA2735
1/2
OPA2735
R2
10 kΩ
R1=10k
Ω
R3
10 kΩVOUT
VIN
C1
1nF
D1
C1
1nF
NOTE: Dynamic range of the circuit is not reduced by
the diode voltage drop since the diode is not in the signal path.
Application Bulletin Precision Absolute Value Circuits (SBOA068)
is available at www.ti.com and provides further information about rectifier circuits.
Figure 8. Precision Full-Wave Rectifier with Full Dynamic Range
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12
1kΩ
Enable A
VIN A
49kΩ
VOUT
OPA734
Enable B
VIN B
OPA734
Enable inputs are CMOS logic compatible.
G=1
G=50
1nF
Figure 9. High-Precision 2-Input MUX for Programmable Gain
VOUT =1V/A
(referred to ground)
OPA735
2.7V to 12V
+VS
R1
100Ω
IL
Shunt
RS
10mΩR2
10kΩ
C1
1nF
Load
Figure 10. Low-Side Power-Supply Current Sensing
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
OPA2734AIDGSR ACTIVE MSOP DGS 10 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
OPA2734AIDGSRG4 ACTIVE MSOP DGS 10 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
OPA2734AIDGST ACTIVE MSOP DGS 10 250 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
OPA2734AIDGSTG4 ACTIVE MSOP DGS 10 250 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
OPA2735AID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2735AIDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2735AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
OPA2735AIDGKRG4 ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
OPA2735AIDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
OPA2735AIDGKTG4 ACTIVE VSSOP DGK 8 250 Green (RoHS
& no Sb/Br) CU NIPDAUAGLevel-2-260C-1 YEAR
OPA2735AIDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA2735AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA734AID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA734AIDBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA734AIDBVRG4 ACTIVE SOT-23 DBV 6 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA734AIDBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA734AIDBVTG4 ACTIVE SOT-23 DBV 6 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
OPA734AIDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA735AID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA735AIDBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA735AIDBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA735AIDBVT ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA735AIDBVTG4 ACTIVE SOT-23 DBV 5 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA735AIDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA735AIDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
OPA735AIDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 3
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
OPA2734AIDGSR MSOP DGS 10 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
OPA2734AIDGST MSOP DGS 10 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
OPA2735AIDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
OPA2735AIDGKT VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
OPA2735AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
OPA735AIDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
OPA2734AIDGSR MSOP DGS 10 2500 367.0 367.0 35.0
OPA2734AIDGST MSOP DGS 10 250 210.0 185.0 35.0
OPA2735AIDGKR VSSOP DGK 8 2500 367.0 367.0 35.0
OPA2735AIDGKT VSSOP DGK 8 250 210.0 185.0 35.0
OPA2735AIDR SOIC D 8 2500 367.0 367.0 35.0
OPA735AIDR SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 2
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