August 1991 Gg HARRIS 2N6898 P-Channel Enhancement-Mode Power MOS Field-Effect Transistors Features -25A, -100V * rps(on) = 0.202 SOA is Power-Dissipation Limited * Nanosecond Switching Speeds Linear Transfer Characteristics * High Input Impedance * Majority Carrier Device Description The 2N6898 is a P-channel enhancement-mode silicon-gate power MOS field-effect transistor designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high-power bipolar switching transistors Package TO-204AE BOTTOM VIEW DRAIN SOURCE J (FLANGE) Terminal Diagram P-CHANNEL ENHANCEMENT MODE requiring high speed and low gate-drive power. This device can be D operated directly from an integrated circuit. The 2N6898 is supplied in the JEDEC TO-204AE steel package. G s Absolute Maximum Ratings (Tc = +25C) Unless Otherwise Specified 2N6898 UNITS Drain-Source Voltage ....... 0... cece ce ee een teen eens Vpss -100* v Drain-Gate Voitage (RGS = 1M) . 0... ccc cece ete nee VDGR -100* Vv Continuous Drain Current RMS Continuous ..... 0. cee ee tee tree eee ete teens ~25* A Pulsed Drain Current ~60* A Gate-Source Voltage ........... +20* v Maximum Power Dissipation TE H F250 Lecce cree etn eee e ener nent eee tees Pp 150* Ww Above To = +25C, Derate Linearly 2.0.0... cc ce eee e eee ener e eee 4.2* w/c Operating and Storage Junction Temperature Range............ Ty, TstG -55 to +150* oC Maximum Lead Temperature for Soldering ..........0 0. cere eee e evn eee Th 260* 9G (At distances > %" (3.17mm) from seating plane for 10s max) *JEDEC registered values CAUTION: These devices are sensitive to electrostatic discharge. Proper 1,C. handling procedures should be followed. File Number 1 876 Copyright Harris Corporation 1991 5-30Specifications 2N6898 ELECTRICAL CHARACTERISTICS at Case Temperature (T-) = 25C unless otherwise specified. LIMITS CHARACTERISTIC TEST CONDITIONS Min. Max. UNITS | Drain-Source Breakdown Voltage BVoss Ip = 1 mA, Vas = 0 -100} Vv "| Gate Threshold Voitage Ves(th) Vas = Vos, lp = 0.25 MA -2 | -4 Vv "| Zero Gate Voltage Drain Current loss Vos = -80 V |1 A To = 125C, Vos = -80V |s0| "| Gate-Source Leakage Current lass Ves = 20 V, Vos = 0 | 100 nA *| Drain-Source On Voltage Vos(on)@ lo = 15.8 A, Vas = -10 V |3.16 Vv Ip = 25 A, Vas = -10 V _ -6 *| Static Drain-Source On Resistance fos(on) Ip = 15.8 A, Vas = -10 V | 0.2 QO To = 125C, Ip = 15.8 A, Vas = 10 V [0.24 *| Forward Transconductance Ore@ Vps =-10 V, In =15.8A 4 16 | mho *| Input Capacitance Ciss Vos = -25 V _|3000 *| Output Capacitance Coss Ves = OV |1500] pF *| Reverse Transfer Capacitance Cres f = 0.1 MHz | 500 *| Turn-On Delay Time ta(on) Vos = -50 V | 50 | Rise Time t Ip =12.5A | 250 ns *| Turn-Off Delay Time ta(off) Rogen = Age = 502 | 400 "| Fall Time tr Vas =-10V | 250 | Thermal Resistance Junction-to-Case Rguc |0.83] C/W SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS 2 al Wl CHARACTERISTIC TEST CONDITIONS ae UNITS wl o . . $0 *| Diode Forward Voltage Vsv8 Isp = 25 A os{16[ Vv t= Reverse Recovery Time te le = 4A, die/dt = 100 A/ps | 750 ns 3 c *In accordance with JEDEC registration data. a. z @Pulsed: Pulse duration = 300 ws max., duty cycle = 2% a c (CURVES MUST BE o LINEARLY WITH INCREASE IN TEMPERATURE} < I 6 rE z aw x x 5 o z a a 2 z 6 w x = - g a z = a 0 10 20 30 40 50 DRAIN CURRENT (Ip JA 92cs-37246 " = a Fig. 6 - Typical drain-to-source on resistance as a function of DRAIN-TO-SOURCE VOLTAGE {Vps)- drain current. 92C$-37247 Fig. 7 - Capacitance as a function of drain-to-source voltage. -322N6898 Veg lov PULSE TEST PULSE DURATION=80us DUTY CYCLE 2% KELVIN CONTACT 92C5- 40717 FORWARD TRANSCONDUCTANCE (gfs)mho Fig. 9 - Switching time test circuit. 6 8 14 20 -TO-SOURCE (Ip }-a | 9205-37248 Fig. 8 - Typical forward transconductance as a function of drain current. Gi gu 2% 290 <= x of a oO a 5-33