IRFW/IZ44A
BVDSS = 60 V
RDS(on) = 0.024
ID = 50 A
60
50
35.4
200
±20
857
50
12.6
5.5
3.8
126
0.84
- 55 to +175
300
1.19
40
62.5
--
--
--
Avalanche Rugged Technol ogy
Rugged Gate Oxide Tec hnology
Lower Input Capacitance
Improved Gate Charge
Extended Safe Operating Area
175°C Operating Temperature
Lower Lea kage Current : 10µA (M ax.) @ VDS = 60V
Lower RDS(ON): 0.020 (Ty p .)
$GYDQFHG 3RZHU 026)(7
Thermal Resistance
Junction-to-Case
Junction-to-Ambient
Junction-to-Ambient
RθJC
RθJA
RθJA
°C/W
Characteristic Max. UnitsSymbol Typ.
FEATURES
D2-PAK
1. Gate 2. Drain 3. Source
1
3
2
1
2
3
I2-PAK
*
* When mounted on the minimum pad size recommended (PCB Mount).
Absolute Maximum Ratings
Drain- to-Source Vol tage
Conti nuous Drain Current (TC=25°C)
Conti nuous Drain Current (TC=100°C)
Drain Current-Pulsed (1)
Gate-t o-Sourc e Voltage
Singl e Pulsed Aval anche Energy (2)
Avalanche Current (1)
Repetitive Aval anche Energy (1)
Peak Diode Recovery dv/dt (3)
Total Power Dissipati on (TA=25°C)
Total Power Dissipati on (TC=25°C)
Linear Derating Fact or
Operating Junction and
Storage Temperature Range
Maxim um Lead Temp. for Soldering
Purposes, 1/8 from case for 5-seconds
Characteristic Value UnitsSymbol
IDM
VGS
EAS
IAR
EAR
dv/dt
PD
ID
TJ , TSTG
TL
A
V
mJ
A
mJ
V/ns
W
W
W/°C
A
°C
VDSS V
*
©1 999 Fairchild Semico nductor Corporation
Rev. B
IRFW/IZ44A
60
--
2.0
--
--
--
--
--
0.063
--
--
--
--
--
590
220
20
16
68
70
64
12.3
23.6
--
--
4.0
100
-100
10
100
0.024
--
2300
680
255
40
40
140
140
83
--
--
32.6
1770
--
--
--
85
0.24
50
200
1.8
--
--
Notes;
(1) Repeti tive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=0.4mH, IAS=50A, VDD=25V, RG=27, Starting TJ =25°C
(3) ISD 50A, di/ dt 350A/µs, VDD BVDSS , Starti ng TJ =25°C
(4) Pulse Test: Pulse Wi dth = 250µs, Duty Cycle 2%
(5) Essential ly Independent of Operating Temperature
1&+$11(/
32:(5 026)(7
Electrical Characteristics (TC=25°C unless otherwise specified)
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coeff.
Gate Threshold Voltage
Gate-Source Leakage , Fo rward
Gate-Source Leakage , Rev erse
CharacteristicSymbol Max. UnitsTyp.Min. Test Condition
Static Drai n-Source
On-State Resistance
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain ( Miller ) Char ge
gfs
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
Qg
Qgs
Qgd
BVDSS
BV/TJ
VGS(th)
RDS(on)
IGSS
IDSS
V
V/°C
V
nA
µA
pF
ns
nC
--
--
--
--
--
--
--
--
--
--
--
--
--
VGS=0V,ID=250µA
ID=250µA
See Fig 7
VDS=5V,ID=250µA
VGS=20V
VGS=-20V
VDS=60V
VDS=48V,TC=150°C
VGS=10V,ID= 25A (4)
VDS=30V,ID=25A (4)
VDD=30V,ID=50A,
RG=9.1
See Fig 13
(4) (5)
VDS=48V,VGS=10V,
ID=50A
See Fig 6 & Fig 12
(4) (5)
Drain- to-Source Leakage Current
VGS=0V,VDS=25V,f =1M Hz
See Fig 5
Source-Drain Diode Ratings and Characteristics
Continuous Source Current
Pulsed-Source Current (1)
Diode Forwar d Volta ge (4)
Reverse Recovery Time
Reverse Recovery Charge
IS
ISM
VSD
trr
Qrr
CharacteristicSymbol Max. UnitsTyp.M in. Test Condition
--
--
--
--
--
A
V
ns
µC
Integral reverse pn-diode
in the MOSFET
TJ=25°C,IS=50A,VGS=0V
TJ=25°C,IF=50A
diF/dt=100A/µs (4)
IRFW/IZ44A
10-1 100101
100
101
102
@ Notes :
1. 250
µs Pulse Test
2. TC = 25 oC
VGS
Top : 1 5 V
1 0 V
8 .0 V
7.0 V
6 .0 V
5.5 V
5.0 V
Bottom : 4.5 V
ID
, Drain Current [A]
V
DS , Drain-Source Voltage [V]
0 40 80 120 160 200 240
0.00
0.01
0.02
0.03
0.04
@ Note : TJ = 25 oC
V
GS = 20 V
V
GS = 10 V
RDS(on) , [ ]
Drain-Source On-Resistance
I
D
, Drain Current [A] 0.40.60.81.01.21.41.61.82.02.22.42.62.83.0
100
101
102
175 oC
25
oC
@ Notes :
1. VGS = 0 V
2. 250
µ
s Pulse Test
IDR , Reverse Drain Current [A]
VSD , Source-Drain Voltage [V]
100101
0
700
1400
2100
2800
3500C
iss= Cgs+ Cgd ( C
ds= shorted
)
C
oss= Cds+ Cgd
C
rss= Cgd
@ Notes :
1. VGS = 0 V
2. f = 1 MHz
C rss
C oss
C iss
Capacitance [pF]
VDS , Drain-Source Voltage [V] 0 10203040506070
0
5
10
V
DS = 48 V
V
DS = 30 V
V
DS = 12 V
@ Notes : ID = 50.0 A
VGS , Gate-Source Voltage [V]
Q
G
, Total Gate Charge [nC]
246810
10-1
100
101
102
25
oC
175 oC
- 55 oC
@ Notes :
1. VGS = 0 V
2. VDS = 30 V
3. 250 µs Pulse Test
ID , Drain Current [A]
VGS , Gate-Source Voltage [V]
1&+$11(/
32:(5 026)(7
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
Fig 6. Gate Charge vs. Gate-Source VoltageFig 5. Capacitance vs. Drai n-Sour ce Voltage
Fig 4. Source-Drain Diode Forward VoltageFig 3. On- Resistan ce vs. Drain Curr ent
IRFW/IZ44A
-75 -50 -25 0 25 50 75 100 125 150 175 200
0.8
0.9
1.0
1.1
1.2
@ Notes :
1. VGS = 0 V
2. ID = 250 µA
BVDSS , (Normalized)
Drain-Source Breakdown Voltage
TJ
, Junction Temperature [o
C] -75-50-25 0 25 50 75 100125150175200
0.5
1.0
1.5
2.0
2.5
@ Notes :
1. VGS = 10 V
2. ID =25 A
RDS(on) , (Normalized)
Drain-Source On-Resistance
TJ
, Junction Temperature [o
C]
100101102
10-1
100
101
102
103
10 µs
DC
100
µs
1 ms
10 ms
@ Notes :
1. TC = 25 oC
2. TJ = 175 oC
3. Single Pulse
Operation in This Area
is Limited by R DS(on)
ID , Drain Current [A]
VDS , Drain-Source Voltage [V]
10-5 10-4 10-3 10-2 10-1 100101
10-2
10-1
100
single pulse
0.2
0.1
0.01
0.02
0.05
D=0.5
@ Notes :
1. ZθJC(t)=1.19 oC/W Max.
2. Duty Factor, D=t1/t2
3. TJM-TC=PDM*ZθJC(t)
ZθJC
(t) , Thermal Response
t1 , Square Wave Pulse Durat ion [sec]
25 50 75 100125150175
0
10
20
30
40
50
60
ID , Drain Current [A]
T
c
, Case Temperature [o
C]
1&+$11(/
32:(5 026)(7
Fig 7. Break down Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature
Fig 11. T hermal Response
Fig 10. Max. Drain Current vs. Case TemperatureFig 9. Max. Safe Operating Area
PDM
t1t2
IRFW/IZ44A
1&+$11(/
32:(5 026)(7
Fig 12. Gate Charge Test Circuit & Waveform
Fig 13. Resistive Switching Test Circuit & Wavef orms
Fig 14. Unclamped In ductive Switc hing Test Circuit & Waveforms
EAS =L
L IAS2
----
2
1--------------------
BVDSS -- VDD
BVDSS
Vin
Vout
10%
90%
td(on) tr
t on t off
td(off) tf
Charge
VGS
10V
Qg
Qgs Qgd
Vary t
p
to obtain
required peak ID
10V
VDD
C
LL
VDS
ID
RG
t p
DUT
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
VDD
( 0.5 rated VDS )
10V
Vout
Vin
RL
DUT
RG
3mA
VGS
Current Sampl ing (IG)
Resistor Curren t Sa mpl ing (ID)
Resistor
DUT
VDS
300nF
50k
200nF
12V
Same Type
as DUT
Current Regulator
R1R2
IRFW/IZ44A
1&+$11(/
32:(5 026)(7
Fig 15. Peak Di ode Recovery dv/dt T est Circuit & Waveforms
DUT
VDS
+
--
L
I S
Driver
VGS
RGSame Type
as DUT
VGS dv/dt controlled by RG
IS control led by Duty Factor D
VDD
10V
VGS
( Driver )
I S
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
Vf
IFM , Body D iode Forw ard Cur ren t
Body Diode Reverse Current
IRM
Body Diode R ecovery dv/dt
di/dt
D = Gate P ul se Width
Gate Pulse Period
--------------------------
TRADEMARKS
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
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not intended to be an exhaustive list of all such trademarks.
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DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
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SuperSOT™-3
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the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
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Definition of Terms
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Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
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This datasheet contains final specifications. Fairchild
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