LM4857ITL/NOPB - NATIONAL SEMICONDUCTOR

LM4857

LM4857  Stereo 1.2W Audio Sub-system with 3D Enhancement

Literature Number: SNAS229H

LM4857

Stereo 1.2W Audio Sub-system with 3D Enhancement

General Description

The LM4857 is an integrated audio sub-system designed for

stereo cell phone applications. Operating on a 3.3V supply, it

combines a stereo speaker amplifier delivering 495mW per

channel into an 8Ωload, a stereo headphone amplifier de-

livering 33mW per channel into a 32Ωload, a mono earpiece

amplifier delivering 43mW into a 32Ωload, and a line output

for an external powered handsfree speaker. It integrates the

audio amplifiers, volume control, mixer, power management

control, and National 3D enhancement all into a single pack-

age. In addition, the LM4857 routes and mixes the stereo

and mono inputs into 16 distinct output modes. The LM4857

is controlled through an I

C compatible interface. Other fea-

tures include an ultra-low current shutdown mode and ther-

mal shutdown protection.

Boomer audio power amplifiers are designed specifically to

provide high quality output power with a minimal amount of

external components.

The LM4857 is available in a 30-bump ITL package and a

28–lead LLP package.

Key Specifications

OUT

, Stereo Loudspeakers, 4Ω, 5V,

1% THD+N (LM4857SP) 1.6W (typ)

OUT

, Stereo Loudspeakers, 8Ω, 5V,

1% THD+N 1.2W (typ)

OUT

, Stereo Headphones, 32Ω, 5V,

1% THD+N 75mW (typ)

OUT

, Mono Earpiece, 32Ω, 5V,

1% THD+N 100mW (typ)

OUT

, Stereo Loudspeakers, 8Ω, 3.3V,

1% THD+N 495mW (typ)

OUT

, Stereo Headphones, 32Ω, 3.3V,

1% THD+N 33mW (typ)

OUT

, Mono Earpiece, 32Ω, 3.3V,

1% THD+N 43mW (typ)

jShutdown Current 0.06µA (typ)

Features

nStereo speaker amplifier

nStereo headphone amplifier

nMono earpiece amplifier

nMono Line Output for external handsfree carkit

nIndependent Left, Right, and Mono volume controls

nNational 3D enhancement

C compatible interface

nUltra low shutdown current

nClick and Pop Suppression circuit

n16 distinct output modes

nThermal Shutdown Protection

nAvailable in micro SMD and LLP packages

Applications

nCell Phones

nPDAs

nPortable Gaming Devices

nInternet Appliances

nPortable DVD/CD/AAC/MP3 players

Boomer®is a registered trademark of National Semiconductor Corporation.

June 2005

LM4857 Stereo 1.2W Audio Sub-system with 3D Enhancement

Typical Application

20079708

FIGURE 1. Typical Audio Amplifier Application Circuit

LM4857

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Connection Diagrams

30 Bump ITL Package micro SMD Marking

200797A9

Top View

(Bump-side down)

Order Number LM4857ITL

See NS Package Number TLA30CZA

200797I3

Top View

X — Date Code

T — Die Traceability

G — Boomer Family

C2 — LM4857ITL

Pin Connection (ITL)

Pin Name Pin Description

A1 RLS+ Right Loudspeaker Positive Output

A2 V

Power Supply

A3 SDA Data

A4 RHP3D Right Headphone 3D

A5 RHP Right Headphone Output

B1 GND Ground

B2 I

C Interface Power Supply

B3 ADR I

C Address Select

B4 LHP3D Left Headphone 3D

B5 V

Power Supply

C1 RLS- Right Loudspeaker Negative Output

C2 NC No Connect

C3 SCL Clock

C4 LINEOUT Mono Line Output

C5 GND Ground

D1 LLS- Left Loudspeaker Negative Output

D2 V

Power Supply

D3 M

Mono Input

D4 NC No Connect

D5 EP+ Mono Earpiece Positive Output

E1 GND Ground

E2 BYPASS Half-supply bypass

E3 LLS3D Left Loudspeaker 3D

E4 R

Right Stereo Input

E5 EP- Mono Earpiece Negative Output

F1 LLS+ Left Loudspeaker Positive Output

F2 V

Power Supply

F3 RLS3D Right Loudspeaker 3D

F4 L

Left Stereo Input

F5 LHP Left Headphone Output

LM4857

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Connection Diagram

28 – Lead SP Package

20079799

Top View

Order Number LM4857SP

See NS Package Number SPA28A

LM4857

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Pin Connection (SP)

Pin Name Pin Description

1 RHP Right Headphone Output

Power Supply

3 LINEOUT Mono Line Output

4 GND Ground

5 EP- Mono Earpiece Negative Output

6 EP+ Mono Earpiece Positive Output

7 LHP Left Headphone Output

8 RIN Right Stereo Input

9 LIN Left Stereo Input

10 MIN Mono Input

11 LLS3D Left Loudspeaker 3D

12 RLS3D Right Loudspeaker 3D

13 BYPASS Half-supply bypass

14 V

Power Supply

15 LLS+ Left Loudspeaker Positive Output

16 GND Ground

17 LLS- Leftt Loudspeaker Negative Output

18 V

Power Supply

19 RLS- Right Loudspeaker Negative Output

20 GND Ground

21 RLS+ Right Loudspeaker Positive Output

22 V

Power Supply

23 I

C Interface Power Supply

24 SDA Data

25 ADR I

C Address Select

26 SCL Clock

27 RHP3D Right Headphone 3D

28 LHP3D Left Headphone 3D

LM4857

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Absolute Maximum Ratings (Notes 1, 2)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

Supply Voltage 6.0V

Storage Temperature −65˚C to +150˚C

Input Voltage −0.3V to V

+0.3V

Power Dissipation (Note 3) Internally Limited

ESD Susceptibility (Note 4) 2000V

ESD Susceptibility (Note 5) 200V

Junction Temperature (T

) 150˚C

Thermal Resistance

(TLA30CZA) (Note 10) 62˚C/W

(SPA28A) (Note 12) 42˚C/W

(SPA28A) 3˚C/W

Operating Ratings

Temperature Range

MIN

≤T

MAX

−40˚C ≤T

≤+85˚C

Supply Voltage

2.7V ≤V

≤5.5V

2.5V ≤I

≤5.5V

Audio Amplifier Electrical Characteristics V

= 5.0V (Notes 1, 2)

The following specifications apply for V

= 5.0V, unless otherwise specified. Limits apply for T

= 25˚C.

Symbol Parameter Conditions LM4857 Units

(Limits)

Typical

(Note 6)

Limits (Notes

7, 8)

Supply Current

= 0V, No load;

LD5 = RD5 = 0 (Note 9)

Mode 1, 6, 11 6 9.5 mA (max)

Mode 4, 5, 9, 10, 14, 15 5 8 mA (max)

Mode 2, 3, 7, 8, 12, 13 13 21 mA (max)

Shutdown Current Output mode 0 (Note 9) 0.2 3 µA (max)

LM4857SP

Speaker; THD+N = 1%;

f = 1kHz; 4ΩBTL

1.6 W

Output Power

Speaker; THD+N = 1%;

f = 1kHz; 8ΩBTL 1.2 0.9 W (min)

Headphone; THD+N = 1%;

f = 1kHz; 32ΩSE 75 60 mW (min)

Earpiece; THD+N = 1%;

f = 1kHz; 32ΩBTL, CD4 = 0 100 80 mW (min)

Earpiece; THD+N = 1%;

f = 1kHz; 32ΩBTL, CD4 = 1 135 mW

THD+N Total Harmonic Distortion Plus

Noise

LD5=RD5=0

Speaker; P

= 400mW;

f = 1kHz; 8ΩBTL 0.05 %

Headphone; P

= 15mW;

f = 1kHz; 32ΩSE 0.04 %

Earpiece; P

= 15mW;

f = 1kHz; 32ΩBTL, CD4 = 0 0.05 %

Line Out, V

=1V

RMS

;

f = 1kHz; 5kΩSE 0.009 %

Offset Voltage Speaker; LD5 = RD5 = 0 5 40 mV (max)

Earpiece; LD5 = RD5 = 0 5 30 mV (max)

LM4857

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Audio Amplifier Electrical Characteristics V

= 5.0V (Notes 1, 2) (Continued)

The following specifications apply for V

= 5.0V, unless otherwise specified. Limits apply for T

= 25˚C.

Symbol Parameter Conditions LM4857 Units

(Limits)

Typical

(Note 6)

Limits (Notes

7, 8)

OUT

Output Noise

A-weighted, 0dB gain; (Note 11)

LD5 = RD5 = 0; Audio Inputs Terminated

Speaker; Mode 2, 3, 7, 8 27 µV

Speaker; Mode 12, 13 38 µV

Headphone; Mode 3, 4, 8, 9 10 µV

Headphone; Mode 13, 14 14 µV

Earpiece; Mode 1; CD4 = 0 13 µV

Earpiece; Mode 6 18 µV

Earpiece; Mode 11 21 µV

Line Out; Mode 5 11 µV

Line Out; Mode 10 14 µV

Line Out; Mode 15 17 µV

PSRR Power Supply Rejection Ratio

f = 217Hz; V

rip

= 200mV

= 2.2µF;

0dB gain; (Note 11)

LD5 = RD5 = 0; Audio Inputs Terminated

Speaker; Mode 2, 3, 7, 8 70 dB

Speaker; Mode 12, 13, 64 54 dB (min)

Headphone; Mode 3, 4, 8, 9 86 dB

Headphone; Mode 13, 14 73 60 dB (min)

Earpiece; Mode1 75 dB

Earpiece; Mode 6 70 dB

Earpiece; Mode 11 66 57 dB (min)

Line Out; Mode 5 86 dB

Line Out; Mode 10 74 dB

Line Out; Mode 15 68 57 dB (min)

Xtalk Crosstalk

LD5=RD5=0

Loudspeaker; P

= 400mW;

f = 1kHz 85 dB

Headphone; P

= 15mW;

f = 1kHz 85 dB

Wake-up Time CD5=0;C

= 2.2µF 120 ms

CD5=1;C

= 2.2µF 230 ms

Audio Amplifier Electrical Characteristics V

= 3.0V (Notes 1, 2)

The following specifications apply for V

= 3.0V, unless otherwise specified. Limits apply for T

= 25˚C.

Symbol Parameter Conditions LM4857 Units

(Limits)

Typical

(Note 6)

Limits (Notes

7, 8)

Supply Current

= 0V, No load;

LD5 = RD5 = 0 (Note 9)

Mode 1, 6, 11 5.5 9 mA (max)

Mode 4, 5, 9, 10, 14, 15 4.5 7.5 mA (max)

Mode 2, 3, 7, 8, 12, 13 11.2 19 mA (max)

Shutdown Current Mode 0 (Note 9) 0.06 2.5 µA (max)

Output Power

LM4857SP

Speaker; THD+N = 1%;

f = 1kHz; 4ΩBTL

530 mW

LM4857

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Audio Amplifier Electrical Characteristics V

= 3.0V (Notes 1, 2) (Continued)

The following specifications apply for V

= 3.0V, unless otherwise specified. Limits apply for T

= 25˚C.

Symbol Parameter Conditions LM4857 Units

(Limits)

Typical

(Note 6)

Limits (Notes

7, 8)

Output Power

Speaker; THD+N = 1%;

f = 1kHz; 8ΩBTL 400 320 mW (min)

Headphone; THD+N = 1%;

f = 1kHz; 32ΩSE 25 20 mW (min)

Earpiece; THD+N = 1%;

f = 1kHz; 32ΩBTL; CD4 = 0 30 22 mW (min)

Earpiece; THD+N = 1%;

f = 1kHz; 32ΩBTL; CD4 = 1 30 mW

THD+N Total Harmonic Distortion Plus

Noise

LD5=RD5=0

Speaker; P

= 200mW;

f = 1kHz; 8ΩBTL 0.05 %

Headphone; P

= 10mW;

f = 1kHz; 32ΩSE 0.04 %

Earpiece; P

=10mW;

f = 1kHz; 32ΩBTL; CD4 = 0 0.06 %

Line Out; V

=1V

RMS

;

f = 1kHz; 5kΩSE 0.015 %

Offset Voltage Speaker; LD5 = RD5 = 0 5 40 mV (max)

Earpiece; LD5 = RD5 = 0 5 30 mV (max)

OUT

Output Noise

A-weighted; 0dB gain; (Note 11)

LD5 = RD5 = 0; All Inputs Terminated

Speaker; Mode 2, 3, 7, 8 27 µV

Speaker; Mode 12, 13 38 µV

Headphone; Mode 3, 4, 8, 9 10 µV

Headphone; Mode 13, 14 14 µV

Earpiece; Mode 1 13 µV

Earpiece; Mode 6 18 µV

Earpiece; Mode 11 21 µV

Line Out; Mode 5 11 µV

Line Out; Mode 10 14 µV

Line Out; Mode 15 17 µV

PSRR Power Supply Rejection Ratio

f = 217Hz, V

rip

= 200mV

= 2.2µF;

0dB gain; (Note 11)

LD5 = RD5 = 0; All Audio Inputs

Terminated

Speaker; Mode 2, 3, 7, 8 70 dB

Speaker; Mode 12, 13, 65 55 dB (min)

Headphone; Mode 3, 4, 8, 9 87 dB

Headphone; Mode 13, 14 75 62 dB (min)

Earpiece; Mode1 76 dB

Earpiece; Mode 6 70 dB

Earpiece; Mode 11 67 57 dB (min)

Line Out; Mode 5 88 dB

Line Out; Mode 10 74 dB

Line Out; Mode 15 71 58 dB (min)

LM4857

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Audio Amplifier Electrical Characteristics V

= 3.0V (Notes 1, 2) (Continued)

The following specifications apply for V

= 3.0V, unless otherwise specified. Limits apply for T

= 25˚C.

Symbol Parameter Conditions LM4857 Units

(Limits)

Typical

(Note 6)

Limits (Notes

7, 8)

Xtalk Crosstalk

LD5=RD5=0

Loudspeaker; P

= 200mW;

f = 1kHz 82 dB

Headphone; P

= 10mW;

f = 1kHz 82 dB

Wake-up Time CD5=0;C

= 2.2µF 80 ms

CD5=1;C

= 2.2µF 140 ms

Volume Control Electrical Characteristics (Notes 1, 2)

The following specifications apply for V

= 5.0V and V

= 3.0V, unless otherwise specified. Limits apply for T

= 25˚C.

Symbol Parameter Conditions LM4857 Units

(Limits)

Typical

(Note 6)

Limits (Notes

7, 8)

Stereo Volume Control Range

maximum gain setting 6 5.5

6.5

dB (min)

dB (max)

minimum gain setting -40.5 -41

-40

dB (min)

dB (max)

Mono Volume Control Range

maximum gain setting 12 11.5

12.5

dB (min)

dB (max)

minimum gain setting -34.5 -35

-34

dB (min)

dB (max)

Volume Control Step Size 1.5 dB

Volume Control Step Size

Error

+/-0.2 +/-0.5 dB (max)

Stereo Channel to Channel

Gain Mismatch

0.3 dB

Mute Attenuation

Mode 12, V

=1V

RMS

Headphone 85 dB

Line Out 85 dB

and R

Input Impedance

maximum gain setting 33.5 25

kΩ(min)

kΩ(max)

minimum gain setting 100 75

125

kΩ(min)

kΩ(max)

Input Impedance maximum gain setting 20 15

kΩ(min)

kΩ(max)

minimum gain setting 98 73

123

kΩ(min)

kΩ(max)

Control Interface Electrical Characteristics (Notes 1, 2)

The following specifications apply for V

= 5V and V

= 3V and 2.5V ≤I

≤5.5V, unless otherwise specified. Limits

apply for T

= 25˚C.

Symbol Parameter Conditions LM4857 Units

(Limits)

Typical

(Note 6)

Limits (Notes

7, 8)

SCL period 2.5 µs (min)

SDA Set-up Time 100 ns (min)

SDA Stable Time 0 ns (min)

Start Condition Time 100 ns (min)

LM4857

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Control Interface Electrical Characteristics (Notes 1, 2) (Continued)

The following specifications apply for V

= 5V and V

= 3V and 2.5V ≤I

≤5.5V, unless otherwise specified. Limits

apply for T

= 25˚C.

Symbol Parameter Conditions LM4857 Units

(Limits)

Typical

(Note 6)

Limits (Notes

7, 8)

Stop Condition time 100 ns (min)

Digital Input High Voltage 0.7 x I

CVDD V (min)

Digital Input Low Voltage 0.3 x I

V (max)

Note 1: All voltages are measured with respect to the GND pin unless otherwise specified.

Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

functional but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which

guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters where no limit

is given, however, the typical value is a good indication of device performance.

Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX,θJA, and the ambient temperature, TA. The maximum

allowable power dissipation is PDMAX =(T

JMAX -T

A)/θJA or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4857 operating in Mode

3, 8, or 13 with VDD =5V,8Ωstereo loudspeakers and 32Ωstereo headphones, the total power dissipation is 1.348W. θJA = 62˚C/W.

Note 4: Human body model, 100pF discharged through a 1.5kΩresistor.

Note 5: Machine Model, 220pF - 240pF discharged through all pins.

Note 6: Typicals are measured at +25˚C and represent the parametric norm.

Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).

Note 8: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.

Note 9: Shutdown current and supply current are measured in a normal room environment. All digital input pins are connected to I2CVDD.

Note 10: The given θJA is for an LM4857ITL mounted on a PCB with a 2in2area of 1oz printed circuit board copper ground plane.

Note 11: “0dB gain” refers to the volume control gain setting of MIN,L

IN, and RIN set at 0dB.

Note 12: The given θJA is for an LM4857SP mounted on a PCB with a 2in2area of 1oz printed circuit board ground plane.

LM4857

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External Components Description

Components Functional Description

1. C

This is the input coupling capacitor. It blocks the DC voltage and couples the input signal to the

amplifier’s input terminals. C

also creates a highpass filter with the internal resistor R

(Input

Impedance) at f

= 1/(2πR

2. C

This is the supply bypass capacitor. It filters the supply voltage applied to the V

pin and helps

reduce the noise at the V

pin.

3. C

This is the BYPASS pin capacitor. It filters the V

/ 2 voltage and helps maintain the LM4857’s

PSRR.

4. C

OUT

This is the output coupling capacitor. It blocks the DC voltage and couples the output signal to the

speaker load R

OUT

also creates a high pass filter with R

at f

= 1/(2πR

OUT

5. R

This resistor sets the gain of the National 3D effect. Please refer to the National 3D Enhancement

section for information on selecting the value of R

6. C

This capacitor sets the frequency at which the National 3D effect starts to occur. Please refer to the

National 3D Enhancement section for information on selecting the value of C

Typical Performance Characteristics (Note 11)

LM4857SP THD+N vs Frequency LM4857SP THD+N vs Frequency

20079755

= 5V; LLS, RLS; P

= 400mW;

=4Ω; Mode 7; 0dB Gain

20079756

= 3V; LLS, RLS; P

= 200mW;

=4Ω; Mode 7; 0dB Gain

LM4857

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Typical Performance Characteristics (Note 11) (Continued)

LM4857SP THD+N vs Output Power LM4857SP THD+N vs Output Power

20079757

= 5V; LLS, RLS; f = 1kHz;

=4Ω; Mode 7; 0dB Gain

20079758

= 3V; LLS, RLS; f = 1kHz;

=4Ω; Mode 7; 0dB Gain

THD+N vs Frequency THD+N vs Frequency

20079710

= 5V; LLS, RLS; P

= 400mW;

=8Ω; Mode 7; 0dB Gain

20079711

= 3V; LLS, RLS; P

= 200mW;

=8Ω; Mode 7; 0dB Gain

LM4857

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Typical Performance Characteristics (Note 11) (Continued)

THD+N vs Frequency THD+N vs Frequency

20079712

= 5V; LHP, RHP; P

= 15mW;

=32Ω; Mode 9; 0dB Gain

20079713

= 3V; LHP, RHP; P

= 10mW;

=32Ω; Mode 9; 0dB Gain

THD+N vs Frequency THD+N vs Frequency

20079714

= 5V; EP; P

= 15mW;

=32Ω; Mode 1; 0dB Gain, CD4 = 0

20079715

= 3V; EP; P

= 10mW;

=32Ω; Mode 1; 0dB Gain, CD4 = 0

LM4857

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Typical Performance Characteristics (Note 11) (Continued)

THD+N vs Frequency THD+N vs Frequency

20079716

= 5V; LINEOUT; V

=1V

RMS

;

=5kΩ; Mode 5; 0dB Gain

20079717

= 3V; LINEOUT; V

=1V

RMS

;

=5kΩ; Mode 5; 0dB Gain

THD+N vs Frequency THD+N vs Frequency

20079718

= 5V; LINEOUT; V

=1V

RMS

;

=5kΩ; Mode 10; 0dB Gain

20079719

= 3V; LINEOUT; V

=1V

RMS

;

=5kΩ; Mode 10; 0dB Gain

LM4857

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Typical Performance Characteristics (Note 11) (Continued)

THD+N vs Output Power THD+N vs Output Power

20079720

= 5V; LLS, RLS; f = 1kHz;

=8Ω; Mode 7; 0dB Gain

20079721

= 3V; LLS, RLS; f = 1kHz;

=8Ω; Mode 7; 0dB Gain

THD+N vs Output Power THD+N vs Output Power

20079722

= 5V; LHP, RHP; f = 1kHz;

=32Ω; Mode 9; 0dB Gain

20079723

= 3V; LHP, RHP; f = 1kHz;

=32Ω; Mode 9; 0dB Gain

LM4857

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Typical Performance Characteristics (Note 11) (Continued)

THD+N vs Output Power THD+N vs Output Power

20079724

= 5V; EP; f = 1kHz; R

=32Ω;

Mode 1; 0dB Gain; Top-CD4 = 1; Bot-CD4 = 0

20079725

= 3V; EP; f = 1kHz;

=32Ω; Mode 1; 0dB Gain

PSRR vs Frequency PSRR vs Frequency

20079726

= 5V; LLS, RLS; R

=8Ω; 0db Gain;

All audio inputs terminated

Top-Mode 12, 13; Mid-Mode 2, 3; Bot-Mode 7, 8

20079727

= 3V; LLS, RLS; R

=8Ω; 0db Gain;

All audio inputs terminated

Top-Mode 12, 13; Mid-Mode 2, 3; Bot-Mode 7, 8

LM4857

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Typical Performance Characteristics (Note 11) (Continued)

PSRR vs Frequency PSRR vs Frequency

20079728

= 5V; LHP, RHP; R

=32Ω; 0db Gain;

All audio inputs terminated

Top-Mode 13, 14; Mid-Mode 3, 4; Bot-Mode 8, 9

20079729

= 3V; LHP, RHP; R

=32Ω; 0db Gain;

All audio inputs terminated

Top-Mode 13, 14; Mid-Mode 3, 4; Bot-Mode 8, 9

PSRR vs Frequency PSRR vs Frequency

20079730

= 5V; EP; R

=32Ω; 0db Gain;

All audio inputs terminated

Top-Mode 11; Mid-Mode 6; Bot-Mode 1

20079731

= 3V; EP; R

=32Ω; 0db Gain;

All audio inputs terminated

Top-Mode 11; Mid-Mode 6; Bot-Mode 1

LM4857

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Typical Performance Characteristics (Note 11) (Continued)

PSRR vs Frequency PSRR vs Frequency

20079732

= 5V; LINEOUT; R

=5kΩ; 0db Gain;

All audio inputs terminated

Top-Mode 15; Mid-Mode 10; Bot-Mode 5

20079733

= 3V; LINEOUT; R

=5kΩ; 0db Gain;

All audio inputs terminated

Top-Mode 15; Mid-Mode 10; Bot-Mode 5

Crosstalk vs Frequency Crosstalk vs Frequency

20079734

= 5V; LLS, RLS; P

= 400mW; R

=8Ω;

Mode 7; 0db Gain; 3D off

Top-Left to Right; Bot- Right to Left

20079735

= 3V; LLS, RLS; P

= 200mW; R

=8Ω;

Mode 7; 0db Gain; 3D off

Top-Left to Right; Bot- Right to Left

LM4857

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Typical Performance Characteristics (Note 11) (Continued)

Crosstalk vs Frequency Crosstalk vs Frequency

20079736

= 5V; LHP, RHP; P

= 15mW; R

=32Ω;

Mode 9; 0db Gain; 3D off

Top-Left to Right; Bot- Right to Left

20079737

= 3V; LHP, RHP; P

= 10mW; R

=32Ω;

Mode 9; 0db Gain; 3D off

Top-Left to Right; Bot- Right to Left

Frequency vs Response Frequency vs Response

20079738

LLS, RLS; R

=8Ω;

Mode 2; Full Gain

20079739

LLS, RLS; R

=8Ω;

Mode 7; Full Gain

LM4857

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Typical Performance Characteristics (Note 11) (Continued)

Frequency vs Response Frequency vs Response

20079740

LHP, RHP; R

=32Ω;C

= 100µF

Mode 4; Full Gain

20079741

LHP, RHP; R

=32Ω;C

= 100µF

Mode 9; Full Gain

Frequency vs Response Frequency vs Response

20079742

EP; R

=32Ω; Mode 1; Full Gain

Top-CD4 = 1; Bot-CD4 = 0

20079743

LINEOUT; R

=5kΩ;C

= 2.2µF

Mode 5; Full Gain

LM4857

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Typical Performance Characteristics (Note 11) (Continued)

Frequency vs Response Power Dissipation vs Output Power

20079744

LINEOUT; R

=5kΩ;C

= 2.2µF

Mode 10; Full Gain

20079745

LLS, RLS; R

=8Ω; THD+N ≤1%

Top-V

= 5V; Bot-V

=3V

per channel

Power Dissipation vs Output Power Power Dissipation vs Output Power

20079746

LHP, RHP; R

=32Ω; THD+N ≤1%

Top-V

= 5V; Bot-V

=3V

per channel

20079747

EP; R

=32Ω; THD+N ≤1%

Top-V

= 5V; Bot-V

=3V

LM4857

www.national.com21

Typical Performance Characteristics (Note 11) (Continued)

Output Power vs Load Resistance Output Power vs Load Resistance

20079748

LLS, RLS; R

=8Ω;

Top-V

= 5V, 10% THD+N; Topmid-V

= 5V, 1% THD+N;

Botmid-V

= 3V, 10% THD+N; Bot-V

= 3V, 1% THD+N

20079749

LHP, RHP; R

=32Ω;

Top-V

= 5V, 10% THD+N; Topmid-V

= 5V, 1% THD+N;

Botmid-V

= 3V, 10% THD+N; Bot-V

= 3V, 1% THD+N

Output Power vs Load Resistance Output Power vs Load Resistance

20079750

EP; R

=32Ω;CD4=0

Top-V

= 5V, 10% THD+N; Topmid-V

= 5V, 1% THD+N;

Botmid-V

= 3V, 10% THD+N; Bot-V

= 3V, 1% THD+N

20079751

EP; R

=32Ω;CD4=1

Top-V

= 5V, 10% THD+N; Topmid-V

= 5V, 1% THD+N;

Botmid-V

= 3V, 10% THD+N; Bot-V

= 3V, 1% THD+N

LM4857

www.national.com 22

Typical Performance Characteristics (Note 11) (Continued)

Output Power vs Supply Voltage Output Power vs Supply Voltage

20079752

LLS, RLS; R

=8Ω;

Top–10% THD+N; Bot–1% THD+N

20079753

LHP, RHP; R

=32Ω;

Top–10% THD+N; Bot–1% THD+N

Output Power vs Supply Voltage

20079754

EP; R

=32Ω;

Top–10% THD+N; CD4 = 1; Topmid–1% THD+N, CD4 = 1

Botmid–10% THD+N; CD4 = 0; Bot–1% THD+N, CD4 = 0

LM4857

www.national.com23

Application Information

TABLE 1. Chip Address

A7 A6 A5 A4 A3 A2 A1 A0

Chip Address 111110EC0

ADR=011111000

ADR=111111010

EC - externally configured by ADR pin

TABLE 2. Control Registers

D7 D6 D5 D4 D3 D2 D1 D0

Mono Volume control 0 0 0 MD4 MD3 MD2 MD1 MD0

Left Volume control 0 1 LD5 LD4 LD3 LD2 LD1 LD0

Right Volume control 1 0 RD5 RD4 RD3 RD2 RD1 RD0

Mode control 1 1 CD5 CD4 CD3 CD2 CD1 CD0

200797F5

FIGURE 2. I

C Bus Format

200797F4

FIGURE 3. I

C Timing Diagram

LM4857

www.national.com 24

Application Information (Continued)

TABLE 3. Mono Volume Control

MD4 MD3 MD2 MD1 MD0 Gain (dB)

00000 -34.5

00001 -33.0

00010 -31.5

00011 -30.0

00100 -28.5

00101 -27.0

00110 -25.5

00111 -24.0

01000 -22.5

01001 -21.0

01010 -19.5

01011 -18.0

01100 -16.5

01101 -15.0

01110 -13.5

01111 -12.0

10000 -10.5

10001 -9.0

10010 -7.5

10011 -6.0

10100 -4.5

10101 -3.0

10110 -1.5

10111 0.0

11000 1.5

11001 3.0

11010 4.5

11011 6.0

11100 7.5

11101 9.0

11110 10.5

11111 12.0

LM4857

www.national.com25

Application Information (Continued)

TABLE 4. Stereo Volume Control

LD4//RD4 LD3//RD3 LD2//RD2 LD1//RD1 LD0//RD0 Gain (dB)

00000-40.5

00001-39.0

00010-37.5

00011-36.0

00100-34.5

00101-33.0

00110-31.5

00111-30.0

01000-28.5

01001-27.0

01010-25.5

01011-24.0

01100-22.5

01101-21.0

01110-19.5

01111-18.0

10000-16.5

10001-15.0

10010-13.5

10011-12.0

10100-10.5

10101-9.0

10110-7.5

10111-6.0

11000-4.5

11001-3.0

11010-1.5

110110.0

111001.5

111013.0

111104.5

111116.0

LM4857

www.national.com 26

Application Information (Continued)

TABLE 5. Mixer and Output Mode Control

Mode CD3 CD2 CD1 CD0 Mono

Line Out

Mono Earpiece Loudspeaker

Loudspeaker

Headphone

(CD4 = 0) (CD4 =

00000SDSDSDSDSDSDSD

1 0 0 0 1 MUTE (G

x M) 2(G

SD SD MUTE MUTE

2 0 0 1 0 MUTE SD SD 2(G

x M) 2(G

x M) MUTE MUTE

3 0 0 1 1 MUTE SD SD 2(G

x M) 2(G

xM) (G

xM)

4 0 1 0 0 MUTE SD SD SD SD (G

xM) (G

xM)

50101(G

x M) SD SD SD SD MUTE MUTE

6 0 1 1 0 MUTE (G

xL)+

xR)

2(G

L) +

2(G

SD SD MUTE MUTE

7 0 1 1 1 MUTE SD SD 2(G

x L) 2(G

x R) MUTE MUTE

8 1 0 0 0 MUTE SD SD 2(G

x L) 2(G

xR) (G

xL) (G

xR)

9 1 0 0 1 MUTE SD SD SD SD (G

xL) (G

xR)

101010(G

xL)+

xR)

SD SD SD SD MUTE MUTE

11 1 0 1 1 MUTE (G

xM)+

xL)+

xR)

2(G

M) +

2(G

+2(G

SD SD MUTE MUTE

12 1 1 0 0 MUTE SD SD 2(G

xL)+

2(G

xM)

2(G

xR)+

2(G

xM)

MUTE MUTE

13 1 1 0 1 MUTE SD SD 2(G

xL)+

2(G

xM)

2(G

xR)+

2(G

xM)

xL)+

xM)

xR)+

xM)

14 1 1 1 0 MUTE SD SD SD SD (G

xL)+

xM)

xR)+

xM)

151111(G

xM)

+(G

xL)

+(G

xR)

SD SD SD SD MUTE MUTE

M-M

IN Input Level

L-L

IN Input Level

R-R

IN Input Level

GM- Mono Volume Control Gain

GL- Left Stereo Volume Control Gain

GR- Right Stereo Volume Control Gain

SD - Shutdown

MUTE - Mute

TABLE 6. National 3D Enhancement

LD5 0 Loudspeaker National 3D Off

1 Loudspeaker National 3D On

RD5 0 Headphone National 3D Off

1 Headphone National 3D On

TABLE 7. Wake-up Time Select

CD5 0 Fast Wake-up Setting

1 Slow Wake-up Setting

LM4857

www.national.com27

Application Information (Continued)

TABLE 8. Earpiece Amplifier Gain Select

CD4 0 0dB Earpiece Output Stage Gain Setting

1 6dB Earpiece Output Stage Gain Setting

C COMPATIBLE INTERFACE

The LM4857 uses a serial bus, which conforms to the I

protocol, to control the chip’s functions with two wires: clock

(SCL) and data (SDA). The clock line is uni-directional. The

data line is bi-directional (open-collector). The maximum

clock frequency specified by the I

C standard is 400kHz. In

this discussion, the master is the controlling microcontroller

and the slave is the LM4857.

The I

C address for the LM4857 is determined using the

ADR pin. The LM4857’s two possible I

C chip addresses are

of the form 111110X

0 (binary), where X

= 0, if ADR is logic

low; and X

= 1, if ADR is logic high. If the I

C interface is

used to address a number of chips in a system, the

LM4857’s chip address can be changed to avoid any pos-

sible address conflicts.

The bus format for the I

C interface is shown in Figure 2. The

bus format diagram is broken up into six major sections:

The "start" signal is generated by lowering the data signal

while the clock signal is high. The start signal will alert all

devices attached to the I

C bus to check the incoming ad-

dress against their own address.

The 8-bit chip address is sent next, most significant bit first.

The data is latched in on the rising edge of the clock. Each

address bit must be stable while the clock level is high.

After the last bit of the address bit is sent, the master

releases the data line high (through a pull-up resistor). Then

the master sends an acknowledge clock pulse. If the

LM4857 has received the address correctly, then it holds the

data line low during the clock pulse. If the data line is not

held low during the acknowledge clock pulse, then the mas-

ter should abort the rest of the data transfer to the LM4857.

The 8 bits of data are sent next, most significant bit first.

Each data bit should be valid while the clock level is stable

high.

After the data byte is sent, the master must check for another

acknowledge to see if the LM4857 received the data.

If the master has more data bytes to send to the LM4857,

then the master can repeat the previous two steps until all

data bytes have been sent.

The "stop" signal ends the transfer. To signal "stop", the data

signal goes high while the clock signal is high. The data line

should be held high when not in use.

C INTERFACE POWER SUPPLY PIN (I

)

The LM4857’s I

C interface is powered up through the

pin. The LM4857’s I

C interface operates at a volt-

age level set by the I

pin which can be set indepen-

dent to that of the main power supply pin V

. This is ideal

whenever logic levels for the I

C interface are dictated by a

microcontroller or microprocessor that is operating at a lower

supply voltage than the main battery of a portable system.

NATIONAL 3D ENHANCEMENT

The LM4857 features a 3D audio enhancement effect that

widens the perceived soundstage from a stereo audio signal.

The 3D audio enhancement improves the apparent stereo

channel separation whenever the left and right speakers are

too close to one another, due to system size constraints or

equipment limitations.

An external RC network, shown in Figure 1, is required to

enable the 3D effect. There are separate RC networks for

both the stereo loudspeaker outputs as well as the stereo

headphone outputs, so the 3D effect can be set indepen-

dently for each set of stereo outputs.

The amount of the 3D effect is set by the R

resistor.

Decreasing the value of R

will increase the 3D effect. The

capacitor sets the low cutoff frequency of the 3D effect.

Increasing the value of C

will decrease the low cutoff

frequency at which the 3D effect starts to occur, as shown by

Equation 1.

3D(-3dB)

=1/2π(R

)(C

) (1)

Activating the 3D effect will cause an increase in gain by a

multiplication factor of (1 + 9kΩ/R

). Setting R

to 9kΩwill

result in a gain increase by a multiplication factor of (1+

9kΩ/9kΩ)=2or6dBwhenever the 3D effect is activated.

The volume control can be programmed through the I

compatible interface to compensate for the extra 6dB in-

crease in gain. For example, if the stereo volume control is

set at 0dB (11011 from Table 4) before the 3D effect is

activated, the volume control should be programmed to

–6dB (10111 from Table 4) immediately after the 3D effect

has been activated. Setting R

= 20kΩand C

= 0.22µF

allows the LM4857 to produce a pronounced 3D effect with a

minimal increase in output noise.

EXPOSED-DAP MOUNTING CONSIDERATIONS

The LM4857’s exposed-DAP (die attach paddle) package

(SP) provides a low thermal resistance between the die and

the PCB to which the part is mounted and soldered. This

allows rapid heat transfer from the die to the surrounding

PCB copper area heatsink, copper traces, ground plane, and

finally, surrounding air. The result is a low voltage audio

power amplifier that produces 1.6W dissipation in a 4Ωload

at ≤1% THD+N and over 1.8W in a 3Ωload at 10% THD+N.

This high power is achieved through careful consideration of

necessary thermal design. Failing to optimize thermal design

may compromise the LM4857’s high power performance and

activate unwanted, though necessary, thermal shutdown

protection.

The SP package must have its DAP soldered to a copper

pad on the PCB. The DAP’s PCB copper pad is then, ideally,

connected to a large plane of continuous unbroken copper.

This plane forms a thermal mass, heat sink, and radiation

area. Place the heat sink area on either outside plane in the

case of a two-sided or multi-layer PCB. (The heat sink area

can also be placed on an inner layer of a multi-layer board.

The thermal resistance, however, will be higher.) Connect

the DAP copper pad to the inner layer or backside copper

heat sink area with 9 (3 X 3) (SP) vias. The via diameter

should be 0.012in - 0.013in with a 1.27mm pitch. Ensure

efficient thermal conductivity by plugging and tenting the vias

with plating and solder mask, respectively.

LM4857

www.national.com 28

Application Information (Continued)

Best thermal performance is achieved with the largest prac-

tical copper heat sink area. If the heatsink and amplifier

share the same PCB layer, a nominal 2in

area is necessary

for 5V operation with a 4Ωload. Heatsink areas not placed

on the same PCB layer as the LM4857 should be 4in

for the

same supply voltage and load resistance. The last two area

recommendations apply for 25˚C ambient temperature. In-

crease the area to compensate for ambient temperatures

above 25˚C. In all circumstances and under all conditions,

the junction temperature must be held below 150˚C to pre-

vent activating the LM4857’s thermal shutdown protection.

An example PCB layout for the exposed-DAP SP package is

shown in the Demonstration Board Layout section. Further

detailed and specific information concerning PCB layout and

fabrication and mounting an SP (LLP) is found in National

Semiconductor’s AN1187.

PCB LAYOUT AND SUPPLY REGULATION

CONSIDERATIONS FOR DRIVING 3ΩAND 4ΩLOADS

Power dissipated by a load is a function of the voltage swing

across the load and the load’s impedance. As load imped-

ance decreases, load dissipation becomes increasingly de-

pendent on the interconnect (PCB trace and wire) resistance

between the amplifier output pins and the load’s connec-

tions. Residual trace resistance causes a voltage drop,

which results in power dissipated in the trace and not in the

load as desired. For example, 0.1Ωtrace resistance reduces

the output power dissipated by a 4Ωload from 1.6W to 1.5W.

The problem of decreased load dissipation is exacerbated

as load impedance decreases. Therefore, to maintain the

highest load dissipation and widest output voltage swing,

PCB traces that connect the output pins to a load must be as

wide as possible.

Poor power supply regulation adversely affects maximum

output power. A poorly regulated supply’s output voltage

decreases with increasing load current. Reduced supply

voltage causes decreased headroom, output signal clipping,

and reduced output power. Even with tightly regulated sup-

plies, trace resistance creates the same effects as poor

supply regulation. Therefore, making the power supply

traces as wide as possible helps maintain full output voltage

swing.

BRIDGE CONFIGURATION EXPLANATION

The LM4857 consists of three sets of a bridged-tied amplifier

pairs that drive the left loudspeaker (LLS), the right loud-

speaker (RLS), and the mono earpiece (EP). For this discus-

sion, only the LLS bridge-tied amplifier pair will be referred

to. The LM4857 drives a load, such as a speaker, connected

between outputs, LLS+ and LLS-. In the LLS amplifier block,

the output of the amplifier that drives LLS- serves as the

input to the unity gain inverting amplifier that drives LLS+.

This results in both amplifiers producing signals identical in

magnitude, but 180˚ out of phase. Taking advantage of this

phase difference, a load is placed between LLS- and LLS+

and driven differentially (commonly referred to as ’bridge

mode’). This results in a differential or BTL gain of:

= 2(R

)=2 (2)

Both the feedback resistor, R

, and the input resistor, R

, are

internally set.

Bridge mode amplifiers are different from single-ended am-

plifiers that drive loads connected between a single amplifi-

er’s output and ground. For a given supply voltage, bridge

mode has a distinct advantage over the single-ended con-

figuration: its differential output doubles the voltage swing

across the load. Theoretically, this produces four times the

output power when compared to a single-ended amplifier

under the same conditions. This increase in attainable output

power assumes that the amplifier is not current limited and

that the output signal is not clipped.

Another advantage of the differential bridge output is no net

DC voltage across the load. This is accomplished by biasing

LLS- and LLS+ outputs at half-supply. This eliminates the

coupling capacitor that single supply, single-ended amplifiers

require. Eliminating an output coupling capacitor in a typical

single-ended configuration forces a single-supply amplifier’s

half-supply bias voltage across the load. This increases

internal IC power dissipation and may permanently damage

loads such as speakers.

POWER DISSIPATION

Power dissipation is a major concern when designing a

successful single-ended or bridged amplifier.

A direct consequence of the increased power delivered to

the load by a bridge amplifier is higher internal power dissi-

pation. The LM4857 has 3 sets of bridged-tied amplifier pairs

driving LLS, RLS, and EP. The maximum internal power

dissipation operating in the bridge mode is twice that of a

single-ended amplifier. From Equation (3) and (4), assuming

a 5V power supply and an 8Ωload, the maximum power

dissipation for LLS and RLS is 634mW per channel. From

equation (5), assuming a 5V power supply and a 32Ωload,

the maximum power dissipation for EP is 158mW.

DMAX-LLS

= 4(V

)

/(2π

): Bridged (3)

DMAX-RLS

= 4(V

)

/(2π

): Bridged (4)

DMAX-EP

= 4(V

)

/(2π

): Bridged (5)

The LM4857 also has 3 sets of single-ended amplifiers

driving LHP, RHP, and LINEOUT. The maximum internal

power dissipation for ROUT and LOUT is given by equation

(6) and (7). From Equations (6) and (7), assuming a 5V

power supply and a 32Ωload, the maximum power dissipa-

tion for LOUT and ROUT is 40mW per channel. From equa-

tion (8), assuming a 5V power supply and a 5kΩload, the

maximum power dissipation for LINEOUT is negligible.

DMAX-LHP

=(V

)

/(2π

): Single-ended (6)

DMAX-RHP

=(V

)

/(2π

): Single-ended (7)

DMAX-LINE

=(V

)

/(2π

): Single-ended (8)

The maximum internal power dissipation of the LM4857

occurs during output modes 3, 8, and 13 when both loud-

speaker and headphone amplifiers are simultaneously on;

and is given by Equation (9).

DMAX-TOTAL

DMAX-LLS

DMAX-RLS

DMAX-LHP

DMAX-RHP

(9)

LM4857

www.national.com29

Application Information (Continued)

The maximum power dissipation point given by Equation (9)

must not exceed the power dissipation given by Equation

(10):

DMAX

’=(T

JMAX

-T

)/θ

(10)

The LM4857’s T

JMAX

= 150˚C. In the ITL package, the

LM4857’s θ

is 62˚C/W. At any given ambient temperature

, use Equation (10) to find the maximum internal power

dissipation supported by the IC packaging. Rearranging

Equation (10) and substituting P

DMAX-TOTAL

for P

DMAX

’ re-

sults in Equation (11). This equation gives the maximum

ambient temperature that still allows maximum stereo power

dissipation without violating the LM4857’s maximum junction

temperature.

JMAX

-P

DMAX-TOTAL

(11)

For a typical application with a 5V power supply, stereo 8Ω

loudspeaker load, and the stereo 32Ωheadphone load, the

maximum ambient temperature that allows maximum stereo

power dissipation without exceeding the maximum junction

temperature is approximately 66.4˚C for the ITL package.

JMAX

DMAX-TOTAL

(12)

Equation (12) gives the maximum junction temperature T

J-

MAX

. If the result violates the LM4857’s 150˚C, reduce the

maximum junction temperature by reducing the power sup-

ply voltage or increasing the load resistance. Further allow-

ance should be made for increased ambient temperatures.

The above examples assume that a device is a surface

mount part operating around the maximum power dissipation

point. Since internal power dissipation is a function of output

power, higher ambient temperatures are allowed as output

power or duty cycle decreases. If the result of Equation (9) is

greater than that of Equation (10), then decrease the supply

voltage, increase the load impedance, or reduce the ambient

temperature. If these measures are insufficient, a heat sink

can be added to reduce θ

. The heat sink can be created

using additional copper area around the package, with con-

nections to the ground pin(s), supply pin and amplifier output

pins. External, solder attached SMT heatsinks such as the

Thermalloy 7106D can also improve power dissipation.

When adding a heat sink, the θ

is the sum of θ

,θ

, and

.(θ

is the junction-to-case thermal impedance, θ

the case-to-sink thermal impedance, and θ

is the sink-to-

ambient thermal impedance.) Refer to the Typical Perfor-

mance Characteristics curves for power dissipation informa-

tion at lower output power levels.

POWER SUPPLY BYPASSING

As with any power amplifier, proper supply bypassing is

critical for low noise performance and high power supply

rejection. Applications that employ a 5V regulator typically

use a 10µF in parallel with a 0.1µF filter capacitors to stabi-

lize the regulator’s output, reduce noise on the supply line,

and improve the supply’s transient response. However, their

presence does not eliminate the need for a local 1.0µF

tantalum bypass capacitance connected between the

LM4857’s supply pins and ground. Keep the length of leads

and traces that connect capacitors between the LM4857’s

power supply pin and ground as short as possible.

SELECTING EXTERNAL COMPONENTS

Input Capacitor Value Selection

Amplifying the lowest audio frequencies requires a high

value input coupling capacitor (C

in Figure 1). In many

cases, however, the speakers used in portable systems,

whether internal or external, have little ability to reproduce

signals below 50Hz. Applications using speakers with this

limited frequency response reap little improvement; by using

a large input capacitor.

The internal input resistor (R

) and the input capacitor (C

)

produce a high pass filter cutoff frequency that is found using

Equation (13).

=1/(2πR

) (13)

As an example when using a speaker with a low frequency

limit of 50Hz and R

= 20kΩ,C

, using Equation (13) is

0.19µF. The 0.22µF C

shown in Figure 4 allows the LM4857

to drive high efficiency, full range speaker whose response

extends below 40Hz.

Output Capacitor Value Selection

Amplifying the lowest audio frequencies also requires the

use of a high value output coupling capacitor (C

in Figure

1). A high value output capacitor can be expensive and may

compromise space efficiency in portable design.

The speaker load (R

) and the output capacitor (C

) form a

high pass filter with a low cutoff frequency determined using

Equation (14).

=1/(2πR

) (14)

When using a typical headphone load of R

=32Ωwith a low

frequency limit of 50Hz, C

is 99µF.

The 100µF C

shown in Figure 4 allows the LM4857 to drive

a headphone whose frequency response extends below

50Hz.

Bypass Capacitor Value Selection

Besides minimizing the input capacitor size, careful consid-

eration should be paid to value of C

, the capacitor con-

nected to the BYPASS pin. Since C

determines how fast

the LM4857 settles to quiescent operation, its value is critical

when minimizing turn-on pops. The slower the LM4857’s

outputs ramp to their quiescent DC voltage (nominally V

2), the smaller the turn-on pop. Choosing C

equal to 2.2µF

along with a small value of C

(in the range of 0.1µF to

0.39µF), produces a click-less and pop-less shutdown func-

tion. As discussed above, choosing C

no larger than neces-

sary for the desired bandwidth helps minimize clicks and

pops. C

’s value should be in the range of 5 times to 10

times the value of C

. This ensures that output transients are

eliminated when the LM4857 transitions in and out of shut-

down mode. Connecting a 2.2µF capacitor, C

, between the

BYPASS pin and ground improves the internal bias voltage’s

stability and improves the amplifier’s PSRR. The PSRR im-

provements increase as the bypass pin capacitor value in-

creases. However, increasing the value of C

will increase

wake-up time. The selection of bypass capacitor value, C

LM4857

www.national.com 30

Application Information (Continued)

depends on desired PSRR requirements, click and pop per-

formance, wake-up time, system cost, and size constraints.

20079709

FIGURE 4. Reference Design Board Schematic

LM4857

www.national.com31

Demonstration Board ITL PCB Layout

20079707

Recommended ITL PCB Layout:

Top Silkscreen

20079706

Recommended ITL PCB Layout:

Top Layer

20079704

Recommended ITL PCB Layout:

Inner Layer 1

20079705

Recommended ITL PCB Layout:

Inner Layer 2

LM4857

www.national.com 32

Demonstration Board ITL PCB Layout (Continued)

20079703

Recommended ITL PCB Layout:

Bottom Layer

LM4857

www.national.com33

Demonstration Board SP PCB Layout

200797I9

Recommended SP PCB Layout:

Top Over Layer

200797I8

Recommended SP PCB Layout:

Top Layer

200797I7

Recommended SP PCB Layout:

Mid Layer

200797I6

Recommended SP PCB Layout:

Bottom Layer

LM4857

www.national.com 34

Revision History

Rev Date Description

1.1 6/03/05 Changed the numerical value of 20 into 9 in the

last paragraph of "NATIONAL 3D ENHANCEMENT

(per Alvin F.), then re-released D/S to the WEB.

(MC)

1.2 6/07/05 Deleted all references on GR pkg (GR pkgs on

HOLD) per Kevin Chen, then re-WEBd the D/S.

(MC)

LM4857

www.national.com35

Physical Dimensions inches (millimeters) unless otherwise noted

30-Bump micro SMD

Order Number LM4857ITL

NS Package Number TLA30CZA

= 2.543 ±0.03 X

= 2.949 ±0.03 X

= 0.6 ±0.075

LM4857

www.national.com 36

Physical Dimensions inches (millimeters) unless otherwise noted (Continued)

28 — Lead SP Package

Order Number LM4857SP

NS Package Number SPA28A

National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves

the right at any time without notice to change said circuitry and specifications.

For the most current product information visit us at www.national.com.

LIFE SUPPORT POLICY

NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS

WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR

CORPORATION. As used herein:

1. Life support devices or systems are devices or systems

which, (a) are intended for surgical implant into the body, or

(b) support or sustain life, and whose failure to perform when

properly used in accordance with instructions for use

provided in the labeling, can be reasonably expected to result

in a significant injury to the user.

2. A critical component is any component of a life support

device or system whose failure to perform can be reasonably

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LM4857 Stereo 1.2W Audio Sub-system with 3D Enhancement

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