L9997ND013TR - STMicroelectronics

L9997ND

DUAL HALF BRIDG E DRIVER

HALF BRIDGE OUTPUTS WITH TYPICAL

RON = 0.7Ω

OUTP UT CURREN T CAPA B ILITY ±1.2A

OPERATING SUPPLY VOLTAGE RANGE 7V

TO 16.5V

SUPPLY OVERVOLTAGE PROTECTION

FUNCTION FOR VVS UP TO 40V

VERY LOW QUIESCENT CURRENT IN

STANDBY MODE < 1µA

CMOS COMPATIBLE INPUTS WITH HYS-

TERESIS

OUTPUT SHORT- C IR C U IT PROTECTION

THERMA L SHUTDOW N

REAL TIME DIAGNOSTIC: THERMAL OVER-

LOAD, OVERVOLTAGE

DESCRIPTION

The L9997ND is a m onolithic int egrated driver, in

BCD technology intended to drive various loads, including DC motors. The circuit is optimized for

automotive electronics enviromental conditions.

April 1999

OUT1

OUT2

GND

IN1

IN2

DIAG

4...7, 14...17

VS VS

PROTECTION

FUNCTIONS

REFERENCE

BIAS

DRIVER 1

DRIVER 2

ENABLE

BLOCK DIAGRAM

SO20 (12+4+4)

ORDERING NUMBERS: L9997ND

L9997ND013TR

MULTIPOWER BCD TECHN OLOGY

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ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

VVSDC DC Supply Voltage -0.3 to 26 V

VVSP Supply Voltage Pulse (T < 400ms) 40 V

IOUT DC Output Current ±1.8 A

VIN1,2 DC Input Voltage -0.3 to 7 V

VEN Enable Input Voltage -0.3 to 7 V

VDIAG DC Output Voltage -0.3 to 7 V

IOUT DC Output Short-circuit Current -0.3V < VOUT < VS + 0.3V internally limited

IDIAG DC Sink Current -0.3V < VDG < 7V internally limited

THERMAL DATA

Symbol Parameter Value Unit

TjTS Thermal Shut-down Junction Temperature 165 °C

TjTSH Thermal Shut-down Threshold Hysteresis 25 K

Rth j-amb Thermal Resistance Junction-Ambient (1) 50 K/W

Rth j-pins Thermal Resistance Junction-Pins 15 K/W

(1) With 6cm2 on board heatsink area.

OUT2

N.C.

GND

N.C.

IN2 IN1

N.C.

GND

N.C.

OUT1

N.C.1

EN DIAG

D95AT166

PIN C ONNECTION (Top view)

PIN FUNCT IONS

N. Name Function

1 VS Supply Voltage

2 OUT2 Channel 2: Push-Pull power output with intrinsic body diode

3, 8, 13,

18,20 NC NC: Not Connected

4 to 7,

14 to 17 GND Ground: signal - and power - ground, heat sink

9 IN2 Input 2: Schmitt Trigger input with hysteresis (non-inverting signal control)

10 EN Enable: LOW or not connected on this input switches the device into standby mode and the

outputs into tristate

11 DIAG Diagnostic: Open Drain Output that switches LOW if overvoltage or overtemperature is

detected

12 IN1 Input 1: Schmitt Trigger input with hysteresis (non-inverting signal control)

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ELECTRICA L CHARACTERI STICS (7V < VS < 16.5V; -40°C < TJ < 150°C; unless otherwise specified.)

Symbol Parameter Test Condition Min. Typ. Max. Unit

IVS_SB Quiescent Current in Standby

Mode VEN < 0.3V; VVS <16.5V; Tj < 85°(*)

VEN = 0; VVS = 14.5V; Tj = 25°C <1

<1 90

10 µA

µA

IVS Supply Current EN = HIGH, IOUT1,2 = 0 2 6 mA

VENL Low Enable Voltage 1.5 V

VENH High Enable Voltage 3.5 6 V

VENthh Enable Threshold Hysteresis 1 V

IEN Enable Input Current VEN = 5V 85 250 µA

VIN1,2L Low Input Voltage 1.5 V

VIN1,2H High Input Voltage 3.5 V

VIN1,2thh Input Threshold Hysteresis 1 V

IIN1,2 Input Bias Current VIN = 0

VIN = 5V, EN = HIGH -3

10 1

50 µA

µA

RON OUT1,2 ON-Resistance to Supply or

GND IOUT = ±0.8A; VVS = 7V; Tj = 125°C

IOUT = ±0.8A; VVS = 12V; Tj = 125°C

IOUT = ±0.8A; VVS = 12V; Tj = 25°C

1.2

1.1

0.7

2.8

2.25 Ω

Ω

|IOUT1,2| Output Current Limitation 1.2 1.6 2.2 A

VDIAG Diagnostic Output Drop IDIAG = 0.5mA, EN = HIGH

Overvoltage or Thermal Shut-

down

0.6 V

VVSOVth Supply Overvoltage

Threshold 17 19 21 V

tONLH Turn on Delay Time See Fig. 2; VVS = 13.5V

Measured with 93Ω load 50 150 µs

tONHL 30 150 µs

tOFFHL Turn off Delay Time 10 100 µs

tOFFLH 220

dHL Rising Delay Time 115 250 µs

tdLH Falling Delay Time 115 250 µs

trHS Rise Time 30 100 µs

trLS 60 150 µs

tfHS Fall Time 25 100 µs

tfLS 50 150 µs

* Tested at 125°C and guaranteed by correlation

FUNCTIONAL DESCRIPTION

The L9997ND is a motor driver two half-bridge

outputs, intended for driving dc motor s in automo-

tive systems. The basic function of the device is

shown in the Table 1.

Table 1. Table function.

Status EN IN1 IN2 OUT1 OUT2 DIAG NOTE

1 L X X Tristate Tristate OFF Standby Mode

2 H H H SRC SRC OFF Recommended for braking

3 H H L SRC SNK OFF

4HLHSNKSRCOFF

5 H L L SNK SNK OFF

6 H X X Tristate Tristate ON Overvoltage or Overtemperature

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The device is activated with enable input voltage

HIGH. For enable input floating (not connected)

or LOW the device is in Standby Mode. Very low

quiescent current is defined for VEN < 0.3V. When

activating or disactivating the device by the en-

able input a wake-up time of 50µs is recom-

mended.

For braking of the motor the status 2 is recom-

mended. The reason for this recommendation is

that the device features higher threshold for ini-

tialisation of parasitic structures than in state 5.

The inputs IN1, IN2 features internal sink current

generators of 10µA, disabled in standby mode.

With th ese input current generators the input level

is forced to LO W for input s open. In this condit ion

the outputs are in SNK state.

The circuit features an overvoltage disable func-

tion referred to the s upply voltage VVS. This func-

tion assures disabling the power outputs, when

the supply voltage exceeds the over voltage

threshold value of 19V typ. Both outputs are

forced to tris tat e in this condition and the diagnos-

tic output is ON.

The thermal shut-down disables the outputs (tris-

tate) and activates the diagnostic when the junc-

tion temperature increases above the thermal

shut-down threshold temperature of min. 150°C.

For the start of a heavy loaded motor, if the motor

current reaches the max. value, it is necessary to

respect the dynamical thermal resistance junction

to ambient. The outputs OUT1 and OUT2 are pro-

tected against short circuit to GND or VS, f or sup-

ply voltages up to the overvoltage disable thresh-

old.

The output power DMOS transistors works in lin-

ear mode for an output current less than 1.2A. In-

creasing the out put load current (> 1.2A) the out-

put transistor changes in the current regulation

mode, see Fig.6, with the typical output current

value below 2A. The SRC output power DMOS

transistors requires a voltage dr op ~3V to activate

the current regulation. Below this voltage drop is

the device also protected. The output current heat

up the power DMOS transistor, the RDSON in-

creases with the junction temperature and de-

creases the output current. The power dissipation

in this condition can activate the thermal shut-

down . In the case of output disable due to ther-

mal overload the output remains disabled untill

the junction temperature decreases under the

thermal enable threshold.

Permanent short circuit condition with power dis-

sipation leading to chip overheating and activation

of t he thermal shut-down leads t o the thermal os-

cillation. The junction temperature difference be-

tween the switch ON and OFF points is the ther-

mal hysteresis of the thermal protection. This

hysteresis together with the thermal impedance

and ambient temperature determines the fre-

quency of this thermal oscillation, its typical val-

ues are in the range of 10kH z.

The open drain diagnostic output needs an exter-

nal pull-up resistor to a 5V supply. In systems

with several L9997ND the diagnostic outputs can

be connected together with a common pull -up re-

sistor. The DIAG output current is internally lim-

ited.

Fig. 1 shows a typical application diagram for the

DC motor driving. To assure the safety of the cir-

cuit in the reverse battery condition a r ev erse pro-

tection diode D1 is necessary. The transient pro-

tection diode D2 must assure that the maximal

supply voltage VVS during the transients at the

VBAT line will be limited to a value lower than the

absolute maximum rating for VVS.

IN1

IN2

GND

DIAG1

CONTROL

LOGIC

47KΩ

IDIAG1

IIN1

IIN2

IEN EN

VBAT

L9997ND

OUT1

IOUT1

IOUT2

OUT2

GND

Figure 1: Application Circuit Diagram.

L9997ND

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IN1

IN2

DIAG

OUT1

OUT2

Standby Mode Operating Mode Overtemperature

or Over voltage Standby Mode

trf

dLH

tdHL

tOFFLH

Tristate

90%

50%

10%

tONHL

Tristate

tdHL

tOFFHL

tdLH tdHL

tdLH

tdHL

Tristate

tONLH tdLH

Figure 2. Timing Diagram.

Figure 3. Typica l R ON - Characteristics of Source and Sink Stage

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Figure 5. ON-Resist ance versus supply voltage.

Figure 4. Quiescent current in standby mode versus supply voltage.

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OUT1

OUT2

IN1

IN2

GND

DIAG

10kΩ

200nF

100µF

12V

VEN

15Ω

IN1

VIN2

L9997ND

15Ω

Figure 7. Test circuit.

Figure 6. IOUT versus VOUT (pulsed measurement with TON = 500µs, TOFF = 500m s).

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are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

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