CBT3126DS,118 - NXP Semiconductors

1. General description

The CBT3126 is a quad FET bus switch with independent line switches. Each switch is

disabled when the associated Output Enable (OE) input is LOW.

The CBT3126 is characterized for operation from −40 °Cto+85°C.

2. Features

nStandard ’126-type pinout

nMultiple package options

n5Ω switch connection between two ports

nTTL-compatible input levels

nMinimal propagation delay through the switch

nLatch-up protection exceeds 500 mA per JEDEC standard JESD78 class II level A

nESD protection:

uHBM JESD22-A114E exceeds 2000 V

uMM JESD22-A115-A exceeds 200 V

uCDM JESD22-C101C exceeds 1000 V

nSpeciﬁed from −40 °Cto+85°C

3. Ordering information

[1] Also known as QSOP16.

CBT3126

Quad FET bus switch

Rev. 04 — 12 October 2009 Product data sheet

Table 1. Ordering information

Type number Temperature range Package

Name Description Version

CBT3126D −40 °Cto+85°C SO14 plastic small outline package; 14 leads;

body width 3.9 mm SOT108-1

CBT3126DB −40 °Cto+85°C SSOP14 plastic shrink small outline package; 14 leads;

body width 5.3 mm SOT337-1

CBT3126PW −40 °Cto+85°C TSSOP14 plastic thin shrink small outline package; 14 leads;

body width 4.4 mm SOT402-1

CBT3126DS −40 °Cto+85°C SSOP16[1] plastic shrink small outline package; 16 leads;

body width 3.9 mm; lead pitch 0.635 mm SOT519-1

Product data sheet Rev. 04 — 12 October 2009 2 of 13

NXP Semiconductors CBT3126

Quad FET bus switch

4. Functional diagram

5. Pinning information

5.1 Pinning

5.2 Pin description

Pin numbers are for the 14 pin packages.

Fig 1. Logic symbol Fig 2. Logic diagram

001aaj023

4OE

4A 4B

3OE

3A 3B

2OE

2A 2B

1OE

1A 1B

001aaj024

1OE

2OE

3OE

12 11

4OE

Fig 3. Pin conﬁguration

SOT108-1 (SO14) Fig 4. Pin conﬁguration

SOT337-1 (SSOP14) and

SOT402-1 (TSSOP14)

Fig 5. Pin conﬁguration

SOT519-1 (SSOP16)

CBT3126

1OE VCC

1A 4OE

1B 4A

2OE 4B

2A 3OE

2B 3A

GND 3B

001aaj111

7 8

13 CBT3126

1OE VCC

1A 4OE

1B 4A

2OE 4B

2A 3OE

2B 3A

GND 3B

001aaj025

CBT3126

n.c. VCC

1OE 4OE

1A 4A

1B 4B

2OE 3OE

2A 3A

2B 3B

GND n.c.

001aaj026

Table 2. Pin description

Symbol Pin Description

SOT108-1 SOT337-1 and SOT402-1 SOT519-1

1OE to 4OE 1, 4, 10, 13 2, 5, 12, 15 output enable input

1A to 4A, 2, 5, 9, 12 3, 6, 11, 14 A input/output

1B to 4B 3, 6, 8, 11 4, 7, 10, 13 B output/input

Product data sheet Rev. 04 — 12 October 2009 3 of 13

NXP Semiconductors CBT3126

Quad FET bus switch

6. Functional description

7. Limiting values

[1] The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.

[2] The package thermal impedance is calculated from JESD51-7.

[3] For SO14 package; Ptot derates linearly with 8 mW/K above 70 °C.

[4] For SSOP14, SSOP16 and TSSOP14 packages; Ptot derates linearly with 5.5 mW/K above 70 °C.

8. Recommended operating conditions

GND 7 8 ground (0 V)

VCC 14 16 positive supply voltage

n.c. - 1, 9 not connected

Table 2. Pin description

…continued

Symbol Pin Description

SOT108-1 SOT337-1 and SOT402-1 SOT519-1

Table 3. Function selection

H = HIGH voltage level; L = LOW voltage level.

Inputs Switch

nOE

L nA to nB disconnected

H nA to nB connected

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol Parameter Conditions Min Max Unit

VCC supply voltage −0.5 +7.0 V

VIinput voltage [1] −0.5 +7.0 V

ISW switch current continuous current through each switch - 128 mA

IIK input clamping current VI<0V −50 - mA

Tstg storage temperature −65 +150 °C

Ptot total power dissipation Tamb = −40 °C to +125 °C[2]

SO14 package [3] - 500 mW

SSOP14 and SSOP16 package [4] - 500 mW

TSSOP14 package [4] - 500 mW

Table 5. Operating conditions

All unused control inputs of the device must be held at V

or GND to ensure proper device operation.

Symbol Parameter Conditions Min Max Unit

VCC supply voltage 4.5 5.5 V

VIH HIGH-level input voltage 2.0 - V

VIL LOW-level input voltage - 0.8 V

Tamb ambient temperature operating in free-air −40 +85 °C

Product data sheet Rev. 04 — 12 October 2009 4 of 13

NXP Semiconductors CBT3126

Quad FET bus switch

9. Static characteristics

[1] All typical values are measured at VCC =5V; T

amb =25°C.

[2] This is the increase in supply current for each input that is at the speciﬁed TTL voltage level rather than VCC or GND.

[3] Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. ON resistance is

determined by the lowest voltage of the two (A or B) terminals.

10. Dynamic characteristics

[1] This parameter is warranted but not production tested. The propagation delay is based on the RC time constant of the typical ON

resistance of the switch and a load capacitance, when driven by an ideal voltage source (zero output impedance).

[2] tPLH and tPHL are the same as tpd;

tPZL and tPZH are the same as ten;

tPLZ and tPHZ are the same as tdis.

Table 6. Static characteristics

amb

−

C to +85

Symbol Parameter Conditions Min Typ[1] Max Unit

VIK input clamping voltage VCC = 4.5 V; II=−18 mA - - −1.2 V

Vpass pass voltage VI=V

CC = 5.0 V; ISW =−100 µA - 3.8 - V

IIinput leakage current VCC = 5.5 V; VI= GND or 5.5 V - - ±1µA

ICC supply current VCC = 5.5 V; ISW = 0 mA;

VI=V

CC or GND --3µA

∆ICC additional supply current control pins; per input;

VCC = 5.5 V; one input at 3.4 V,

other inputs at VCC or GND

[2] - - 2.5 mA

CIinput capacitance control pins; VI= 3 V or 0 V - 1.7 - pF

Cio(off) off-state input/output capacitance VO= 3 V or 0 V; nOE = VCC - 3.4 - pF

RON ON resistance VCC = 4.0 V [3]

VI= 2.4 V; II= 15 mA - 16 22 Ω

VCC = 4.5 V

VI=0V; I

I=64mA - 5 7 Ω

VI=0V; I

I=30mA - 5 7 Ω

VI= 2.4 V; II= 15 mA - 10 15 Ω

Table 7. Dynamic characteristics

amb

−

C to +85

C; V

= 4.5 V to 5.5 V; for test circuit see Figure 8.

Symbol Parameter Conditions Min Max Unit

tpd propagation delay nA to nB or nB to nA; see Figure 6 [1][2] - 0.25 ns

ten enable time nOE to nA or nB; see Figure 7 [2] 1.6 4.5 ns

tdis disable time nOE to nA or nB; see Figure 7 [2] 1.0 5.4 ns

Product data sheet Rev. 04 — 12 October 2009 5 of 13

NXP Semiconductors CBT3126

Quad FET bus switch

11. AC waveforms

Measurement points are given in Table 8.

VOL and VOH are typical voltage output levels that occur with the output load.

Fig 6. The input (nA, nB) to output (nB, nA) propagation delay times

001aai367

VMVM

input

0 V

VOH

output

VOL

tPHL tPLH

Measurement points are given in Table 8.

VOL and VOH are typical voltage output levels that occur with the output load.

Fig 7. Enable and disable times

001aaj027

tPLZ

tPHZ

switch

disabled switch

enabled

switch

enabled

output

LOW-to-OFF

OFF-to-LOW

output

HIGH-to-OFF

OFF-to-HIGH

nOE input

VOL

VOH

VCC

GND

tPZL

tPZH

Table 8. Measurement points

Input Output

VMVMVXVY

1.5 V 1.5 V VOL + 0.3 V VOH − 0.3 V

Product data sheet Rev. 04 — 12 October 2009 6 of 13

NXP Semiconductors CBT3126

Quad FET bus switch

12. Test information

Test data is given in Table 9.

Deﬁnitions for test circuit:

RL = Load resistance.

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.

VEXT = External voltage for measuring switching times.

Fig 8. Test circuit for measuring switching times

VMVM

10 %

90 %

0 V

negative

pulse

positive

pulse

0 V

VMVM

90 %

10 %

001aae331

VEXT

VCC

VIVO

DUT

Table 9. Test data

Supply voltage Input Load VEXT

VCC VItr, tfCLRLtPLH, tPHL tPLZ, tPZL tPHZ, tPZH

4.5 V to 5.5 V GND to 3.0 V ≤ 2.5 ns 50 pF 500 Ωopen 7.0 V open

Product data sheet Rev. 04 — 12 October 2009 7 of 13

NXP Semiconductors CBT3126

Quad FET bus switch

13. Package outline

Fig 9. Package outline SOT108-1 (SO14)

UNIT A

max. A1A2A3bpcD

(1) E(1) (1)

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

inches

1.75 0.25

0.10 1.45

1.25 0.25 0.49

0.36 0.25

0.19 8.75

8.55 4.0

3.8 1.27 6.2

5.8 0.7

0.6 0.7

0.3 8

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

1.0

0.4

SOT108-1

detail X

vMA

(A )

076E06 MS-012

pin 1 index

0.069 0.010

0.004 0.057

0.049 0.01 0.019

0.014 0.0100

0.0075 0.35

0.34 0.16

0.15 0.05

1.05

0.041

0.244

0.228 0.028

0.024 0.028

0.012

0.01

0.25

0.01 0.004

0.039

0.016

99-12-27

03-02-19

0 2.5 5 mm

scale

SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

Product data sheet Rev. 04 — 12 October 2009 8 of 13

NXP Semiconductors CBT3126

Quad FET bus switch

Fig 10. Package outline SOT337-1 (SSOP14)

UNIT A1A2A3bpcD

(1) E(1) eH

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.21

0.05 1.80

1.65 0.25 0.38

0.25 0.20

0.09 6.4

6.0 5.4

5.2 0.65 1.25 0.2

7.9

7.6 1.03

0.63 0.9

0.7 1.4

0.9 8

0.13 0.1

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

SOT337-1 99-12-27

03-02-19

(1)

vMA

14 8

detail X

(A )

MO-150

pin 1 index

0 2.5 5 mm

scale

SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1

max.

Product data sheet Rev. 04 — 12 October 2009 9 of 13

NXP Semiconductors CBT3126

Quad FET bus switch

Fig 11. Package outline SOT402-1 (TSSOP14)

UNIT A1A2A3bpcD

(1) E(2) (1)

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.15

0.05 0.95

0.80 0.30

0.19 0.2

0.1 5.1

4.9 4.5

4.3 0.65 6.6

6.2 0.4

0.3 0.72

0.38 8

0.13 0.10.21

DIMENSIONS (mm are the original dimensions)

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

0.75

0.50

SOT402-1 MO-153 99-12-27

03-02-18

0.25

14 8

detail X

(A )

vMA

0 2.5 5 mm

scale

TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1

max.

1.1

pin 1 index

Product data sheet Rev. 04 — 12 October 2009 10 of 13

NXP Semiconductors CBT3126

Quad FET bus switch

Fig 12. Package outline SOT519-1 (SSOP16)

UNIT A1A2A3bpcD

(1) E(1) eH

ELL

pZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.25

0.10 1.55

1.40 0.25 0.31

0.20 0.25

0.18 5.0

4.8 4.0

3.8 0.635 1

6.2

5.8 0.89

0.41 0.18

0.05 8

0.180.2 0.09

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.

SOT519-1 99-05-04

03-02-18

(1)

vMA

16 9

detail X

(A )

0 2.5 5 mm

scale

SSOP16: plastic shrink small outline package; 16 leads; body width 3.9 mm; lead pitch 0.635 mm SOT519-1

max.

1.73

Product data sheet Rev. 04 — 12 October 2009 11 of 13

NXP Semiconductors CBT3126

Quad FET bus switch

14. Abbreviations

15. Revision history

Table 10. Abbreviations

Acronym Description

CDM Charged Device Model

DUT Device Under Test

ESD ElectroStatic Discharge

HBM Human Body Model

MM Machine Model

TTL Transistor-Transistor Logic

Table 11. Revision history

Document ID Release date Data sheet status Change notice Supersedes

CBT3126_4 20091012 Product data sheet - CBT3126_3

Modiﬁcations: •Section 7 “Limiting values” changed ICC to ISW.

CBT3126_3 20081209 Product data sheet - CBT3126_2

CBT3126_2 20081023 Product data sheet - CBT3126_1

CBT3126_1 20011212 Product data sheet - -

Product data sheet Rev. 04 — 12 October 2009 12 of 13

NXP Semiconductors CBT3126

Quad FET bus switch

16. Legal information

16.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Deﬁnitions”.

[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.nxp.com.

16.2 Deﬁnitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modiﬁcations or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local NXP Semiconductors sales

ofﬁce. In case of any inconsistency or conﬂict with the short data sheet, the

full data sheet shall prevail.

16.3 Disclaimers

General — Information in this document is believed to be accurate and

reliable. However, NXP Semiconductors does not give any representations or

warranties, expressed or implied, as to the accuracy or completeness of such

information and shall have no liability for the consequences of use of such

information.

Right to make changes — NXP Semiconductors reserves the right to make

changes to information published in this document, including without

limitation speciﬁcations and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suitable for use in medical, military, aircraft,

space or life support equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors accepts no liability for inclusion and/or use of

NXP Semiconductors products in such equipment or applications and

therefore such inclusion and/or use is at the customer’s own risk.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes no

representation or warranty that such applications will be suitable for the

speciﬁed use without further testing or modiﬁcation.

Limiting values — Stress above one or more limiting values (as deﬁned in

the Absolute Maximum Ratings System of IEC 60134) may cause permanent

damage to the device. Limiting values are stress ratings only and operation of

the device at these or any other conditions above those given in the

Characteristics sections of this document is not implied. Exposure to limiting

values for extended periods may affect device reliability.

Terms and conditions of sale — NXP Semiconductors products are sold

subject to the general terms and conditions of commercial sale, as published

at http://www.nxp.com/proﬁle/terms, including those pertaining to warranty,

intellectual property rights infringement and limitation of liability, unless

explicitly otherwise agreed to in writing by NXP Semiconductors. In case of

any inconsistency or conﬂict between information in this document and such

terms and conditions, the latter will prevail.

No offer to sell or license — Nothing in this document may be interpreted

or construed as an offer to sell products that is open for acceptance or the

grant, conveyance or implication of any license under any copyrights, patents

or other industrial or intellectual property rights.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from national authorities.

16.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

17. Contact information

For more information, please visit: http://www.nxp.com

For sales ofﬁce addresses, please send an email to: salesaddresses@nxp.com

Document status[1][2] Product status[3] Deﬁnition

Objective [short] data sheet Development This document contains data from the objective speciﬁcation for product development.

Preliminary [short] data sheet Qualiﬁcation This document contains data from the preliminary speciﬁcation.

Product [short] data sheet Production This document contains the product speciﬁcation.

NXP Semiconductors CBT3126

Quad FET bus switch

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 12 October 2009

Document identifier: CBT3126_4

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

18. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

3 Ordering information. . . . . . . . . . . . . . . . . . . . . 1

4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2

5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2

5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 2

6 Functional description . . . . . . . . . . . . . . . . . . . 3

7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3

8 Recommended operating conditions. . . . . . . . 3

9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4

10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 4

11 AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 5

12 Test information. . . . . . . . . . . . . . . . . . . . . . . . . 6

13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7

14 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 11

15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11

16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12

16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12

16.2 Deﬁnitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

16.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 12

16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12

17 Contact information. . . . . . . . . . . . . . . . . . . . . 12

18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13