BL OCK DIAG RAM
UC1526A
UC2526A
UC3526A
Reg ulat ing Pulse Wi dth Mod ulator
FEATURES
•Reduced Supply Current
•Oscillator Frequency to 600kHz
•Precision Band-Gap Reference
•7 to 35V Operation
•Dual 200mA Source/Sink Outputs
•Minimum Output Cross-Conduction
•Double-Pulse Suppression Logic
•Under-Voltage Lockout
•Programmable Soft-Start
•Thermal Shutdown
•TTL/CMOS Compatible Logic P or ts
•5 Volt Operation (V IN = V C = VREF = 5.0V)
DESCRIPTION
Th e UC1526A Series are improved-performance pulse-width modu-
lator circuits intended for direct replacement of equivalent non- “A”
versions in all applications. Higher frequency operation has been
enhanced by several significant improvements including: a more ac-
curate oscillator with less minimum dead time, reduced circuit de-
lays (particularly in current limiting), and an improved output stage
with negligible cross-conduction current. Additional improvements
incl ude the incorporati on of a precisi on, band-g ap reference gener-
ator, reduced overall supply current, and the addition of thermal
shutdown protec tion.
Along with these improvements, the UC1526A Series retains the
protective features of under-voltage lockout, soft-start, digital cur-
rent limiting, double pulse suppression logic, and adjustable
deadtime. For ease of interfacing, all digital control ports are TTL
compat ible with active low logic.
Five volt (5V) operation is possible for “logic level” applications by
connecting VIN, VC and VREF to a precision 5V input supply . Consult
fact ory for additional informat ion.
6/93
RECOMMENDED OPERATING CONDITIONS
(Note 3)
Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7V to +35V
Collector Supply Volt age . . . . . . . . . . . . . . . . . . +4.5V t o +35 V
Sink/Sour ce Lo ad Cur ren t (each output ) . . . . . . . . 0 to 100m A
Refer ence Load Cur re nt. . . . . . . . . . . . . . . . . . . . . . 0 to 20m A
Oscillat or Frequ ency Range. . . . . . . . . . . . . . . . 1 Hz to 600kHz
Oscillat or Timing Resist or. . . . . . . . . . . . . . . . . . . 2kΩ to 150kΩ
Oscillat or Timing Capa cito r. . . . . . . . . . . . . . . . . 400pF to 20µF
Available Deadt ime Range at 40kHz . . . . . . . . . . . . 1% to 50%
Oper at ing Am bient Temper at ur e Range
UC1526A. . . . . . . . . . . . . . . . . . . . . . . . . . . . - 55°C t o +125°C
UC2526A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25°C t o +85°C
UC3526A. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
ABSOL UTE MAXIMUM RATINGS (Note 1, 2)
Input Voltage (+VIN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +40V
Co llector Supply Voltag e (+V C) . . . . . . . . . . . . . . . . . . . . . +40V
L ogic Input s . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V t o +5.5 V
An alog Input s . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +VIN
So urc e/ Sin k Load Curr ent (each out pu t) . . . . . . . . . . . . 200mA
Re fe ren ce Loa d Curr ent. . . . . . . . . . . . . . . . . . . . . . . . . . 50m A
L ogic Sink Cur ren t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15mA
Po wer Dissipa tion at T A = +25°C (Not e 2) . . . . . . . . . 1000mW
Po wer Dissipa tion at T C = +25°C (Note 2). . . . . . . . . . 3000mW
Op era ting Junct ion Te mp era ture . . . . . . . . . . . . . . . . . . +150°C
Storage Temperat ure Range . . . . . . . . . . . . . . -65°C to +150°C
L ead Te mpera tu re (solder ing, 10 seconds ). . . . . . . . . . +3 00°C
CONNECTION DIAGRAMS
PACKAGE PIN FUNCTION
FUNCTION PIN
N/C 1
+ERROR 2
-ERROR 3
COMP. 4
CSS 5
RESET 6
- CURRENT SENSE 7
+ CURRENT SENSE 8
SHUTDOWN 9
RTIMING 10
CT11
RD12
SYNC 13
OUTPUT A 14
VC15
N/C 16
GROUND 17
OUTPUT B 18
+VIN 19
VREF 20
PLCC- 20, LCC-20
(TOP VIEW)
Q and L Packag e s
DIL-18, S OIC-18 (TOP VIE W)
J or N Package, DW Package
Note 1: Va lu es beyond which damage m ay oc cur .
Note 2: Consult pa ckaging Section of Dat aboo k for ther ma l
limitat ions and conside rations of packag e. Note 3: Range ov er which th e device is funct iona l and
p ara me te r limit s are guar ant eed .
UC1526A
UC2526A
UC3526A
2
PARAMETER TEST CONDI TION S UC1526A / UC2526A UC3526A UNITS
MIN TYP MAX MIN TYP MAX
Refere nce S ec tion (Note 4)
Out put Voltage TJ = +25°C 4.95 5.00 5.05 4.90 5.00 5.10 V
Line Reg ulat ion + V IN = 7 to 35V 2 10 2 15 mV
Load Regulat ion I L = 0 to 20m A 5 20 5 20 mV
Tempe ratur e Stability Ov er Operating TJ (Note 5) 15 50 15 50 mV
Total O ut put Voltage
Range O v er Recom mended Op era ting
Conditions 4.90 5.00 5.10 4.85 5.00 5.15 V
Short Circuit Current VREF = 0V 25 50 100 25 50 100 mA
Under-Vol tag e Lockout
RESET Output Volt age V REF = 3.8V 0 .2 0.4 0 .2 0.4 V
VREF = 4.7V 2 .4 4.7 2 .4 4.8 V
Osci l lato r Sect io n (Note 6)
Initial Accu rac y TJ = +25°C ±3±8±3±8%
Voltage St ability + V IN = 7 to 35V 0.5 1 0.5 1 %
Tempe ratur e Stability Ov er Operating TJ (Note 5) 26 13%
Minimum Freque ncy R T = 150kΩ, CT = 20 µF (Note 5) 1 1 Hz
Maximum Frequency RT = 2kΩ, C T = 47 0pF 550 650 k Hz
Sawtoot h Pea k Voltage + VIN = 35V 3. 0 3.5 3. 0 3.5 V
Sawtoot h Valley Voltage + VIN =7V 0.5 1.0 0.5 1.0 V
SYNC Pulse Width T J = 25°C, RL = 2.7k Ω to VREF 1.1 1.1 µs
Error Ampli fier Sectio n (Note 7)
Input O ffset Volta ge RS ≤ 2kΩ25 210mV
Input Bias Current -350 -1000 -350 -2000 nA
Input O ffset Cu rrent 35 100 35 20 0 nA
DC Open Lo op G ain RL ≥ 10MΩ64 72 60 72 dB
HIGH Output Voltage VPIN 1 - VPIN 2 ≥ 150m V, ISOURCE = 100µA 3.6 4.2 3.6 4.2 V
LOW O ut put Voltage V PIN 2 - VPIN 1 ≥ 150mV, ISINK = 100µA 0.2 0.4 0.2 0.4 V
Comm on M ode Rejec tion R S ≤ 2kΩ70 94 70 94 dB
Supply Voltage Rejection +VIN = 12 to 18V 66 80 66 80 dB
PWM Compa rator (Not e 6)
Minimum Dut y Cycle VCOM PENSATION = +0.4V 0 0 %
Maximum Duty Cycle VCOMPENSATION = +3.6V 45 49 45 49 %
Digital Ports ( SYNC, SHUTDOWN, and RESET)
HIGH Output Voltage ISOURCE = 40 µA 2.4 4.0 2.4 4.0 V
LOW O ut put Voltage I SINK = 3.6mA 0 .2 0.4 0 .2 0.4 V
HIGH Input Current VIH = +2.4V -125 -200 -125 -200 µA
LOW Input Current VIL = +0.4V -225 -36 0 -225 -36 0 µA
Shutdo wn Delay F rom Pin 8, TJ = 25°C 160 1 60 ns
Curren t Lim it Compar ato r (Note 8)
Sense Volta ge RS ≤ 50Ω90 100 110 80 100 120 mV
Input Bias Current -3 -10 -3 -10 µA
Shutdo wn Delay F rom pin 7, 100mV O ver driv e, TJ = 25° C 260 2 60 ns
+VIN = 15V, and over operating ambient temperature, unless ot herwise specified TA = TJ.
ELECTRICAL CHARACTERISTICS:
Note 4: I
L =
0m A.
No te 5: Guaranteed by design, not 100% tes te d in product ion.
Note 6: F
OSC
= 40kHz, (R
T
= 4. 12k
Ω
±
1%, C
T
= 0. 01
µ
F
±
1% ,
R
D
= 0
Ω
).
Note 7: V
CM
= 0 to +5.2V
Note 8: V
CM
= 0 to +12V.
Note 9: V
C
= +15V.
Note 10:V
IN
= +35V, R
T
= 4. 12k
Ω
.
UC1526A
UC2526A
UC3526A
3
ELECTRICAL CHARACTERISTICS:
PARAMETER TEST CONDI TION S UC1526A
UC2526A UC3526A UNITS
MIN TYP MAX MIN TYP MAX
Soft- Star t Secti on
Error Clamp Voltage RESET = +0.4V 0.1 0.4 0.1 0.4 V
CS Charging Current RESET = +2.4V 50 100 150 50 100 150 µA
Out put Driver s (Eac h Output) (Note 9)
HIGH Output Voltage ISOURCE = 20mA 12.5 13.5 12.5 13.5 V
ISOURCE = 10 0m A 12 1 3 12 13 V
LOW O ut put Voltage I SINK = 20mA 0.2 0.3 0.2 0.3 V
ISINK = 100mA 1.2 2.0 1.2 2.0 V
Collector Leakage VC = 40V 50 150 50 150 µA
Rise Time CL = 10 00pF (Not e 5) 0.3 0.6 0.3 0.6 µs
Fall Time CL = 10 00pF (Not e 5) 0.1 0.2 0.1 0.2 µs
Cross- Condu ction Char ge Pe r cycle, T J = 25°C 8 8 n C
Power Consu mp tion (Note 10)
Standb y Curr ent SHUTDOWN = +0.4V 14 20 14 20 mA
Note 4: I
L =
0m A.
No te 5: Guaranteed by design, not 100% tes te d in product ion.
Note 6: F
OSC
= 40kHz, (R
T
= 4. 12k
Ω
±
1%, C
T
= 0. 01
µ
F
±
1% ,
R
D
= 0
Ω
).
Note 7: V
CM
= 0 to +5.2V
Note 8: V
CM
= 0 to +12V.
Note 9: V
C
= +15V.
Note 10:V
IN
= +35V, R
T
= 4. 12k
Ω
.
Ope n Loop Te st Circ uit UC15 26A
+VIN = 15V, and over operating ambient temperature, unless otherwise specified TA = TJ.
UC1526A
UC2526A
UC3526A
4
APPLICATIONS INFORMATION
Voltage Reference
The reference regulator of the UC1526A is based on a
precision band-gap reference, internally trimmed t o ±1%
accuracy. The circuitry is fully active at supply voltages
above +7V, and provides up to 20mA of load current to
external circuitry at +5.0V. In systems where additional
current is required, an external PNP transistor can be
used to boost the available current. A rugged low fre-
quency audio-type transistor should be used, and lead
lengths between the PWM and transistor should be as
short as possible to minimize the risk of oscillations.
Even so, some types of transistors may require collec-
tor-base capacitance for stability. Up to 1 amp of load
current can be obtained with excellent regulation if the
dev ice selected maintains h igh current ga in.
Soft -Start Circu it
The soft-start circuit protects the power transistors and
rectifier diodes from high current surges during power
supply turn-on. When supply voltage is first applied to
the UC1526A, the under-voltage lockout circuit holds
RESET LOW with Q3. Q1 is tu rned on, which holds the
soft-start ca pacitor voltage at zero. The second co llector
of Q1 clamps the output of the error amplifier to ground,
guaranteeing zero duty cycle at the driver outputs.
When the supply voltage reaches normal operating
range,
RESET will go HIGH. Q1 turns off, allowing the
internal 100µA current source to charge CS. Q2 clamps
the error a mp li fier output to 1VBE above the voltage on
CS. As the soft-start voltage ramps up to +5V, the duty
cycle of the PWM linearly increases to whatever value
the voltage regulation loop requires for an error null.
Und er-Volta ge Loc ko u t
The unde r-voltage locko ut circuit protects the UC1526A
and the power devices it controls from inadequate sup-
ply voltage, If +VIN is too low, the circuit disables the
output drivers and holds the RESET pin LOW. This pre-
vents spurious output pulses while the control circu itry is
stabi li zing, and holds the soft-start timing capaci tor in a
discharged state.
The circuit consists of a +1.2V bandgap reference and
comparator circuit which is active when the reference
voltage has risen to 3VBE or +1.8V at 25°C. When the
reference voltage rises to approximately +4.4V, the cir-
cui t enables the output dri vers and rele ases the RESET
pin, allowing a normal soft-start. The comparator has
350mV of hysteresis to minimize oscillation at the trip
point. When +VIN to the PWM is remove d and the refer-
ence d rops to +4.2V, the unde r-voltage circuit pulls RE-
SET LOW again. The soft-start capacitor is i mmediately
discharge d, and the PWM is ready for ano ther soft-start
cycle.
The UC1526A can operate from a +5V supply by con-
necting the VREF pi n to the +VIN pi n and maintaining the
supply between +4.8 and +5.2V.
Digital Control Por ts
The three digital control ports of the UC1526A are bi-di-
rectional. Each pin can drive TTL and 5V CMOS logic di-
rectly, up to a fan-out of 10 low-power Schottky gates.
Each pin can also be directly driven by open-collector
TTL, open-drain CMOS, and open-collector voltage
comparators; fan-in is equivalent to 1 low-power Schot-
tky gate. Each port is normally HIGH; the pin is pulled
LOW to activate the particular function. Driving SYNC
LOW initia tes a discha rge cycle i n the oscill ator. Pul ling
SHUTDOWN LOW immediately inhibits all PWM output
pulses. Holding RESET LOW discharges the soft-start
Figure 1. Ex ten di ng Ref ere nce Out put Curr ent
Figure 2. Unde r-Volta ge Lockout Schem ati c
Figure 3. Soft-Star t Circ ui t Schema tic
UC1526A
UC2526A
UC3526A
5
capacitor. The logic threshold is +1.1V at +25°C. Noise
immunity can be gained at the expense of fan-out with an
external 2k pull-up resist or to +5V.
Oscillators
The oscillator is programmed for frequency and dead
time with three components: RT, CT and RD. Two wave-
forms are generated: a sawtooth waveform at pin 10 for
pulse width modulation, and a logic clock at pin 12. The
following procedure is recommended for choosing timi ng
values:
1. With RD= 0Ω (pin 11 shorted to ground) select values
for RT and CT from the grap h on page 4 to give the de-
sired oscillator period. Remember that the frequency at
each driver output is half the oscillator frequenc y, and the
frequency at the +VC terminal i s the same as the oscilla-
tor frequenc y.
2. If more dead time is required, select a larger value of
RD. At 40kHz dead time increases by 400ns/Ω.
3. Increasing the dead time will cause the oscillator fre-
quency to decrease slightly. Go back and decrease the
value of RT slightly to bring the frequency back to the
nominal design value.
The UC1526A can be synchronized to an external logic
clock by programming the oscillator to free-run at a fre-
quency 10% slower than the SYNC frequency.
A pe riodic LOW logi c pul se approximately 0.5µs wide at
Err or Ampl ifie r
The error amplifier is a transconductance design, with an
output impedance of 2MΩ. Since all voltage gain takes
place at the output pin, the open-loop gain/frequency
ch aracteristics can be controlled with shunt reactance to
ground. When compensated for unity-gain stability with
100pF, the amplifier has an open-loop pole at 800Hz.
The input connections to the error amplifier are deter-
mi ned by the polarity o f the swi tchin g supp ly output volt-
age. For positive supplies, the common-mode voltage is
+5.0V and the feedback connections in Figure 6A are
used. With negative supplies, the common-mode voltag e
is ground and the feedback divider is connected between
the ne gative ou tput an d the +5.0V reference voltage, as
shown in Figure 6B.
the SYNC pin will then lock the oscillator to the external
frequency.
Multiple devices can be synchronized together by pro-
grammi ng one master unit for the desired frequency, and
then sharing its sawtooth and clock waveforms with the
slave units. All CT terminals are connected to the CT pi n
of the master and all SYNC terminals are likewise con-
nected to the SYNC pin of the master. Slave RT termi-
nals are left open or connected to VREF. Slave RD
term inal may be either left open or grounded.
Figure 4. Digi t al Co ntrol Port Schem atic
Figure 5. Oscillator Connections and Waveforms Figure 7. Push-Pull Configuratio n
Figure 6. Error Ampli fier Con nections
APPLICATIONS INFORMATION (cont.)
UC1526A
UC2526A
UC3526A
6
T YPICAL CHARACTE RIS TICS
OSCILLATOR PERIOD vs RT and CT
OUTPUT BLANKING
Figure 8. Sing le -End ed Conf i gur ation Figure 9. Driving N-Channel Power MOSFETs
Output Drivers
The totem pole output drivers of the UC1526A are de-
signed to source and sink 100mA continuously and
200mA peak. Loads can be driven either from the output
pins 13 and 16, or from the +VC, as required.
Since the bottom transistor of the totem-pole is allowed to
saturate, the re is a momentary condu cti on path from the
+VC terminal to ground during switching; however, im-
proved design has limited this cross-conduction period to
less than 50ns. Capacitor decoupling at VC is recom-
mended and careful g rounding of Pin 15 is needed to in-
sure that high peak sink currents from a capacitive load
do not cause ground transients.
APPLICATIONS INFORMATION (cont.)
UC1526A
UC2526A
UC3526A
7
UNITRODE INTEGRATED CIRCUITS
7 CONTINENTAL BLVD. • MERRIMACK, NH 03054
TEL. (603) 424-2410 • F AX (603) 424-3460
T YPICAL CHARACTE RIS TICS (Cont.)
Outpu t Driver Deadtime vs. RD Value Und er Voltage Lo cko u t Characteristic
Current Limit Transfer Function
Error Ampl if ier Open Loop Gain vs. Frequ ency
Shu tdo wn Delay Out put Driver Satu ration Voltag e
UC1526A
UC2526A
UC3526A
8
PACKAGE OPTION ADDENDUM
www.ti.com 9-May-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
85515022A ACTIVE LCCC FK 20 1 TBD Call TI Call TI
8551502VA ACTIVE CDIP J 18 1 TBD Call TI Call TI
UC1526AJ ACTIVE CDIP J 18 1 TBD A42 N / A for Pkg Type
UC1526AJ883B ACTIVE CDIP J 18 1 TBD A42 N / A for Pkg Type
UC1526AL ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
UC1526AL883B ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
UC2526ADW ACTIVE SOIC DW 18 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC2526ADWG4 ACTIVE SOIC DW 18 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC2526ADWTR ACTIVE SOIC DW 18 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC2526ADWTRG4 ACTIVE SOIC DW 18 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC2526AN ACTIVE PDIP N 18 20 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type
UC2526ANG4 ACTIVE PDIP N 18 20 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type
UC2526AQ ACTIVE PLCC FN 20 46 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
UC2526AQG3 ACTIVE PLCC FN 20 46 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
UC2526J ACTIVE CDIP J 18 1 TBD A42 N / A for Pkg Type
UC3526ADW ACTIVE SOIC DW 18 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC3526ADWG4 ACTIVE SOIC DW 18 40 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC3526ADWTR ACTIVE SOIC DW 18 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC3526ADWTRG4 ACTIVE SOIC DW 18 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
UC3526AN ACTIVE PDIP N 18 20 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type
PACKAGE OPTION ADDENDUM
www.ti.com 9-May-2012
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
UC3526ANG4 ACTIVE PDIP N 18 20 Green (RoHS
& no Sb/Br) CU NIPDAU N / A for Pkg Type
UC3526AQ ACTIVE PLCC FN 20 46 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
UC3526AQG3 ACTIVE PLCC FN 20 46 Green (RoHS
& no Sb/Br) CU SN Level-2-260C-1 YEAR
UC3526J ACTIVE CDIP J 18 1 TBD A42 N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF UC1526A, UC2526A, UC2526M, UC3526A, UC3526M :
•Catalog: UC3526A, UC2526, UC3526AM, UC3526
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
UC2526ADWTR SOIC DW 18 2000 330.0 24.4 10.9 12.0 2.7 12.0 24.0 Q1
UC3526ADWTR SOIC DW 18 2000 330.0 24.4 10.9 12.0 2.7 12.0 24.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
UC2526ADWTR SOIC DW 18 2000 367.0 367.0 45.0
UC3526ADWTR SOIC DW 18 2000 367.0 367.0 45.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All
semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time
of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components which meet ISO/TS16949 requirements, mainly for automotive use. Components which
have not been so designated are neither designed nor intended for automotive use; and TI will not be responsible for any failure of such
components to meet such requirements.
Products Applications
Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive
Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications
Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers
DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps
DSP dsp.ti.com Energy and Lighting www.ti.com/energy
Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial
Interface interface.ti.com Medical www.ti.com/medical
Logic logic.ti.com Security www.ti.com/security
Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense
Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video
RFID www.ti-rfid.com
OMAP Mobile Processors www.ti.com/omap TI E2E Community e2e.ti.com
Wireless Connectivity www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2012, Texas Instruments Incorporated
