LTC5567IUF#TRPBF - Linear Technology Corporation

LTC5567

5567f

Typical applicaTion

FeaTures DescripTion

300MHz to 4GHz Active

Downconverting Mixer with

Wideband IF

The LTC

5567 is optimized for RF downconverting mixer

applications that require wide IF bandwidth. The part is

also a pin-compatible upgrade to the LT5557 active mixer,

offering higher linearity and 1dB compression, wider

bandwidth, and lower output spurious levels. Integrated

RF and LO transformers and LO buffer amplifiers allow a

very compact solution.

The RF input is 50Ω matched from 1.4GHz to 3GHz, and

easily matched for higher or lower RF frequencies with

simple external matching. The LO input is 50Ω matched

from 1GHz to 4GHz, even when the IC is disabled. The LO

input is easily matched for higher or lower frequencies, as

low as 300MHz, with simple external matching. The low

capacitance differential IF output is usable up to 2.5GHz.

applicaTions

n High IIP3: +26.9dBm at 1950MHz

n 1.9dB Conversion Gain

n Low Noise Figure: 11.8dB at 1950MHz

n 16.5dB NF Under 5dBm Blocking

n Low Power: 294mW

n Wide IF Frequency Range Up to 2.5GHz

n LO Input 50Ω Matched when Shutdown

n –40°C to 105°C Operation (TC)

n Very Small Solution Size

n Pin Compatible with LT5557

n 16-Lead (4mm × 4mm) QFN package

n Wireless Infrastructure Receivers

n DPD Observation Receivers

n CATV Infrastructure

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear

Technology Corporation. All other trademarks are the property of their respective owners.

10nF

249Ω

1.65GHz

0dBm

3.3V

89mA

10nF

VCC

IF+

LTC5567

IF–

IADJ

2.7pF

1.69GHz

2.24GHz

330pF 200Ω LOAD

330pF

BIAS

5567 TA01a

3.9pF

100Ω

390nH

AMP

390nH

DPD Observation Receiver Mixer with 500MHz IF Bandwidth and

+13dBm Input P1dB into 200Ω Load Voltage Conversion Gain, IIP3

and NF vs IF Frequency

IF FREQUENCY (MHz)

40 90

GV (dB), IIP3 (dBm), SSB NF (dB)

390 440 490 540

5567 TA01b

140 190 240 290 340 590

26 IIP3

RF = 1.69GHz TO 2.24GHz

LO = 1.65GHz

ZRF = 50Ω

ZIF = 200Ω DIFFERENTIAL

TC = 25°C

LTC5567

5567f

pin conFiguraTionabsoluTe MaxiMuM raTings

Supply Voltage (VCC, IF+, IF–) ..................................4.0V

Enable Input Voltage (EN) ................–0.3V to VCC + 0.3V

LO Input Power (300MHz to 4.5GHz) .................+10dBm

LO Input DC Voltage ............................................... ±0.1V

RF Input Power (300MHz to 4GHz) .................... +15dBm

RF Input DC Voltage ............................................... ±0.1V

TEMP Monitor Input Current ..................................10mA

Operating Temperature Range (TC) ........ –40°C to 105°C

Junction Temperature (TJ) .................................... 150°C

Storage Temperature Range .................. –65°C to 150°C

(Note 1)

16 15 14 13

5678

TOP VIEW

GND

UF PACKAGE

16-LEAD (4mm × 4mm) PLASTIC QFN

1TEMP

GND

IF+

IF–

GND

VCC

IADJ

TJMAX = 150°C, θJC = 8°C/W

EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB

orDer inForMaTion

LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION CASE TEMPERATURE RANGE

LTC5567IUF#PBF LTC5567IUF#TRPBF 5567 16-Lead (4mm × 4mm) Plastic QFN –40°C to 105°C

Consult LTC Marketing for parts specified with wider operating temperature ranges.

Consult LTC Marketing for information on non-standard lead based finish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

ac elecTrical characTerisTics

VCC = 3.3V, EN = High. Test circuit shown in Figure 1.

(Notes 2, 3, 4)

PARAMETER CONDITIONS MIN TYP MAX UNITS

RF Input Frequency Range 300 to 4000 MHz

LO Input Frequency Range 300 to 4500 MHz

IF Output Frequency Range External Matching Required 5 to 2500 MHz

RF Input Return Loss ZO = 50Ω, 1400MHz to 3000MHz, C3 = 2.7pF >12 dB

LO Input Return Loss ZO = 50Ω, 1000MHz to 4000MHz, C5 = 3.9pF >10 dB

IF Output Impedance Differential at 153MHz 532Ω ||1.0pF R||C

LO Input Power –6 0 6 dBm

RF to LO Isolation RF = 300MHz to 1000MHz

RF = 1000MHz to 4000MHz >59

>50 dB

RF to IF Isolation RF = 300MHz to 700MHz

RF = 700MHz to 1000MHz

RF = 1000MHz to 4000MHz

>47

>40

>28

LTC5567

5567f

ac elecTrical characTerisTics

VCC = 3.3V, EN = High. TC = 25°C, PLO = 0dBm, IF = 153MHz,

PRF = –6dBm (–6dBm/tone for 2-tone tests), unless otherwise noted. Test circuit shown in Figure 1. (Notes 2, 3, 4)

PARAMETER CONDITIONS MIN TYP MAX UNITS

Power Conversion Gain RF = 450MHz, High Side LO

RF = 850MHz, High Side LO

RF = 1950MHz, Low Side LO

RF = 2550MHz, Low Side LO

RF = 3500MHz, Low Side LO

0.8

1.5

2.0

1.9

1.7

1.2

Conversion Gain Flatness RF = 1950 ±30MHz, LO = 1797MHz, IF = 153 ±30MHz ±0.09 dB

Conversion Gain vs Temperature TC = –40°C to 105ºC, RF = 1950MHz, Low Side LO –0.013 dB/°C

2-Tone Input 3rd Order Intercept (∆fRF = 2MHz) RF = 450MHz, High Side LO

RF = 850MHz, High Side LO

RF = 1950MHz, Low Side LO

RF = 2550MHz, Low Side LO

RF = 3500MHz, Low Side LO

24.2

26.0

26.7

26.9

26.0

26.5

dBm

2-Tone Input 2nd Order Intercept

(∆fRF = 154MHz = fIM2)RF = 450MHz (527MHz/373MHz), LO = 603MHz

RF = 850MHz (927MHz/773MHz), LO = 1003MHz

RF = 1950MHz (2027MHz/1873MHz), LO = 1797MHz

RF = 2550MHz (2627MHz/2473MHz), LO = 2397MHz

RF = 3500MHz (3577MHz/3423MHz), LO = 3347MHz

dBm

SSB Noise Figure RF = 450MHz, High Side LO

RF = 850MHz, High Side LO

RF = 1950MHz, Low Side LO

RF = 2550MHz, Low Side LO

RF = 3500MHz, Low Side LO

12.5

11.4

11.8

12.6

14.6

13.5

SSB Noise Figure Under Blocking RF = 850MHz, High Side LO, 750MHz Blocker at 5dBm

RF = 1950MHz, Low Side LO, 2050MHz Blocker at 5dBm 16.5

16.5 dB

LO to RF Leakage LO = 300MHz to 700MHz

LO = 700MHz to 2200MHz

LO = 2200MHz to 4500MHz

<–62

<–56

<–47

dBm

LO to IF Leakage LO = 300MHz to 500MHz

LO = 500MHz to 700MHz

LO = 700MHz to 4500MHz

<–43

<–37

<–41

dBm

1/2IF Output Spurious Product

(fRF Offset to Produce Spur at fIF = 153MHz) 850MHz: fRF = 926.5MHz at –6dBm, fLO = 1003MHz

1950MHz: fRF = 1873.5MHz at –6dBm, fLO = 1797MHz –78

–73 dBc

dBc

1/3IF Output Spurious Product

(fRF Offset to Produce Spur at fIF = 153MHz) 850MHz: fRF = 952MHz at –6dBm, fLO = 1003MHz

1950MHz: fRF = 1848MHz at –6dBm, fLO = 1797MHz –82

–80 dBc

dBc

Input 1dB Compression RF = 450MHz, High Side LO

RF = 850MHz, High Side LO

RF = 1950MHz, Low Side LO

RF = 2550MHz, Low Side LO

RF = 3500MHz, Low Side LO

11.0

10.9

10.1

10.2

10.4

dBm

LTC5567

5567f

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTC5567 is guaranteed functional over the –40°C to 105°C

case temperature range (θJC = 8°C/W).

Note 3: SSB Noise Figure measured with a small-signal noise source,

bandpass filter and 2dB matching pad on RF input, and bandpass filter on

the LO input.

Note 4: Specified performance includes 4:1 IF transformer and evaluation

PCB losses.

Typical Dc perForMance characTerisTics

Supply Current vs Supply Voltage

TEMP Diode Voltage vs Junction

Temperature

EN = High, Test circuit shown in Figure 1.

Dc elecTrical characTerisTics

VCC = 3.3V, TC = 25°C. Test circuit shown in Figure 1. (Note 2)

PARAMETER CONDITIONS MIN TYP MAX UNITS

Supply Voltage (VCC) 3.0 3.3 3.6 V

Supply Current Enabled

Disabled EN = High

EN = Low 89 105

100 mA

µA

Enable Logic Input (EN)

Input High Voltage (On) 2.5 V

Input Low Voltage (Off) 0.3 V

Input Current –0.3V to VCC + 0.3V –30 100 µA

Turn-On Time 0.6 µs

Turn-Off Time 0.5 µs

Mixer DC Current Adjust (IADJ)

Open-Circuit DC Voltage 2.2 V

Short-Circuit DC Current Pin Shorted to Ground 1.8 mA

Temperature Sensing Diode (TEMP)

DC Voltage at TJ = 25°C IIN = 10µA

IIN = 80µA 716

773 mV

Voltage Temperature Coefficient IIN = 10µA

IIN = 80µA –1.75

–1.56 mV/°C

mV/°C

VCC SUPPLY VOLTAGE (V)

3.0

84 3.3 3.5

5567 G01

3.1 3.2 3.4 3.6

SUPPLY CURRENT (mA)

TC = 105°C

TC = 85°C

TC = 55°C

TC = 25°C

TC = –10°C

TC = –40°C

JUNCTION TEMPERATURE (°C)

–45 –20

500

TEMP DIODE VOLTAGE (mV)

550

600

650

700

900

5 30 55 80

5567 G02

105 130

750

800

850

IIN = 80µA

IIN = 10µA

LTC5567

5567f

Conversion Gain, IIP3 and NF

vs RF Frequency (High Side LO)

RF Isolation vs RF Frequency LO Leakage vs LO Frequency

Conversion Gain, IIP3 and NF

vs RF Frequency (Low Side LO)

1950MHz Conversion Gain, IIP3

and NF vs LO Power (Low Side LO)

1950MHz Conversion Gain, IIP3

and NF vs LO Power (High Side LO)

2550MHz Conversion Gain, IIP3

and NF vs LO Power (Low Side LO)

2550MHz Conversion Gain, IIP3

and NF vs LO Power (High Side LO)

Typical perForMance characTerisTics

1400MHz to 3000MHz application. Test circuit shown in

Figure 1. VCC = 3.3V, PLO = 0dBm, PRF = –6dBm (–6dBm/tone for 2-tone IIP3 tests, ∆f = 2MHz), IF = 153MHz unless otherwise noted.

RF FREQUENCY (GHz)

1.4

IIP3 (dBm), NF (dB)

(dB)

1.8 2.2 2.4

5567 G03

1.6 2.0 2.6 2.8 3.0

IIP3

TC = 25°C

LO INPUT POWER (dBm)

–6

(dB), IIP3 (dBm), SSB NF (dB)

–2 24

–4 0 6

5567 G04

TC = 85°C

TC = 25°C

TC = –40°C

IIP3

LO INPUT POWER (dBm)

–6

(dB), IIP3 (dBm), SSB NF (dB)

–2 24

–4 0 6

5567 G05

IIP3

TC = 85°C

TC = 25°C

TC = –40°C

RF FREQUENCY (GHz)

1.4

IIP3 (dBm), NF (dB)

(dB)

1.8 2.2 2.4

5567 G06

1.6 2.0 2.6 2.8 3.0

IIP3

TC = 25°C

LO INPUT POWER (dBm)

–6

(dB), IIP3 (dBm), SSB NF (dB)

–2 2 4

–4 0 6

5567 G07

IIP3

TC = 85°C

TC = 25°C

TC = –40°C

LO INPUT POWER (dBm)

–6

(dB), IIP3 (dBm), SSB NF (dB)

–2 24

–4 0 6

5567 G08

IIP3

TC = 85°C

TC = 25°C

TC = –40°C

RF FREQUENCY (GHz)

1.4

RF ISOLATION (dB)

3.0

5567 G09

25 1.8 2.2 2.61.6 2.0 2.4 2.8

60 RF-LO

RF-IF

TC = 25°C

LO FREQUENCY (GHz)

1.2

LO LEAKAGE (dBm)

–40

–30

–20

2.8

5567 G10

–50

–60

–70 1.6 2.0

LO-IF

LO-RF

2.4 3.2

TC = 25°C

LTC5567

5567f

SSB Noise Figure

vs RF Blocker Level

1950MHz Conversion Gain

Distribution

Conversion Gain, IIP3, NF and RF

Input P1dB vs Temperature

1950MHz IIP3 Distribution

Conversion Gain, IIP3 and NF

vs Supply Voltage

1950MHz SSB NF Distribution

2-Tone IF Output Power, IM3 and

IM5 vs RF Input Power

Single Tone IF Output Power, 2 × 2

and 3 × 3 Spurs vs RF Input Power

2 × 2 and 3 × 3 Spur Suppression

vs LO Power

Typical perForMance characTerisTics

1400MHz to 3000MHz application. Test circuit shown in

Figure 1. VCC = 3.3V, PLO = 0dBm, PRF = –6dBm (–6dBm/tone for 2-tone IIP3 tests, ∆f = 2MHz), IF = 153MHz unless otherwise noted.

RF INPUT POWER (dBm/TONE)

–12

–90

OUTPUT POWER/TONE (dBm)

–70

–50

IM3

IM5

–30

–9 –6 –3 0

5567 G11

–10

–80

–60

–40

–20

IFOUT

TC = 25°C

RF1 = 1949MHz

RF2 = 1951MHz

LO = 1797MHz

RF INPUT POWER (dBm)

–15

–85

OUTPUT POWER (dBm)

–75

–55

–45

–35

–15

–9 –3 0 12

5567 G12

–65

–5

–25

–12 –6 3 6 9

IFOUT

(RF = 1950MHz)

2RF-2LO

(RF = 1873.5MHz)

3RF-3LO

(RF = 1848MHz)

TC = 25°C

LO = 1797MHz

LO INPUT POWER (dBm)

–6

–90

RELATIVE SPUR LEVEL (dBc)

–85

–80

–75

–70

–60

–4 –2 0 2

5567 G13

4 6

–65

2RF-2LO

(RF = 1873.5MHz)

3RF-3LO

(RF = 1848MHz)

TC = 25°C

RF = 1950MHz

PRF = –6dBm

LO = 1797MHz

RF BLOCKER POWER (dBm)

–25

SSB NF (dB)

–15 –5 0

5567 G14

–20 –10 510

TC = 25°C

RF = 1950MHz

BLOCKER = 2050MHz

LO = 1797MHz

PLO = –3dBm

PLO = 3dBm

PLO = 0dBm

CASE TEMPERATURE (°C)

–45

AND SSB NF (dB), IIP3 AND P1dB (dBm)

–15 15

45 75 105

5567 G15

IIP3

SSB NF

P1dB

RF = 1950MHz

LOW SIDE LO

VCC SUPPLY VOLTAGE (V)

3.0

(dB), IIP3 (dBm), SSB NF (dB)

3.1 3.2 3.3 3.4

5567 G16

3.5

3.6

RF = 1950MHz

LOW SIDE LO

IIP3

TC = 85°C

TC = 25°C

TC = –40°C

CONVERSION GAIN (dB)

0.6 1.0

DISTRIBUTION (%)

1.4 1.8

5567 G17

02.2 2.6 3.0

105°C

25°C

–40°C

RF = 1950MHz, LOW SIDE LO

IIP3 (dBm)

24.6

DISTRIBUTION (%)

25.8

5567 G18

026.4 27.6 28.825.2 27.0 28.2

RF = 1950MHz, LOW SIDE LO

105°C

25°C

–40°C

SSB NOISE FIGURE (dB)

10.2

DISTRIBUTION (%)

10.8 11.4 12.0 12.6 13.2

5567 G19

013.8

RF = 1950MHz

LOW SIDE LO

105°C

25°C

–40°C

LTC5567

5567f

Conversion Gain, IIP3 and NF

vs RF Frequency

850MHz Conversion Gain,

IIP3 and NF vs LO Power

850MHz Conversion Gain,

IIP3 and NF vs Supply Voltage

2-Tone IF Output Power, IM3 and

IM5 vs RF Input Power

Single Tone IF Output Power, 2 × 2

and 3 × 3 Spurs vs RF Input Power

2 × 2 and 3 × 3 Spur Suppression

vs LO Power

RF Isolation and LO Leakage vs

Frequency

Conversion Gain, IIP3, NF and RF

Input P1dB vs Temperature

SSB Noise Figure

vs RF Blocker Level

Typical perForMance characTerisTics

700MHz to 1000MHz application. Test circuit shown in

Figure 1. VCC = 3.3V, PLO = 0dBm, PRF = –6dBm (–6dBm/tone for 2-tone IIP3 tests, ∆f = 2MHz), IF = 153MHz unless otherwise noted.

RF FREQUENCY (MHz)

700

(dB), IIP3 (dBm), SSB NF (dB)

750 800 950

850 900 1000

5567 G20

IIP3

HIGH SIDE LO

TC = 25°C

LO INPUT POWER (dBm)

–6

(dB), IIP3 (dBm), SSB NF (dB)

–2 24

–4 0 6

5567 G21

IIP3

RF = 850MHz

HIGH SIDE LO

TC = 85°C

TC = 25°C

TC = –40°C

VCC SUPPLY VOLTAGE (V)

3.0

(dB), IIP3 (dBm), SSB NF (dB)

3.4

5567 G22

3.2

3.1 3.5

3.3 3.6

25 IIP3

RF = 850MHz

HIGH SIDE LO

TC = 85°C

TC = 25°C

TC = –40°C

RF/LO FREQUENCY (MHz)

700

RF ISOLATION (dB)

LO LEAKAGE (dBm)

–70

10 –60

–50

–40

–30

–20

–10

800 900 1000 1100

5567 G23

1200

RF-LO

ISO

LO-IF

LO-RF

RF-IF

ISO

TC = 25°C

CASE TEMPERATURE (°C)

–45

GC (dB), NF (dB), IIP3 (dBm), P1dB (dBm)

15 75

–15 45 105

5567 G24

IIP3

P1dB

RF = 850MHz

HIGH SIDE LO

RF BLOCKER POWER (dBm)

–25

SSB NF (dB)

–15 –5 0

5567 G25

–20 –10 5 10

TC = 25°C

RF = 850MHz

BLOCKER = 750MHz

LO = 1003MHz

PLO = –3dBm

PLO = 3dBm

PLO = 0dBm

RF INPUT POWER (dBm/TONE)

–12

–80

OUTPUT POWER/TONE (dBm)

–60

–40

–20

–9 –6 –3 0

5567 G26

–70

–50

–30

–10

IFOUT

IM3 IM5

TC = 25°C

RF1 = 849MHz

RF2 = 851MHz

LO = 1003MHz

RF INPUT POWER (dBm)

–15

–85

OUTPUT POWER (dBm)

–75

–55

–45

–35

–15

–9 –3 0 12

5567 G27

–65

–5

–25

–12 –6 369

IFOUT

(RF = 850MHz)

2LO-2RF

(RF = 926.5MHz)

3LO-3RF

(RF = 952MHz)

TC = 25°C

LO = 1003MHz

LO INPUT POWER (dBm)

–6

–90

RELATIVE SPUR LEVEL (dBc)

–85

–80

–75

–70

–60

–4 –2 0 2

5567 G28

4 6

–65

2LO-2RF

(RF = 926.5MHz)

3LO-3RF

(RF = 952MHz)

TC = 25°C

RF = 850MHz

PRF = –6dBm

LO = 1003MHz

LTC5567

5567f

3GHz to 4GHz application. Test circuit shown in Figure 1.

Conversion Gain, IIP3 and NF vs

RF Frequency

Conversion Gain, IIP3 and NF

vs RF Frequency

RF Isolation vs RF Frequency LO leakage vs LO Frequency

450MHz Conversion Gain,

IIP3 and NF vs LO Power

3500MHz Conversion Gain,

IIP3 and NF vs LO Power

Conversion Gain, IIP3 and RF

Input P1dB vs Temperature

3500MHz Conversion Gain,

IIP3 and NF vs Supply Voltage

RF Isolation and LO Leakage

vs RF and LO Frequency

Typical perForMance characTerisTics

400MHz to 500MHz application. Test circuit shown in

Figure 1. VCC = 3.3V, PLO = 0dBm, PRF = –6dBm (–6dBm/tone for 2-tone IIP3 tests, ∆f = 2MHz), IF = 153MHz unless otherwise noted.

RF FREQUENCY (MHz)

400

(dB), IIP3 (dBm), SSB NF (dB)

425 450

5567 G29

475 500

IIP3

HIGH SIDE LO

TC = 25°C

LO INPUT POWER (dBm)

–6

(dB), IIP3 (dBm), NF (dB)

5567 G30

–2–4 40 6

24 IIP3

HIGH SIDE LO TC = 85°C

TC = 25°C

TC = –40°C

RF/LO FREQUENCY (MHz)

400

RF ISOLATION (dB)

LO LEAKAGE (dBm)

550 650

5567 G31

30 450 500 600

–50

–40

–30

–60

–70

–80

–20

–10

700

RF-LO

LO-IF

LO-RF

RF-IF TC = 25°C

RF FREQUENCY (GHz)

3.0

(dB), IIP3 (dBm), SSB NF (dB)

3.2 3.4

5567 G32

3.6 4.03.8

IIP3

LOW SIDE LO

TC = 25°C

LO INPUT POWER (dBm)

–6

(dB), IIP3 (dBm), SSB NF (dB)

5567 G33

–2

–4 4

0 6

TC = 85°C

TC = 25°C

TC = –40°C

IIP3

RF = 3.5GHz

LOW SIDE LO

VCC SUPPLY VOLTAGE

3.0

GC (dB), IIP3 (dBm), SSB NF (dB)

3.4

5567 G34

3.23.1 3.53.3 3.6

24 IIP3

RF = 3.5GHz

LOW SIDE LO

TC = 85°C

TC = 25°C

TC = –40°C

RF FREQUENCY (GHz)

3.0

–40

RF ISOLATION (dB)

–10

–20

–30

RF-LO

RF-IF

3.2 3.4 3.6

5567 G35

3.8 4.0

TC = 25°C

LO FREQUENCY (GHz)

2.6

LO LEAKAGE (dBm)

LO-IF

LO-RF

2.9 3.2 3.5 3.8

5567 G36

4.1 4.4

–60

–50

–40

–55

–45

–35

–30

–20

–25

TC = 25°C

CASE TEMPERATURE (°C)

–45

(dB), IIP3 (dBm), P1dB (dBm), SSBNF (dB)

15 75

–15 45 105

5567 G37

IIP3

P1dB

RF = 3500MHz

LOW SIDE LO

LTC5567

5567f

pin FuncTions

TEMP (Pin 1): Temperature Sensing Diode. This pin is

connected to the anode of a diode that may be used to

measure the die temperature, by forcing a current and

measuring the voltage.

GND (Pins 2, 4, 9, 12, 13, 16, Exposed Pad Pin 17):

Ground. These pins must be soldered to the RF ground

plane on the circuit board. The exposed pad metal of the

package provides both electrical contact to ground and

good thermal contact to the printed circuit board.

RF (Pin 3): Single-Ended RF Input. This pin is internally

connected to the primary winding of the integrated RF

transformer, which has low DC resistance to ground. A

series DC-blocking capacitor must be used if the RF

source has DC voltage present. The RF input is 50Ω

impedance matched from 1.4GHz to 3GHz, as long as

the mixer is enabled. Operation down to 300MHz or up

to 4GHz is possible with external matching.

EN (Pin 5): Enable Pin. When the input voltage is greater

than 2.5V, the mixer is enabled. When the input voltage is

less than 0.3V, the mixer is disabled. Typical input current is

less than 30µA. This pin has an internal pull-down resistor.

VCC (Pin 6): Power Supply Pin. This pin must be connected

to a regulated 3.3V supply, with a bypass capacitor located

close to the pin. Typical DC current consumption is 34mA.

NC (Pins 7, 14): These pins are not connected internally.

They can be left floating, connected to ground, or to VCC.

IADJ (Pin 8): This pin allows adjustment of the mixer DC

supply current. Typical open-circuit DC voltage is 2.2V.

This pin should be left floating for optimum performance.

IF+/IF– (Pin 11/Pin 10): Open-Collector Differential IF

Output. These pins must be connected to the VCC supply

through impedance-matching inductors or a transformer

center tap. Typical DC current consumption is 27.5mA

into each pin.

LO (Pin 15): Single-Ended Local Oscillator Input. This

pin is internally connected to the primary winding of an

integrated transformer, which has low DC resistance to

ground. A series DC-blocking capacitor must be used to

avoid damage to the internal transformer. This input is

50Ω impedance matched from 1GHz to 4GHz, even when

the IC is disabled. Operation down to 300MHz or up to

4.5GHz is possible with external matching.

block DiagraM

5567 BD

GND

EN NC

VCC

IF+

IF–

IADJ

TEMP

BIAS

5 76

GND NC GND

1316 1415

GND

(EXPOSED PAD)

LTC5567

5567f

TesT circuiT

0.015"

0.062"

0.015"

GND

BIAS

GND

DC1861A

EVALUATION BOARD

LAYER STACK-UP

(NELCO N4000-13)

RFIN

50Ω

5567 F01

LOIN

50Ω

VCC

3.3V

89mA

C1 C9

VCC

IF+

LTC5567

IF–

IADJNC

GND

1TEMP

4GND GND 9

65 7 8

GND

GND NC GND

16 1415 13

IFOUT

50Ω

0Ω

APPLICATION RF MATCH LO MATCH

RF (MHz) LO C3 C4 L3 C5 C6

300 to 400 HS 120pF 18pF 2.2nH 47pF 15pF

400 to 500 HS 120pF 12pF 2nH 27pF 10pF

700 to 1000 HS 120pF 4.7pF — 6.8pF 2.7pF

1400 to 3000 LS, HS 2.7pF — — 3.9pF —

3000 to 4000 LS 3.9pF 0.7pF — 3.9pF —

LS = Low side, HS = High side

REF DES VALUE SIZE VENDOR REF DES VALUE SIZE VENDOR

C1, C2 10nF 0402 AVX C9 1µF 0603 AVX

C3 - C6 See Table 0402 AVX T1 4:1 — Mini-Circuits TC8-1-10LN+

C7, C8 330pF 0402 AVX L1, L2 300nH 0603 Coilcraft 0603HP

R1, R2 3.01k, 1% 0402 L3 See Table 0402 Coilcraft 0402HP

Figure 1. Standard Downmixer Test Circuit Schematic (153MHz Bandpass IF Matching)

LTC5567

5567f

applicaTions inForMaTion

Introduction

The LTC5567 incorporates a high linearity double-balanced

active mixer, a high-speed limiting LO buffer and bias/

enable circuits. See the Pin Functions and Block Diagram

sections for a description of each pin. A test circuit sche-

matic showing all external components required for the

data sheet specified performance is shown in Figure 1.

A few additional components may be used to modify the

DC supply current or frequency response, which will be

discussed in the following sections.

The LO and RF inputs are single ended. The IF output is

differential. Low side or high side LO injection may be

used. The test circuit, shown in Figure 1, utilizes bandpass

IF output matching and an 8:1 IF transformer to realize a

50Ω single-ended IF output. The evaluation board layout

is shown in Figure 2.

RF Input

A simplified schematic of the mixer’s RF input is shown

in Figure 3. As shown, one terminal of the integrated RF

transformer’s primary winding is connected to Pin 3, while

the other terminal is DC-grounded internally. For this rea-

son, a series DC-blocking capacitor (C3) is needed if the

RF source has DC voltage present. The DC resistance of

the primary winding is approximately 4Ω. The secondary

winding of the RF transformer is internally connected to

the RF buffer amplifier.

The RF input is 50Ω matched from 1400MHz to 3000MHz

with a single 2.7pF series capacitor on the input. Matching

to RF frequencies above or below this frequency range is

easily accomplished by adding shunt capacitor C4, shown

in Figure 3. For RF frequencies below 500MHz, series

Figure 2. Evaluation Board Layout

LTC5567

5567f

applicaTions inForMaTion

inductor L3 is also needed. The evaluation board does

not have provisions for L3, so the RF input trace needs

to be cut to install it in series. The RF input matching ele-

ment values for each application are tabulated in Figure 1.

Measured RF input return losses are shown in Figure 4.

The RF input impedance and input reflection coefficient,

versus frequency are listed in Table 1.

Table 1. RF Input Impedance and S11 (At Pin 3, No External

Matching, Mixer Enabled)

FREQUENCY

(MHz)

INPUT

IMPEDANCE

S11

MAG ANGLE

200 6.0 + j8.0 0.79 161.6

350 9.0 + j11.9 0.71 152.1

450 11.0 + j14.1 0.66 147.0

575 13.3 + j15.9 0.61 142.5

700 15.4 + j17.5 0.57 138.1

900 18.5 + j20.0 0.52 131.1

1100 21.7 + j22.0 0.48 125.1

1400 27.4 + j24.2 0.41 115.6

1700 33.7 + j24.2 0.33 107.9

1950 39.1 + j21.6 0.26 103.1

2200 42.6 + j16.1 0.19 104.9

2450 42.6 + j9.9 0.13 120.8

2700 38.8 + j4.3 0.14 155.9

3000 31.9 + j2.3 0.22 171.3

3300 24.8 + j4.0 0.34 167.9

3600 19.5 + j8.2 0.45 158.3

3900 15.4 + j13.4 0.56 147.3

4200 12.6 + j18.7 0.64 136.8

4500 10.9 + j24.2 0.70 126.6

LO Input

A simplified schematic of the LO input, with external

components is shown in Figure 5. Similar to the RF in-

put, the integrated LO transformer’s primary winding is

DC-grounded internally, and therefore requires an external

DC-blocking capacitor. Capacitor C5 provides the neces-

sary DC-blocking, and optimizes the LO input match over

the 1GHz to 4GHz frequency range. The nominal LO input

level is 0dBm although the limiting amplifiers will deliver

excellent performance over a ±5dB input power range. LO

input power greater than +6dBm may cause conduction

of the internal ESD diodes.

To optimize the LO input match for frequencies below

1GHz, the value of C5 is increased and shunt capacitor C6

is added. A summary of values for C5 and C6, versus LO

BUFFER

5569 F05

LTC5567

C5 LOIN

Figure 5. LO Input Schematic

BUFFER

5567 F03

LTC5567

RFIN

Figure 3. RF Input Schematic

Figure 4. RF Input Return Loss

FREQUENCY (GHz)

0.2

RETURN LOSS (dB)

–15

–10

–5

3.2

5567 F04

–20

–25

1.2 2.20.7 3.71.7 2.7 4.74.2

–30

–35

400MHz TO 500MHz APP.

700MHz TO 1000MHz APP.

1400MHz TO 3000MHz APP.

3GHz TO 4GHz APP.

TC = 25°C

LTC5567

5567f

applicaTions inForMaTion

frequency range is listed in Table 2. Measured LO input

return losses are shown in Figure 6. Finally, LO input im-

pedance and input reflection coefficient, versus frequency

is shown in Table 3.

Table 2. LO Input Matching Values vs LO Frequency Range

FREQUENCY (MHz) C5 (pF) C6 (pF)

285 to 392 330 33

338 to 415 330 22

415 to 505 56 18

525 to 635 27 10

645 to 803 15 7.5

800 to 1150 6.8 2.7

1000 to 4000 3.9 —

3000 to 4500 1.8 0.2

Figure 6. LO Input Return Loss

Figure 7. LO Input Return Loss—Mixer Enabled and Disabled

FREQUENCY (GHz)

0.2

RETURN LOSS (dB)

–15

–10

–5

3.2

5567 F06

–20

1.2 2.20.7 3.71.7 2.7 4.74.2

–25

C5 = 27pF, C6 = 10pF

C5 = 6.8pF, C6 = 2.7pF

C5 = 3.9pF

C5 = 1.8pF, C6 = 0.2pF

TC = 25°C

FREQUENCY (GHz)

0.2

RETURN LOSS (dB)

–2

–4

–6

–8

–10

–12

–14

–16

–18 4.74.2

5567 F07

1.2 2.2 3.2 3.70.7 1.7 2.7

TC = 25°C

C5 = 3.9pF

DISABLED

ENABLED

Table 3. LO Input Impedance and S11 (At Pin 15, No External

Matching, Mixer Enabled)

FREQUENCY

(MHz)

INPUT

IMPEDANCE

S11

MAG ANGLE

350 5.2 + j14.9 0.83 146.5

400 6.0 + j17.3 0.81 141.7

450 6.6 + j19.5 0.80 137.0

500 7.2 + j21.5 0.78 132.7

600 9.1 + j26.5 0.75 123.6

800 15.1 + j35.7 0.67 106.0

1000 24.9 + j43.6 0.58 89.5

1500 67.5 + j36.4 0.33 47.1

2000 61.7 – j4.2 0.11 –18.3

2500 40.3 – j7.1 0.13 –139.4

3000 31.7 + j1.8 0.23 173.1

3500 29.8 + j12.3 0.29 140.0

4000 31.5 + j22.9 0.35 113.2

4500 36.0 + j32.4 0.38 92.8

The LO buffers have been designed such that the LO input

impedance does not change significantly when the IC is

disabled. This feature only requires that supply voltage is

applied. The actual performance of this feature is shown

in Figure 7. As shown, the LO input return loss is better

than 10dB over the 1GHz to 4GHz frequency range when

the IC is enabled or disabled.

IF Output

The IF output schematic with external matching compo-

nents is shown in Figure 8. As shown, the output is dif-

ferential open collector. Each IF output pin must be biased

at the supply voltage (VCC), which is applied through the

external matching inductors (L1 and L2) shown in Figure8.

Each pin draws approximately 27.5mA of DC supply cur-

rent (55mA total).

LTC5567

5567f

applicaTions inForMaTion

The differential IF output impedance can be modeled as a

frequency-dependent parallel R-C circuit, using the values

listed in Table 4. This data is referenced to the package

pins (with no external components) and includes the

effects of the IC and package parasitics. Resistors R1

and R2 are used to reduce the output resistance, which

increases the IF bandwidth and input P1dB, but reduces

the conversion gain. The standard downmixer test circuit

shown in Figure 1 uses bandpass matching and 3.01k

resistors to realize a 400Ω differential output, followed by

an 8:1 transformer to get a 50Ω single-ended output. C7

and C8 are 330pF DC-blocking capacitors. The values of

L1 and L2 are calculated to resonate with the internal IF

capacitance (CIF) at the desired IF center frequency, using

the following equation:

L1, L2=

2•π•fIF

( )

2•2•CIF

For IF frequencies below 100MHz, the inductor values

become unreasonably high and the highpass impedance

matching network described in a later section is preferred,

due to its lower inductor values.

measured 1dB (conversion gain) IF frequency range for

each inductor value is shown. The inductor values listed are

less than the ideal calculated values due to the additional

capacitance of the 8:1 transformer. For differential IF out-

put applications where the 8:1 transformer is eliminated,

the ideal calculated values should be used. Measured IF

output return losses are shown in Figure 9.

Table 4. IF Output Impedance and Bandpass Matching Element

Values vs IF Frequency.

IF FREQUENCY

(MHz)

DIFFERENTIAL IF

OUTPUT IMPEDANCE

(RIF || CIF)

IF MATCHING USING TC8-1

L1, L2

1dB IF FREQUENCY

RANGE (MHz)

140 532Ω||1.0pF 390nH 65 to 327

153 532Ω||1.0pF 300nH 84 to 350

190 530Ω ||1.0pF 210nH 107 to 375

250 525Ω ||1.0pF 120nH 160 to 415

380 511Ω ||1.0pF 51nH 288 to 520

500 500Ω ||1.03pF

1000 454Ω ||1.07pF

1500 364Ω ||1.12pF

2000 268Ω ||1.24pF

2500 209Ω ||1.41pF

Figure 9. IF Output Return Loss—400Ω Bandpass

Matching with 8:1 Transformer

FREQUENCY (MHz)

–30

RETURN LOSS (dB)

–20

–10

–25

–15

–5

150 250 350 450

5567 F09

55010050 200 300 400 500

390nH

300nH

210nH

120nH

51nH

T1 = TC8-1

R1, R2 = 3.01k

C7, C8 = 330pF

1011 LTC5567

5567 F08

L1 L2

R1 R2

10nF

VCC

IFOUT

50Ω

IF+IF–

VCC

C8C7

Figure 8. IF Output Schematic with External Matching Wideband Differential IF Output

Wide IF bandwidth and high input 1dB compression are

obtained by reducing the IF output resistance with resistors

R1 and R2. This will reduce the mixer’s conversion gain,

but will not degrade the IIP3 or noise figure.

Table 4 summarizes the optimum IF matching inductor

values, versus IF center frequency, to be used in the

standard downmixer test circuit shown in Figure 1. The

LTC5567

5567f

applicaTions inForMaTion

Figure 12. Voltage Conversion Gain, IIP3 and NF vs IF

Output Frequency for Wideband 200Ω Differential IF

Figure 11. Test Circuit for Wideband 200Ω Differential Output

The IF matching shown in Figure 10 uses 249Ω resistors

and 390nH supply chokes to produce a wideband 200Ω

differential output. This differential output is suitable for

driving a wideband differential amplifier, filter, or a wide-

band 4:1 transformer. The evaluation board layout allows

the removal of the IF transformer to evaluate the mixer

performance with a differential output.

The complete test circuit, shown in Figure 11, uses re-

sistive impedance matching attenuators (L-pads) on the

evaluation board to transform each 100Ω IF output to

50Ω. An external 0°/180° power combiner is then used to

convert the 100Ω differential output to 50Ω single-ended,

to facilitate measurement.

Table 5 compares the IF bandwidth and 1dB compression

for the standard 400Ω and wideband 200Ω IF output re-

sistances. As shown, the 200Ω matching doubles the IF

bandwidth, and increases the RF input P1dB to +13dBm.

Table 5. IF Bandwidth and 1dB Compression for 400Ω and

200Ω Differential IF Output Resistance (RF = 1.69 to 2.24GHz,

LO = 1.65GHz, VCC = 3.3V, TC = 25°C, L1, L2 = 390nH)

ROUT

(Ω)

R1, R2

(Ω)

P1dB

(dBm)

1dB (CONVERSION GAIN)

IF FREQUENCY RANGE

400 3.01k 10.1 65MHz to 327MHz

200 249 13.0 45MHz to 580MHz

Measured voltage conversion gain, IIP3 and SSB noise

figure, at the 200Ω differential output are plotted in Fig-

ure12. Voltage gain, rather than power gain, is plotted

to emphasize the voltage gain due to the 200Ω output.

As shown, the conversion gain is flat within 1dB over the

45MHz to 590MHz IF output frequency range.

IF FREQUENCY (MHz)

40 90

(dB), IIP3 (dBm), SSB NF (dB)

390 440 490 540

5567 F12

140 190 240 290 340

590

26 IIP3

RF = 1.69GHz TO 2.24GHz

LO = 1.65GHz

ZRF = 50Ω

ZIF = 200Ω DIFFERENTIAL

TC = 25°C

IF–

LTC5567

5567 F10

330pF

249Ω

390nH

VCC

IF+100Ω

200Ω

LOAD

100Ω

Figure 10. Wideband 200Ω Differential Output

IFOUT

50Ω

IFOUT

200Ω

IF+

50Ω

IF–

50Ω

10nF

249Ω

1.65GHz

0dBm

3.3V

89mA

10nF

VCC

IF+

LTC5567

IF–

IADJ

2.7pF

1.69GHz

2.24GHz

330pF 1MHz TO 500MHz

COMBINER

L-PADS AND 180° COMBINER

FOR 50Ω SINGLE-ENDED MEASUREMENT

330pF

BIAS

5567 F11

3.9pF

LO 71.5Ω

69.8Ω

71.5Ω

69.8Ω

390nH

OUT

0°

180°

LTC5567

5567f

applicaTions inForMaTion

Figure 14. Voltage Conversion Gain versus IF Frequency

for 153MHz Highpass and Wideband Bandpass IF Matching

Networks

Highpass IF Matching

By simply changing component values, the bandpass IF

output matching network can be changed to a highpass

impedance transforming network. This matching network

will drive a lower impedance differential load (or trans-

former), like the 200Ω wideband bandpass matching

previously described, while delivering higher conversion

gain, similar to the 400Ω bandpass matching. The high-

pass matching network will have less IF bandwidth than

the bandpass matching. It also uses smaller inductance

values; an advantage when designing for IF center frequen-

cies well below 100MHz.

Referring to the small-signal output network schematic in

Figure 13, the reactive matching element values (L1, L2,

C7 and C8) are calculated using the following equations.

The source resistance (RS) is the parallel combination of

external resistors R1 + R2 and the internal IF resistance,

RIF taken from Table 4. The differential load resistance

(RL) is typically 200Ω, but can be less. CIF, the IF output

capacitance, is taken from Table 4. Choosing RS in the

380Ω to 450Ω range will yield power conversion gains

around 2dB.

RS = RIF || 2·R1 (R1 = R2)

Q = √(RS/RL–1) (RS > RL)

YL = Q/RS + (ωIF • CIF)

L1, L2 = 1/(2 • YL • ωIF)

C7, C8 = 2/(Q • RL • ωIF)

Figure 13. IF Output Circuit for Highpass Matching Element

Value Calculations

wideband test circuit, shown in Figure 11, was modified

with the following new element values, and re-tested.

L1, L2 = 150nH

C7, C8 = 10pF

R1, R2 = 1.1k

Measured voltage conversion gain for the highpass and

wideband bandpass methods are shown in Figure 14, for

comparison. Both circuits are driving a 200Ω differential

load, but the highpass version delivers 2.3dB of additional

gain at 153MHz. Measured performance for both circuits

is summarized in Table 6. As shown, the highpass method

has less than half the IF bandwidth, and 3dB lower P1dB.

Table 6. Measured Performance Comparison for Highpass

and Wideband IF Matching (RF = 1950MHz, IF = 153MHz,

Low Side LO).

IF MATCHING

(dB)

IIP3

(dBm)

P1dB

(dBm)

1dB (CONVERSION GAIN)

IF FREQUENCY RANGE

Highpass 8.5 26.9 10.0 110MHz to 320MHz

Wideband 6.2 26.9 13.0 45MHz to 590MHz

IF FREQUENCY (MHz)

VOLTAGE CONVERSION GAIN (dB)

450

5567 F14

–2

–4

–5

–1

–3

150 250 350 550400100 200 300 500

RF = 1.7GHz TO 2.2GHz

LO = 1.65GHz AT 0dBm

ZRF = 50Ω

ZIF = 200Ω DIFFERENTIAL

TC = 25°C

WIDEBAND

BANDPASS

153MHz

HIGHPASS

IF–

LTC5567

5567 F13

VCC

IF+

RIF CIF RL

To demonstrate the highpass impedance transformer

output matching, these equations were used to calculate

the element values for a 153MHz IF frequency and 200Ω

differential load resistance. The output matching on the

Mixer Bias Current Reduction

The IADJ pin (Pin 8) is available for reducing the mixer

core DC current consumption at the expense of linearity

and P1dB. For the highest performance, this pin should

be left open circuit. As shown in Figure 15, an internal

bias circuit produces a 3mA reference current for the

mixer core. If a resistor is connected to Pin 8, as shown

LTC5567

5567f

applicaTions inForMaTion

11 10 IF–VCC

VCC

ICC

34mA

L2L1

VCC

8IADJ

55mA

BIAS

3mA

BIAS

LTC5567

5567 F12

IF+6

Figure 15. IADJ Interface

in Figure 15, a portion of the reference current can be

shunted to ground, resulting in reduced mixer core cur-

rent. For example, R3 = 1k will shunt away 1mA from Pin

8 and reduce the mixer core current by 33%. The nominal,

open-circuit DC voltage at the IADJ pin is 2.2V. Table 7

lists DC supply current and RF performance at 1950MHz

for various values of R3.

Table 7. Mixer Performance with Reduced Current

(RF = 1950MHz, Low Side LO, IF = 153MHz)

R3 (Ω) ICC (mA) GC (dB)

IIP3

(dBm)

P1dB

(dBm) NF (dB)

Open 89.0 1.9 26.9 10.2 11.8

10k 84.6 1.9 25.7 10.2 11.5

1k 70.4 1.6 21.4 10.1 10.5

330 62.9 1.3 19.3 9.5 10.3

100 58.3 1.0 17.9 8.5 10.1

Enable Interface

Figure 16 shows a simplified schematic of the enable

interface. To enable the mixer, the EN voltage must be

higher than 2.5V. If the enable function is not required,

the pin should be connected directly to VCC. The volt-

age at the EN pin should never exceed the power supply

voltage (VCC) by more than 0.3V. If this should occur, the

supply current could be sourced through the ESD diode,

potentially damaging the IC.

CLAMP

300k

CMOS

500Ω

LTC5567 VCC

EN EN

5567 F16

Figure 16. Enable Input Circuit

The EN pin has an internal 300k pull-down resistor.

Therefore, the mixer will be disabled with the enable pin

left floating.

Supply Voltage Ramping

Fast ramping of the supply voltage can cause a current

glitch in the internal ESD clamp circuits connected to the

VCC pin. Depending on the supply inductance, this could

result in a supply voltage transient that exceeds the 4.0V

maximum rating. A supply voltage ramp time greater than

1ms is recommended.

Spurious Output Levels

Mixer spurious output levels versus harmonics of the

RF and LO are tabulated in Table 8. The spur levels were

measured on a standard evaluation board using the test

circuit shown in Figure 1. The spur frequencies can be

calculated using the following equation:

fSPUR = (M • fRF) – (N • fLO)

Table 8. IF Output Spur Levels (dBm)

(RF = 1950MHz, PRF = –2dBm, PIF = 0dBm at 153MHz, Low Side

LO, PLO = 0dBm, VCC = 3.3V, TC = 25°C)

0 1 2 3 4 5 6 7 8 9

0–43 –24 –47 –30 –57 –46 –64 –50 –81

1–30 0 –56 –57 –59 –37 –69 –47 –78 –58

2–60 –56 –67 –68 –72 –78 –78 –85 –87 *

3* –81 –89 * * * * * * *

4* * –73 * * * * * –90 *

5* * * * * * * * * *

6* * * * * * * * *

7* * *

*Less than –90dBc

LTC5567

5567f

Typical applicaTions

300MHz RF Application with 70MHz Highpass IF Matching

IFOUT

50Ω

70MHz NOM

10nF

1.1k

LOIN

50Ω

370MHz ±40MHz

3.3V

89mA

10nF

VCC

IF+

LTC5567

IF–

IADJ

120pF

RFIN

50Ω

300MHz ±40MHz

22pF

TC4-1W

4:1

22pF

BIAS

5567 TA03a

330pF

22pF

390nH

3.3nH

390nH TYPICAL PERFORMANCE

(RF = 300MHz, IF = 70MHz, LO = 370MHz AT 0dBm)

GC = 0.6dB

IIP3 = 26.3dBm

SSB NF = 13.3dB

INPUT P1dB = 10.9dBm

22pF

Conversion Gain, IIP3 and NF

vs RF Frequency

RF Isolation and LO leakage vs

RF and LO Frequency RF, LO and IF Port Return Losses

RF FREQUENCY (MHz)

260

–2

(dB), IIP3 (dBm), NF (dB)

300

340280 320 360 380 400

5567 TA03b

IIP3

HIGH SIDE LO

PLO = 0dBm

IF = 70MHz

TC = 25°C

RF/LO FREQUENCY (MHz)

260

RF ISOLATION (dB)

LO LEAKAGE (dBm)

340 420

5567 TA03c

30 300 380

–50

–40

–30

–60

–70

–80

–20

–10

460

RF-LO

LO-IF

LO-RF

RF-IF

FREQUENCY (MHz)

–40

RETURN LOSS (dB)

–20

–10

–35

–30

–25

–15

–5

150 250 350

5567 TA03d

45010050 200 300 400

LTC5567

5567f

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

4.00 ±0.10

(4 SIDES)

NOTE:

1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC)

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON THE TOP AND BOTTOM OF PACKAGE

PIN 1

TOP MARK

(NOTE 6)

0.55 ±0.20

1615

BOTTOM VIEW—EXPOSED PAD

2.15 ±0.10

(4-SIDES)

0.75 ±0.05 R = 0.115

TYP

0.30 ±0.05

0.65 BSC

0.200 REF

0.00 – 0.05

(UF16) QFN 10-04

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

0.72 ±0.05

0.30 ±0.05

0.65 BSC

2.15 ±0.05

(4 SIDES)

2.90 ±0.05

4.35 ±0.05

PACKAGE OUTLINE

PIN 1 NOTCH R = 0.20 TYP

OR 0.35 × 45° CHAMFER

UF Package

16-Lead Plastic QFN (4mm × 4mm)

(Reference LTC DWG # 05-08-1692 Rev Ø)

package DescripTion

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

LTC5567

5567f

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com

 LINEAR TECHNOLOGY CORPORATION 2012

LT 0412 • PRINTED IN USA

relaTeD parTs

Typical applicaTion

PART NUMBER DESCRIPTION COMMENTS

Infrastructure

5527 400MHz to 3.7GHz, 5V Downconverting Mixer 2.3dB Gain, 23.5dBm IIP3 and 12.5dB NF at 1900MHz, 5V/78mA Supply

LT5557 400MHz to 3.8GHz, 3.3V Downconverting Mixer 2.9dB Gain, 24.7dBm IIP3 and 11.7dB NF at 1950MHz, 3.3V/82mA Supply

LTC559x 600MHz to 4.5GHz Dual Downconverting Mixer

Family 8.5dB Gain, 26.5dBm IIP3, 9.9dB NF, 3.3V/380mA Supply

LTC5569 300MHz to 4GHz, 3.3V Dual Active

Downconverting Mixer 2dB Gain, 26.8dBm IIP3 and 11.7dB NF, 3.3V/180mA Supply

LTC554x 600MHz to 4GHz, 5V Downconverting Mixer Family 8dBm Gain, >25dBm IIP3 and 10dB NF, 3.3V/200mA Supply

LTC6400-X 300MHz Low Distortion IF Amp/ADC Driver Fixed Gain of 8dB, 14dB, 20dB and 26dB; >36dBm OIP3 at 300MHz, Differential I/O

LTC6416 2GHz 16-Bit ADC Buffer 40dBm OIP3 to 300MHz, Programmable Fast Recovery Output Clamping

LTC6412 31dB Linear Analog VGA 35dBm OIP3 at 240MHz, Continuous Gain Range –14dB to 17dB

LT5554 Ultralow Distort IF Digital VGA 48dBm OIP3 at 200MHz, 2dB to 18dB Gain Range, 0.125dB Gain Steps

LT5578 400MHz to 2.7GHz Upconverting Mixer 27dBm OIP3 at 900MHz, 24.2dBm at 1.95GHz, Integrated RF Transformer

LT5579 1.5GHz to 3.8GHz Upconverting Mixer 27.3dBm OIP3 at 2.14GHz, NF = 9.9dB, 3.3V Supply, Single-Ended LO and RF Ports

LTC5588-1 200MHz to 6GHz I/Q Modulator 31dBm OIP3 at 2.14GHz, –160.6dBm/Hz Noise Floor

LTC5585 700MHz to 3GHz Wideband I/Q Demodulator >530MHz Demodulation Bandwidth, IIP2 Tunable to >80dBm, DC Offset Nulling

RF Power Detectors

LT5538 40MHz to 3.8GHz Log Detector ±0.8dB Accuracy Over Temperature, –72dBm Sensitivity, 75dB Dynamic Range

LT5581 6GHz Low Power RMS Detector 40dB Dynamic Range, ±1dB Accuracy Over Temperature, 1.5mA Supply Current

LTC5582 40MHz to 10GHz RMS Detector ±0.5dB Accuracy Over Temperature, ±0.2dB Linearity Error, 57dB Dynamic Range

LTC5583 Dual 6GHz RMS Power Detector Up to 60dB Dynamic Range, ±0.5dB Accuracy Over Temperature, >50dB Isolation

ADCs

LTC2208 16-Bit, 130Msps ADC 78dBFS Noise Floor, >83dB SFDR at 250MHz

LTC2153-14 14-Bit, 310Msps Low Power ADC 68.8dBFS SNR, 88dB SFDR, 401mW Power Consumption

CATV Downconverting Mixer with 1GHz IF Bandwidth

IFOUT

50MHz TO

1000MHz

50Ω

RFIN

1150MHz

50Ω

10pF

1.8pF

5567 TA02a

402Ω

LOIN

1200MHz

TO 2150MHz

50Ω

VCC

3.0V TO 3.6V

10nF 1µF

10V

VCC

IF+

LTC5567

IF–

IADJNC

1nF

MABACT0066

1nF

3.9pF

220nF

10nF

15nH

68nH

15nH

GND

1TEMP

4GND

GND 9

65 7 8

GND

LO 12

GND NC GND

16 1415 13

IF OUTPUT FREQUENCY (MHz)

(dB), OIP3 (dBm)

2RF-LO SPUR (dBc)

600

5567 TA02b

200 800400 1000

OIP3

2RF-LO

RF = 1150MHz

PRF = –6dBm

HIGH SIDE LO

PLO = 0dBm

TC = 25°C

–3

–80

–20

–10

–100

–40

–60

–90

–30

–110

–50

–70

Conversion Gain, OIP3 and 2RF-LO

Spur vs IF Output Frequency