1
LTC1871-7
18717i
FEATURES
APPLICATIO S
U
TYPICAL APPLICATIO
U
High Input Voltage,
Current Mode Boost,
Flyback and SEPIC Controller
July 2002
The LTC
®
1871-7 is a current mode, boost, flyback and
SEPIC controller optimized for driving 6V-rated MOSFETs
in high voltage applications. The LTC1871-7 works equally
well in low or high power applications and requires few
components to provide a complete power supply solu-
tion. The switching frequency can be set with an external
resistor over a 50kHz to 1MHz range, and can be synchro-
nized to an external clock using the MODE/SYNC pin.
Burst Mode operation at light loads, a low minimum
operating supply voltage of 6V and a low shutdown
quiescent current of 10µA make the LTC1871-7 well
suited for battery-operated systems. For applications
requiring constant frequency operation, Burst Mode op-
eration can be defeated using the MODE/SYNC pin. The
LTC1871-7 is available in the 10-lead MSOP package.
■
Optimized for High Input Voltage Applications
■
Wide Chip Supply Voltage Range: 6V to 36V
■
Internal 7V Low Dropout Voltage Regulator
Optimized for 6V-Rated MOSFETs
■
Current Mode Control Provides Excellent
Transient Response
■
High Maximum Duty Cycle (92% Typ)
■
±2% RUN Pin Threshold with 100mV Hysteresis
■
±1% Internal Voltage Reference
■
Micropower Shutdown: I
Q
= 10µA
■
Programmable Operating Frequency
(50kHz to 1MHz) with One External Resistor
■
Synchronizable to an External Clock Up to 1.3 × f
OSC
■
User-Controlled Pulse Skip or Burst Mode
®
Operation
■
Output Overvoltage Protection
■
Can be Used in a No R
SENSE
TM
Mode for V
DS
< 36V
■
Small 10-Lead MSOP Package
■
Telecom Power Supplies
■
42V Automotive Systems
■
24V Industrial Controls
■
IP Phone Power Supplies Burst Mode is a registered trademark of Linear Technology Corporation.
No R
SENSE
is a trademark of Linear Technology Corporation.
Figure 1. Small, Nonisolated 12V Flyback Telecom Housekeeping Supply
, LTC and LT are registered trademarks of Linear Technology Corporation.
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
DESCRIPTIO
U
RUN
I
TH
FB
FREQ
MODE/SYNC
SENSE
V
IN
INTV
CC
GATE
GND
LTC1871-7
120k 4.7µF
X5R
2.2µF
100V
X7R
M1
FDC2512
0.12Ω
V
IN
36V TO 72V
3.4k
2.2nF
26.7k
D3
10BQ060
47µF
16V
X5R
V
OUT
12V
0.4A
604k
12.4k
T1
VP1-0076
100k
10Ω
Q1
FMMT625
D2
4148
D1
9.1V
110k 0.1µF
X5R
3:1
18717 F01
PARAMETER LTC1871-7 LTC1871
INTV
CC
7.0V 5.2V
INTV
CC
UV
+
5.6V 2.1V
INTV
CC
UV
–
4.6V 1.9V
Final Electrical Specifications
2
LTC1871-7
18717i
(Note 1)
V
IN
Voltage ............................................... –0.3V to 36V
INTV
CC
Voltage ........................................... –0.3V to 9V
INTV
CC
Output Current ........................................ 50mA
GATE Voltage........................... –0.3V to V
INTVCC
+ 0.3V
I
TH
, FB Voltages ....................................... –0.3V to 2.7V
RUN Voltage ............................................... –0.3V to 7V
MODE/SYNC Voltage ...................................–0.3V to 9V
FREQ Voltage............................................–0.3V to 1.5V
SENSE Pin Voltage ................................... –0.3V to 36V
Operating Temperature Range (Note 2) .. –40°C to 85°C
Junction Temperature (Note 3)............................ 125°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)..................300°C
ORDER PART
NUMBER
LTC1871EMS-7
T
JMAX
= 125°C, θ
JA
= 120°C/ W
ABSOLUTE AXI U RATI GS
WWWU
PACKAGE/ORDER I FOR ATIO
UU
W
ELECTRICAL CHARACTERISTICS
MS PART MARKING
LTG4
1
2
3
4
5
RUN
I
TH
FB
FREQ
MODE/
SYNC
10
9
8
7
6
SENSE
V
IN
INTV
CC
GATE
GND
TOP VIEW
MS PACKAGE
10-LEAD PLASTIC MSOP
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Main Control Loop
V
IN(MIN)
Minimum Input Voltage 6 V
I
Q
Input Voltage Supply Current (Note 4)
Continuous Mode V
MODE/SYNC
= 5V, V
FB
= 1.4V, V
ITH
= 0.75V 600 1000 µA
Burst Mode Operation, No Load V
MODE/SYNC
= 0V, V
ITH
= 0.2V (Note 5) 280 500 µA
Shutdown Mode V
RUN
= 0V 12 25 µA
V
RUN+
Rising RUN Input Threshold Voltage 1.348 V
V
RUN–
Falling RUN Input Threshold Voltage 1.223 1.248 1.273 V
●1.198 1.298 V
V
RUN(HYST)
RUN Pin Input Threshold Hysteresis 50 100 150 mV
I
RUN
RUN Input Current 560 nA
V
FB
Feedback Voltage V
ITH
= 0.2V (Note 5) 1.218 1.230 1.242 V
●1.212 1.248 V
I
FB
FB Pin Input Current V
ITH
= 0.2V (Note 5) 18 60 nA
∆V
FB
Line Regulation 6V ≤ V
IN
≤ 30V 0.002 0.02 %/V
∆V
IN
∆V
FB
Load Regulation V
MODE/SYNC
= 0V, V
TH
= 0.5V to 0.90V (Note 5) ●–1 –0.1 %
∆V
ITH
∆V
FB(OV)
∆FB Pin, Overvoltage Lockout V
FB(OV)
– V
FB(NOM)
in Percent 2.5 6 10 %
g
m
Error Amplifier Transconductance I
TH
Pin Load = ±5µA (Note 5) 600 µmho
V
ITH(BURST)
Burst Mode Operation I
TH
Pin Voltage Falling I
TH
Voltage (Note 5) 0.3 V
V
SENSE(MAX)
Maximum Current Sense Input Threshold Duty Cycle < 20% 120 150 180 mV
I
SENSE(ON)
SENSE Pin Current (GATE High) V
SENSE
= 0V 35 70 µA
I
SENSE(OFF)
SENSE Pin Current (GATE Low) V
SENSE
= 30V (No R
SENSE
Mode) 0.1 5 µA
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VIN = 8V, VRUN = 1.5V, RFREQ = 80k, VMODE/SYNC = 0V, unless otherwise specified.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
3
LTC1871-7
18717i
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: The LTC1871-7E is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: T
J
is calculated from the ambient temperature T
A
and power
dissipation P
D
according to the following formula:
T
J
= T
A
+ (P
D
• 120°C/W)
Note 4: The dynamic input supply current is higher due to power MOSFET
gate charging (Q
G
• f
OSC
). See Applications Information.
Note 5: The LTC1871-7 is tested in a feedback loop that servos V
FB
to the
reference voltage with the I
TH
pin forced to a voltage between 0V and 1.4V
(the no load to full load operating voltage range for the I
TH
pin is 0.3V to
1.23V).
Note 6: In a synchronized application, the internal slope compensation
gain is increased by 25%. Synchronizing to a significantly higher ratio will
reduce the effective amount of slope compensation, which could result in
subharmonic oscillation for duty cycles greater than 50%.
Note 7: Rise and fall times are measured at 10% and 90% levels.
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VIN = 8V, VRUN = 1.5V, RFREQ = 80k, VMODE/SYNC = 0V, unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Oscillator
f
OSC
Oscillator Frequency R
FREQ
= 80k 250 300 350 kHz
Oscillator Frequency Range 50 1000 kHz
D
MAX
Maximum Duty Cycle 87 92 97 %
f
SYNC/
f
OSC
Recommended Maximum Synchronized f
OSC
= 300kHz (Note 6) 1.25 1.30
Frequency Ratio
t
SYNC(MIN)
MODE/SYNC Minimum Input Pulse Width V
SYNC
= 0V to 5V 25 ns
t
SYNC(MAX)
MODE/SYNC Maximum Input Pulse Width V
SYNC
= 0V to 5V 0.8/f
OSC
ns
V
IL(MODE)
Low Level MODE/SYNC Input Voltage 0.3 V
V
IH(MODE)
High Level MODE/SYNC Input Voltage 1.2 V
R
MODE/SYNC
MODE/SYNC Input Pull-Down Resistance 50 kΩ
V
FREQ
Nominal FREQ Pin Voltage 0.62 V
Low Dropout Regulator
V
INTVCC
INTV
CC
Regulator Output Voltage V
IN
= 8V 6.5 7 7.5 V
UVLO INTV
CC
Undervoltage Lockout Thresholds Rising INTV
CC
5.6 V
Falling INTV
CC
4.6 V
UVLO Hysteresis 1.0 V
∆V
INTVCC
INTV
CC
Regulator Line Regulation 8V ≤ V
IN
≤ 15V 8 25 mV
∆V
IN1
∆V
INTVCC
INTV
CC
Regulator Line Regulation 15V ≤ V
IN
≤ 30V 70 200 mV
∆V
IN2
V
LDO(LOAD)
INTV
CC
Load Regulation 0 ≤ I
INTVCC
≤ 20mA, V
IN
= 8V –2 –0.2 %
V
DROPOUT
INTV
CC
Regulator Dropout Voltage V
IN
= 6V, INTV
CC
Load = 20mA 280 mV
GATE Driver
t
r
GATE Driver Output Rise Time C
L
= 3300pF (Note 7) 17 100 ns
t
f
GATE Driver Output Fall Time C
L
= 3300pF (Note 7) 8 100 ns
4
LTC1871-7
18717i
TYPICAL PERFOR A CE CHARACTERISTICS
UW
FB Voltage vs Temp FB Voltage Line Regulation FB Pin Current vs Temperature
TEMPERATURE (°C)
–50
FB VOLTAGE (V)
1.23
1.24
150
1871 G01
1.22
1.21 050 100
–25 25 75 125
1.25
V
IN
(V)
0
1.229
FB VOLTAGE (V)
1.230
1.231
5101520
1871 G02
25 30 35
TEMPERATURE (°C)
–50
0
FB PIN CURRENT (nA)
10
20
30
40
60
–25 250 50 10075
1871 G03
125 150
50
Shutdown Mode IQ vs VIN Burst Mode IQ vs VIN
V
IN
(V)
0
0
SHUTDOWN MODE I
Q
(µA)
10
20
10 20 30 40
1871 G04
30
Shutdown Mode IQ vs Temperature
TEMPERATURE (°C)
–50
0
SHUTDOWN MODE I
Q
(µA)
5
10
15
20
–25 0 25 50
1871 G05
75 100 125 150
V
IN
= 8V
V
IN
(V)
0
0
Burst Mode I
Q
(µA)
100
200
300
400
600
10 20
1871 G06
30 40
500
Burst Mode IQ vs Temperature Gate Drive Rise and Fall Time
vs CL
Dynamic IQ vs Frequency
TEMPERATURE (°C)
–50
0
Burst Mode I
Q
(µA)
200
500
050 75
1871 G07
100
400
300
–25 25 100 125 150
FREQUENCY (kHz)
0
0
IQ (mA)
2
6
8
10
800
18
1871 G08
4
400 1200
600
200 1000
12
14
16
CL = 3300pF
IQ(TOT) = 600µA + Qg • f
CL (pF)
0
0
TIME (ns)
10
20
30
40
60
2000 4000 6000 8000
1871 G09
10000 12000
50
RISE TIME
FALL TIME
5
LTC1871-7
18717i
TYPICAL PERFOR A CE CHARACTERISTICS
UW
RUN Thresholds vs VIN RT vs Frequency
Frequency vs Temperature SENSE Pin Current vs Temperature
Maximum Sense Threshold
vs Temperature
INTVCC Load Regulation INTVCC Dropout Voltage
vs Current, Temperature
INTVCC Line Regulation
V
IN
(V)
0
1.2
RUN THRESHOLDS (V)
1.3
1.4
10 20 30 40
1871 G10
1.5
RUN Thresholds vs Temperature
TEMPERATURE (°C)
–50
RUN THRESHOLDS (V)
1.30
1.35
150
1871 G11
1.25
1.20 050 100
–25 25 75 125
1.40
FREQUENCY (kHz)
100
R
T
(kΩ)
300
1000
1871 G12
10
100
200 1000
900
800700600
500
400
0
TEMPERATURE (°C)
–50
275
GATE FREQUENCY (kHz)
280
290
295
300
325
310
050 75
1871 G13
285
315
320
305
–25 25 100 125 150
TEMPERATURE (°C)
–50
140
MAX SENSE THRESHOLD (mV)
145
150
155
160
–25 0 25 50
1871 G14
75 100 125 150
TEMPERATURE (°C)
–50
25
SENSE PIN CURRENT (µA)
30
35
050 75
1871 G15
–25 25 100 125 150
GATE HIGH
V
SENSE
= 0V
INTV
CC
LOAD (mA)
0
INTV
CC
VOLTAGE (V)
7.0
30 50 80
1871 G16
6.9
6.8 10 20 40 60 70
V
IN
= 8V
V
IN
(V)
0
6.9
INTV
CC
VOLTAGE (V)
7.0
7.1
10 20 30 40
1871 G17
7.2
51525 35
INTV
CC
LOAD (mA)
0
0
DROPOUT VOLTAGE (mV)
50
150
200
250
500
350
510
1871 G18
100
400
450
300
15 20
150°C
75°C
125°C
25°C
–50°C
0°C
6
LTC1871-7
18717i
UU
U
PI FU CTIO S
RUN (Pin 1): The RUN pin provides the user with an
accurate means for sensing the input voltage and pro-
gramming the start-up threshold for the converter. The
falling RUN pin threshold is nominally 1.248V and the
comparator has 100mV of hysteresis for noise immunity.
When the RUN pin is below this input threshold, the IC is
shut down and the V
IN
supply current is kept to a low
value (typ 10µA). The Absolute Maximum Rating for the
voltage on this pin is 7V.
I
TH
(Pin 2): Error Amplifier Compensation Pin. The cur-
rent comparator input threshold increases with this
control voltage. Nominal voltage range for this pin is 0V
to 1.40V.
FB (Pin 3): Receives the feedback voltage from the
external resistor divider across the output. Nominal
voltage for this pin in regulaton is 1.230V.
FREQ (Pin 4): A resistor from the FREQ pin to ground
programs the operating frequency of the chip. The nomi-
nal voltage at the FREQ pin is 0.6V.
MODE/SYNC (Pin 5): This input controls the operating
mode of the converter and allows for synchronizing the
operating frequency to an external clock. If the MODE/
SYNC pin is connected to ground, Burst Mode operation
is enabled. If the MODE/SYNC pin is connected to INTV
CC
,
or if an external logic-level synchronization signal is
applied to this input, Burst Mode operation is disabled
and the IC operates in a continuous mode.
GND (Pin 6): Ground Pin.
GATE (Pin 7): Gate Driver Output.
I
NTV
CC
(Pin 8): The Internal 7V Regulator Output. The
gate driver and control circuits are powered from this
voltage. Decouple this pin locally to the IC ground with a
minimum of 4.7µF low ESR tantalum or ceramic
capacitor. This 7V regulator has an undervoltage lockout
circuit with 5.6V and 4.6V rising and falling thresholds,
respectively.
V
IN
(Pin 9): Main Supply Pin. Must be closely decoupled
to ground.
SENSE (Pin 10): The Current Sense Input for the Control
Loop. Connect this pin to a resistor in the source of
the power MOSFET. Alternatively, the SENSE pin may
be connected to the drain of the power MOSFET, in
applications where the maximum V
DS
is less than 36V.
Internal leading edge blanking is provided for both sens-
ing methods.
BLOCK DIAGRA
W
–
+
–
+
+
1.230V
85mV OV 50k
EA
UV
TO
START-UP
CONTROL
BURST
COMPARATOR
S
RQ
LOGIC
PWM LATCH
CURRENT
COMPARATOR
0.30V
1.230V
7V
–
+
5.6V UP
4.6V DOWN
1.230V SLOPE 1.230V
ILOOP
FB
ITH
–
+
gm
3
MODE/SYNC
5
FREQ
4
2
INTVCC
8LDO
V-TO-I
OSCV-TO-I
SLOPE
COMPENSATION
BIAS AND
START-UP
CONTROL
VIN
BIAS VREF
IOSC
RLOOP
–
+
–
+
C1
SENSE
10
GND
1871 BD
6
GATE
INTVCC
GND
7
VIN
1.248V
9
RUN
C2
1
0.6V
7
LTC1871-7
18717i
Main Control Loop
The LTC1871-7 is a constant frequency, current mode
controller for DC/DC boost, SEPIC and flyback converter
applications. With the LTC1871-7 the current control loop
can be closed by sensing the voltage drop either across the
power MOSFET switch or across a discrete sense resistor,
as shown in Figure 2.
OPERATIO
U
a higher peak inductor current value. The average inductor
current will therefore rise until it equals the load current,
thereby maintaining output regulation.
The nominal operating frequency of the LTC1871-7 is
programmed using a resistor from the FREQ pin to ground
and can be controlled over a 50kHz to 1000kHz range. In
addition, the internal oscillator can be synchronized to an
external clock applied to the MODE/SYNC pin and can be
locked to a frequency between 100% and 130% of its
nominal value. When the MODE/SYNC pin is left open, it is
pulled low by an internal 50k resistor and Burst Mode
operation is enabled. If this pin is taken above 2V or an
external clock is applied, Burst Mode operation is disabled
and the IC operates in continuous mode. With no load (or
an extremely light load), the controller will skip pulses in
order to maintain regulation and prevent excessive output
ripple.
The RUN pin controls whether the IC is enabled or is in a
low current shutdown state. A micropower 1.248V refer-
ence and comparator C2 allow the user to program the
supply voltage at which the IC turns on and off (compara-
tor C2 has 100mV of hysteresis for noise immunity). With
the RUN pin below 1.248V, the chip is off and the input
supply current is typically only 10µA.
An overvoltage comparator OV senses when the FB pin
exceeds the reference voltage by 6.5% and provides a
reset pulse to the main RS latch. Because this RS latch is
reset-dominant, the power MOSFET is actively held off for
the duration of an output overvoltage condition.
The LTC1871-7 can be used either by sensing the voltage
drop across the power MOSFET or by connecting the
SENSE pin to a conventional shunt resistor in the source
of the power MOSFET, as shown in Figure 2. Sensing the
voltage across the power MOSFET maximizes converter
efficiency and minimizes the component count, but limits
the output voltage to the maximum rating for this pin
(36V). By connecting the SENSE pin to a resistor in the
source of the power MOSFET, the user is able to program
output voltages significantly greater than 36V.
COUT
VSW
VSW
2a. SENSE Pin Connection for
Maximum Efficiency (VSW < 36V)
VOUT
VIN
GND
LD
+
COUT
RS
1871 F02
2b. SENSE Pin Connection for Precise
Control of Peak Current or for VSW > 36V
VOUT
VIN
GND
LD
+
GATE
GND
VIN
SENSE
GATE
GND
VIN
SENSE
Figure 2. Using the SENSE Pin On the LTC1871-7
For circuit operation, please refer to the Block Diagram of
the IC and Figure 1. In normal operation, the power
MOSFET is turned on when the oscillator sets the PWM
latch and is turned off when the current comparator C1
resets the latch. The divided-down output voltage is com-
pared to an internal 1.230V reference by the error amplifier
EA, which outputs an error signal at the I
TH
pin. The voltage
on the I
TH
pin sets the current comparator C1 input
threshold. When the load current increases, a fall in the FB
voltage relative to the reference voltage causes the I
TH
pin
to rise, which causes the current comparator C1 to trip at
8
LTC1871-7
18717i
OPERATIO
U
Programming the Operating Mode
For applications where maximizing the efficiency at very
light loads (e.g., <100µA) is a high priority, the current in
the output divider could be decreased to a few micro-
amps and Burst Mode operation should be applied (i.e.,
the MODE/SYNC pin should be connected to ground). In
applications where fixed frequency operation is more
critical than low current efficiency, or where the lowest
output ripple is desired, pulse-skip mode operation should
be used and the MODE/SYNC pin should be connected to
the INTV
CC
pin. This allows discontinuous conduction
mode (DCM) operation down to near the limit defined by
the chip’s minimum on-time (about 175ns). Below this
output current level, the converter will begin to skip
cycles in order to maintain output regulation. Figures 3
and 4 show the light load switching waveforms for Burst
Mode and pulse-skip mode operation for the converter in
Figure␣ 1.
Burst Mode Operation
Burst Mode operation is selected by leaving the MODE/
SYNC pin unconnected or by connecting it to ground. In
normal operation, the range on the I
TH
pin corresponding
to no load to full load is 0.30V to 1.2V. In Burst Mode
operation, if the error amplifier EA drives the I
TH
voltage
below 0.525V, the buffered I
TH
input to the current com-
parator C1 will be clamped at 0.525V (which corresponds
to 25% of maximum load current). The inductor current
peak is then held at approximately 30mV divided by the
power MOSFET R
DS(ON)
. If the I
TH
pin drops below 0.30V,
the Burst Mode comparator B1 will turn off the power
MOSFET and scale back the quiescent current of the IC to
250µA (sleep mode). In this condition, the load current will
be supplied by the output capacitor until the I
TH
voltage
rises above the 50mV hysteresis of the burst comparator.
At light loads, short bursts of switching (where the aver-
age inductor current is 20% of its maximum value) fol-
lowed by long periods of sleep will be observed, thereby
greatly improving converter efficiency. Oscilloscope wave-
forms illustrating Burst Mode operation are shown in
Figure 3.
Pulse-Skip Mode Operation
With the MODE/SYNC pin tied to a DC voltage above 2V,
Burst Mode operation is disabled. The internal, 0.525V
buffered I
TH
burst clamp is removed, allowing the I
TH
pin
to directly control the current comparator from no load to
full load. With no load, the I
TH
pin is driven below 0.30V,
the power MOSFET is turned off and sleep mode is
invoked. Oscilloscope waveforms illustrating this mode of
operation are shown in Figure 4.
When an external clock signal drives the MODE/SYNC pin
at a rate faster than the chip’s internal oscillator, the
oscillator will synchronize to it. In this synchronized mode,
Burst Mode operation is disabled. The constant frequency
associated with synchronized operation provides a more
controlled noise spectrum from the converter, at the
expense of overall system efficiency of light loads.
10µs/DIV 1871 F03
Figure 3. LTC1871-7 Burst Mode Operation
(MODE/SYNC = 0V) at Low Output Current Figure 4. LTC1871-7 Low Output Current Operation with
Burst Mode Operation Disabled (MODE/SYNC = INTVCC)
V
OUT
50mV/DIV
I
L
5A/DIV
MODE/SYNC = 0V
(Burst Mode OPERATION)
V
OUT
50mV/DIV
I
L
5A/DIV
MODE/SYNC = INTV
CC
(PULSE-SKIP MODE)
2µs/DIV 1871 F04
9
LTC1871-7
18717i
APPLICATIO S I FOR ATIO
WUUU
When the oscillator’s internal logic circuitry detects a
synchronizing signal on the MODE/SYNC pin, the internal
oscillator ramp is terminated early and the slope compen-
sation is increased by approximately 30%. As a result, in
applications requiring synchronization, it is recommended
that the nominal operating frequency of the IC be pro-
grammed to be about 75% of the external clock frequency.
Attempting to synchronize to too high an external fre-
quency (above 1.3f
O
) can result in inadequate slope com-
pensation and possible subharmonic oscillation (or jitter).
The external clock signal must exceed 2V for at least 25ns,
and should have a maximum duty cycle of 80%, as shown
in Figure 5. The MOSFET turn on will synchronize to the
rising edge of the external clock signal.
capacitor. A graph for selecting the value of R
T
for a given
operating frequency is shown in Figure 6.
Figure 6. Timing Resistor (RT) Value
Figure 5. MODE/SYNC Clock Input and Switching
Waveforms for Synchronized Operation
1871 F05
2V TO 7V
MODE/
SYNC
GATE
I
L
t
MIN
= 25ns
0.8T
D = 40%
T T = 1/f
O
FREQUENCY (kHz)
100
R
T
(kΩ)
300
1000
1871 F06
10
100
200 1000
900
800700600
500
400
0
Programming the Operating Frequency
The choice of operating frequency and inductor value is a
tradeoff between efficiency and component size. Low
frequency operation improves efficiency by reducing
MOSFET and diode switching losses. However, lower
frequency operation requires more inductance for a given
amount of load current.
The LTC1871-7 uses a constant frequency architecture
that can be programmed over a 50kHz to 1000kHz range
with a single external resistor from the FREQ pin to
ground, as shown in Figure 1. The nominal voltage on the
FREQ pin is 0.6V, and the current that flows into the FREQ
pin is used to charge and discharge an internal oscillator
INTV
CC
Regulator Bypassing and Operation
An internal, P-channel low dropout voltage regulator pro-
duces the 7V supply which powers the gate driver and
logic circuitry within the LTC1871-7, as shown in Figure 7.
The INTV
CC
regulator can supply up to 50mA and must be
bypassed to ground immediately adjacent to the IC pins
with a minimum of 4.7µF tantalum or ceramic capacitor.
Good bypassing is necessary to supply the high transient
currents required by the MOSFET gate driver.
The LTC1871-7 contains an undervoltage lockout circuit
which protects the external MOSFET from switching at low
gate-to-source voltages. This undervoltage circuit senses
the INTV
CC
voltage and has a 5.6V rising threshold and a
4.6V falling threshold.
For input voltages that don’t exceed 8V (the absolute
maximum rating for INTV
CC
is 9V), the internal low drop-
out regulator in the LTC1871-7 is redundant and the
INTV
CC
pin can be shorted directly to the V
IN
pin. With the
INTV
CC
pin shorted to V
IN
, however, the divider that
programs the regulated INTV
CC
voltage will draw 14µA of
current from the input supply, even in shutdown mode.
For applications that require the lowest shutdown mode
input supply current, do not connect the INTV
CC
pin to V
IN
.
Regardless of whether the INTV
CC
pin is shorted to V
IN
or
not, it is always necessary to have the driver circuitry
bypassed with a 4.7µF ceramic capacitor to ground
immediately adjacent to the INTV
CC
and GND pins.
10
LTC1871-7
18717i
APPLICATIO S I FOR ATIO
WUUU
In an actual application, most of the IC supply current is
used to drive the gate capacitance of the power MOSFET.
As a result, high input voltage applications in which a large
power MOSFET is being driven at high frequencies can
cause the LTC1871-7 to exceed its maximum junction
temperature rating. The junction temperature can be
estimated using the following equations:
I
Q(TOT)
≈ I
Q
+ f • Q
G
P
IC
= V
IN
• (I
Q
+ f • Q
G
)
T
J
= T
A
+ P
IC
• R
TH(JA)
The total quiescent current I
Q(TOT)
consists of the static
supply current (I
Q
) and the current required to charge and
discharge the gate of the power MOSFET. The 10-pin
MSOP package has a thermal resistance of R
TH(JA)
=
120°C/W.
As an example, consider a power supply with V
IN
=10V.
The switching frequency is 200kHz, and the maximum
ambient temperature is 70°C. The power MOSFET chosen
is the FDS3670(Fairchild), which has a maximum R
DS(ON)
of 35mΩ (at room temperature) and a maximum total gate
charge of 80nC (the temperature coefficient of the gate
charge is low).
I
Q(TOT)
= 600µA + 80nC • 200kHz = 16.6mA
P
IC
= 10V • 16.6mA = 166mW
T
J
= 70°C + 120°C/W • 166mW = 89.9°C
T
JRISE
= 19.9°C
This demonstrates how significant the gate charge current
can be when compared to the static quiescent current in
the IC.
To prevent the maximum junction temperature from being
exceeded, the input supply current must be checked when
operating in a continuous mode at high V
IN
. A tradeoff
between the operating frequency and the size of the power
MOSFET may need to be made in order to maintain a
reliable IC junction temperature. Prior to lowering the
operating frequency, however, be sure to check with
power MOSFET manufacturers for their latest-and-great-
est low Q
G
, low R
DS(ON)
devices. Power MOSFET manu-
facturing technologies are continually improving, with
newer and better performance devices being introduced
almost yearly.
Output Voltage Programming
The output voltage is set by a resistor divider according to
the following formula:
VV
R
R
O
=+
1 230 1 2
1
.•
Figure 7. Bypassing the LDO Regulator and Gate Driver Supply
–
+
1.230V
R2 R1
P-CH
7V
DRIVER GATE
C
VCC
4.7µF
X5R
C
IN
INPUT
SUPPLY
2.5V TO 30V
GND
PLACE AS CLOSE AS
POSSIBLE TO DEVICE PINS
M1
1871 F07
INTV
CC
V
IN
GND
LOGIC 6V-RATED
POWER
MOSFET
11
LTC1871-7
18717i
APPLICATIO S I FOR ATIO
WUUU
The external resistor divider is connected to the output as
shown in Figure 1, allowing remote voltage sensing. The
resistors R1 and R2 are typically chosen so that the error
caused by the current flowing into the FB pin during
normal operation is less than 1% (this translates to a
maximum value of R1 of about 250k).
Programming Turn-On and Turn-Off Thresholds
with the RUN Pin
The LTC1871-7 contains an independent, micropower
voltage reference and comparator detection circuit that
remains active even when the device is shut down, as
shown in Figure 8. This allows users to accurately program
an input voltage at which the converter will turn on and off.
The falling threshold voltage on the RUN pin is equal to the
internal reference voltage of 1.248V. The comparator has
100mV of hysteresis to increase noise immunity.
The turn-on and turn-off input voltage thresholds are
programmed using a resistor divider according to the
following formulas:
VV
R
R
VV
R
R
IN OFF
IN ON
()
()
.•
.•
=+
=+
1 248 1 2
1
1 348 1 2
1
The resistor R1 is typically chosen to be less than 1M.
For applications where the RUN pin is only to be used as
a logic input, the user should be aware of the 7V
Absolute Maximum Rating for this pin! The RUN pin can
be connected to the input voltage through an external 1M
resistor, as shown in Figure 8c, for “always on” operation.
–
+
RUN
COMPARATOR
VIN
RUN
R2
R1
INPUT
SUPPLY OPTIONAL
FILTER
CAPACITOR
+
–GND
1871 F8a
BIAS AND
START-UP
CONTROL
1.248V
µPOWER
REFERENCE
6V
Figure 8b. On/Off Control Using External Logic Figure 8c. External Pull-Up Resistor On
RUN Pin for “Always On” Operation
Figure 8a. Programming the Turn-On and Turn-Off Thresholds Using the RUN Pin
–
+
RUN
COMPARATOR
1.248V
1871 F08b
RUN
6V
EXTERNAL
LOGIC CONTROL
–
+
RUN
COMPARATOR
V
IN
RUN
R2
1M
INPUT
SUPPLY
+
–
GND 1.248V
1871 F08c
6V
12
LTC1871-7
18717i
LINEAR TECHNOLOGY CORPORATION 2002
LT/TP 0702 1.5K • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
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TYPICAL APPLICATIO S
U
RUN
ITH
FB
FREQ
MODE/SYNC
SENSE
VIN
INTVCC
GATE
GND
LTC1871-7
RT
120k f = 200kHz
T1: COILTRONICS VP1-0076
M1: FAIRCHILD FDC2512 (150V, 0.5Ω)
Q1: ZETEX FMMT625 (120V)
C2
4.7µF
X5R
CIN
2.2µF
100V
X7R
M1
RS
0.12Ω
T1
1, 2, 3
(SERIES)
VIN
36V TO 72V
4, 5, 6
(PARALLEL)
RC
3.4k
CC1
2.2nF
CC2
47pF
C1
1nF
OPTIONAL
R2
26.7k
1%
D3
COUT
47µF
X5R
VOUT
12V
0.4A
R1
604k
1%
R3
12.4k
1%
R5
100k
R6
10Ω
Q1
D2
D1
9.1V
UV+ = 31.8V
UV– = 29.5V
D1: ON SEMICONDUCTOR MMBZ5239BLT1 (9.1V)
D2: ON SEMICONDUCTOR MMSD4148T11
D3: INTERNATIONAL RECTIFIER 10BQ060
R4
110k
1%
C3
0.1µF
X5R
18717 F02
U
PACKAGE DESCRIPTIO
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661)
MSOP (MS) 0402
0.53 ± 0.01
(.021 ± .006)
SEATING
PLANE
0.18
(.007)
1.10
(.043)
MAX
0.17 – 0.27
(.007 – .011) 0.13 ± 0.05
(.005 ± .002)
0.86
(.034)
REF
0.50
(.0197)
TYP
12345
4.88 ± 0.10
(.192 ± .004)
0.497 ± 0.076
(.0196 ± .003)
REF
8910 76
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
3.00 ± 0.102
(.118 ± .004)
NOTE 4
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.254
(.010) 0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
5.23
(.206)
MIN
3.2 – 3.45
(.126 – .136)
0.889 ± 0.127
(.035 ± .005)
RECOMMENDED SOLDER PAD LAYOUT
0.305 ± 0.038
(.0120 ± .0015)
TYP
0.50
(.0197)
BSC
