IS31AP2005
Lumissil Microsystems – www.lumissil.com 1
Rev. D, 06/02/2017
2.95W MONO FILTER-LESS CLASS-D AUDIO POWER AMPLIFIER
June 2017
GENERAL DESCRIPTION
The IS31AP2005 is a high efficiency, 2.95W mono
Class-D audio power amplifier. A low noise, filter-less
PWM architecture eliminates the output filter, reducing
external component count, system cost, and
simplifying design.
Operating in a single 5V supply, IS31AP2005 is
capable of driving 4Ω speaker load at a continuous
average output of 2.95W with 10% THD+N. The
IS31AP2005 has high efficiency with speaker load
compared to a typical Class-AB amplifier.
In cellular handsets, the earpiece, speaker phone, and
melody ringer can each be driven by the IS31AP2005.
The gain of IS31AP2005 is externally configurable
which allows independent gain control from multiple
sources by summing signals from each function.
The IS31AP2005 is available in DFN-8 (3mm × 3mm),
MSOP-8 packages.
FEATURES
5V supply at THD= 10%
- 2.95W into 4Ω (Typ.)
- 1.70W into 8Ω (Typ.)
Efficiency at 5V:
- 83% at 400mW with a 4Ω speaker
- 89% at 400mW with an 8Ω speaker
Optimized PWM output stage eliminates LC
output filter
Fully differential design reduces RF rectification
and eliminates bypass capacitor
Integrated pop-and-click suppression circuitry
Short-circuit and thermal protect
DFN-8 (3mm×3mm) and MSOP-8 packages
RoHS compliant and 100% lead (Pb)-free
APPLICATIONS
Wireless or cellular handsets and PDAs
Portable DVD player
Notebook PC
Portable radio
Educational toys
USB speakers
Portable gaming
TYPICAL APPLICATION CIRCUIT
Figure 1 Typical Application Circuit with Differential Input
IS31AP2005
Lumissil Microsystems – www.lumissil.com 2
Rev. D, 06/02/2017
Figure 2 Typical Application Schematic with Single-ended Input
IS31AP2005
Lumissil Microsystems – www.lumissil.com 3
Rev. D, 06/02/2017
PIN CONFIGURATION
Package Pin Configuration (Top view)
DFN-8
MSOP-8
PIN DESCRIPTION
No. Pin Description
DFN-8 MSOP-8
1 SDB Shutdown terminal, active low logic.
2 NC No internal connection.
3 IN+ Positive differential input.
4 IN- Negative differential input.
5 OUT+ Positive BTL output.
6 VCC Power supply.
7 GND High-current ground.
8 OUT- Negative BTL output.
- Thermal Pad Connect to GND.
IS31AP2005
Lumissil Microsystems – www.lumissil.com 4
Rev. D, 06/02/2017
ORDERING INFORMATION
Industrial Range: -40°C to +85°C
Order Part No. Package QTY/Reel
IS31AP2005-DLS2-TR
IS31AP2005-SLS2-TR
DFN-8, Lead-free
MSOP-8, Lead-free 2500
Copyright©2017LumissilMicrosystems.Allrightsreserved.Lumissil Microsystems reservestherighttomakechangestothisspecificationandits
productsatanytimewithoutnotice.LumissilMicrosystemsassumesnoliabilityarisingoutoftheapplicationoruseofanyinformation,productsor
servicesdescribedherein.Customersareadvisedtoobtainthelatestversionofthisdevicespecificationbeforerelyingonanypublishedinformationand
beforeplacingordersforproducts.
LumissilMicrosystemsdoesnotrecommendtheuseofanyofitsproductsinlifesupportapplicationswherethefailureormalfunctionoftheproductcan
reasonablybeexpectedtocausefailureofthelifesupportsystemortosignificantlyaffectitssafetyoreffectiveness.Productsarenotauthorizedforusein
suchapplicationsunlessLumissilMicrosystemsreceiveswrittenassurancetoitssatisfaction,that:
a.)theriskofinjuryordamagehasbeenminimized;
b.)theuserassumeallsuchrisks;and
c.)potentialliabilityofLumissilMicrosystemsisadequatelyprotectedunderthecircumstances
IS31AP2005
Lumissil Microsystems – www.lumissil.com 5
Rev. D, 06/02/2017
ABSOLUTE MAXIMUM RATINGS
Supply voltage, VCC -0.3V ~ +6.0V
Voltage at any input pin -0.3V ~ VCC+0.3V
Maximum junction temperature, TJMAX +150°C
Storage temperature range, TSTG -65°C ~ +150°C
Operating temperature range, TA -40°C ~ +85°C
Thermal resistance, θJA (DFN-8)
θJA (MSOP-8)
70°C /W
211.4°C /W
ESD (HBM)
ESD (CDM)
±7kV
±500V
Note: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications
is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
VCC= 2.7V ~ 5.5V, TA= 25°C, unless otherwise noted. (Note 1)
Symbol Parameter Condition Min. Typ. Max. Unit
VCC Supply voltage 2.7 5.5 V
|VOS| Output offset voltage
(measured differentially) VSDB= 0V, AV= 2V/V 10 mV
ICC Quiescent current VCC= 5.5V, no load 2.6 mA
VCC= 2.7V, no load 1.2
ISD Shutdown current VSDB= 0.4V 1 μA
fSW Switching frequency 250 kHz
RIN Input resistor Gain≤ 20V/V 15 kΩ
Gain Audio input gain RIN= 150kΩ 2 V/V
VIH High-level input voltage 1.4 V
VIL Low-level input voltage 0.4 V
IS31AP2005
Lumissil Microsystems – www.lumissil.com 6
Rev. D, 06/02/2017
ELECTRICAL CHARACTERISTICS
TA= 25°C, Gain= 2V/V. (Note 2)
Symbol Parameter Condition Min. Typ. Max. Unit
PO Output power
THD+N= 10%
f= 1kHz, RL= 8Ω
VCC= 5.0V 1.70
W
VCC= 4.2V 1.20
VCC= 3.6V 0.83
THD+N= 10%
f= 1kHz, RL= 4Ω
VCC= 5.0V 2.95
W
VCC= 4.2V 2.05
VCC= 3.6V 1.55
THD+N= 1%
f= 1kHz, RL= 8Ω
VCC= 5.0V 1.45
W
VCC= 4.2V 0.95
VCC= 3.6V 0.66
THD+N= 1%
f= 1kHz, RL= 4Ω
VCC= 5.0V 2.50
W
VCC= 4.2V 1.70
VCC= 3.6V 1.25
THD+N Total harmonic
distortion plus noise
VCC= 5.0V, PO=1.0W, RL= 8Ω, f= 1kHz 0.28 %
VCC= 5.0V, PO=1.2W, RL= 4Ω, f= 1kHz 0.31
VNO Output voltage noise VCC= 3.6V~5V, f= 20Hz to 20kHz, inputs
ac-grounded with CIN= 1μF A-Weighting 68 μVrms
tWU Wake-up time from
shutdown VCC= 3.6V 36 ms
SNR Signal-to-noise ratio PO=1.0W, RL= 8Ω, VCC= 5.0V 92 dB
PSRR Power supply
rejection ratio VCC= 3.6V ~ 5.5V, f= 217kHz -65 dB
Note 1: All parts are production tested at TA= 25°C. Other temperature limits are guaranteed by design.
Note 2: Guaranteed by design.
IS31AP2005
Lumissil Microsystems – www.lumissil.com 7
Rev. D, 06/02/2017
TYPICAL PERFORMANCE CHARACT ERISTICS
THD+N(%)
Output Power(W)
20
0.1
0.2
0.5
1
2
5
10
10m 3
20m 50m 100m 200m 500m 12
R
L
= 8+33µH
f = 1kHz
V
CC
= 3.6V
V
CC
= 4.2V
V
CC
= 5.0V
Figure 3 THD+N vs. Output Power
0.01
0.02
0.05
0.1
0.2
1
2
10
THD+N(%)
20 20k50 100 200 500 1k 2k 5k 10k
Frequency(H z)
20
V
CC
= 3.6V
P
O
= 500mW
V
CC
= 5.0V
P
O
= 1W
R
L
= 8+33µH
Figure 5 THD+N vs. Frequency
Output Voltage(uV)
20 20k50 100 200 1k 2k 5k 10k
Frequency(H z)
10
200
20
30
50
70
100
VCC = 3.6V~5.0V
RL= 8+33µH
Figure 7 Noise
THD+N(%)
Output Power(W)
20
0.1
0.2
0.5
1
2
5
10
10m 3
20m 50m 100m 200m 500m 12
4
RL= 4+33µH
f = 1kHz
VCC = 3.6V
VCC = 4.2V
VCC = 5.0V
Figure 4 THD+N vs. Output Power
0.01
0.02
0.05
0.1
0.2
1
2
10
THD+N(%)
20 20k50 100 200 500 1k 2k 5k 10k
Frequency(H z)
20
R
L
= 4+33µH
V
CC
= 3.6V
P
O
= 650mW
V
CC
= 5.0V
P
O
= 1.2W
Figure 6 THD+N vs. Frequency
Frequency(H z)
PSRR(dB)
-100
0
-80
-60
-40
-20
20 20k50 100 200 500 1k 2k 5k
V
CC
= 3.6V~5.0V
R
L
= 8+33H
Input Grounded
Figure 8 PSRR vs. Frequency
IS31AP2005
Lumissil Microsystems – www.lumissil.com 8
Rev. D, 06/02/2017
Power Supply(V)
Output Power(W)
2.5 3 3.5 4 4.5 5
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
R
L
= 8+33H
f = 1kHz
THD+N = 1%
THD+N = 10%
Figure 9 Output Power vs. Supply Voltage
Output Power(W)
Efficiency(%)
100
80
60
40
20
0
0 0.4 0.8 1.2 1.6 2 2.4 2.8
R
L
=8R
L
=4
V
CC
= 5V
Gain=2V/V
Figure 11 Efficiency vs. Output Power
Power Supply(V)
Output Power(W)
2.5 3 3.5 4 4.5 5
0
0.5
1
1.5
2
2.5
3
3.5
RL = 4+33H
f = 1kHz
THD+N = 10%
THD+N = 1%
Figure 10 Output Power vs. Supply Voltage
IS31AP2005
Lumissil Microsystems – www.lumissil.com 9
Rev. D, 06/02/2017
FUNCTIONAL BLOCK DIAGRAM
IS31AP2005
Lumissil Microsystems – www.lumissil.com 10
Rev. D, 06/02/2017
APPLICATION INFORMATION
FULLY DIFF ERENTIAL AMPLIFIER
The IS31AP2005 is a fully differential amplifier with
differential inputs and outputs. The fully differential
amplifier consists of a differential amplifier and a
common-mode amplifier. The differential amplifier
ensures that the amplifier outputs a differential voltage
on the output that is equal to the differential input times
the gain. The common-mode feedback ensures that
the common-mode voltage at the output is biased
around VCC/2 regardless of the common-mode voltage
at the input. The fully differential IS31AP2005 can still
be used with a single-ended input; however, the
IS31AP2005 should be used with differential inputs
when in a noisy environment, like a wireless handset,
to ensure maximum noise rejection.
ADVANTAGES OF FULLY DIFFERENTIAL
AMPLIFIERS
The fully differential amplifier does not require a
bypass capacitor. This is because any shift in the
midsupply affects both positive and negative channels
equally and cancels at the differential output.
GSM handsets save power by turning on and shutting
off the RF transmitter at a rate of 217Hz. The
transmitted signal is picked-up on input and output
traces. The fully differential amplifier cancels the signal
much better than the typical audio amplifier.
COMPONENT SELECTION
Figure 12 shows the IS31AP2005 with differential
inputs and optional input capacitors. Input capacitors
are used when the common mode input voltage range
specs can not be guaranteed or high pass filter is
considered.
Figure 13 shows the IS31AP2005 with single-ended
inputs. The input capacitors have to be used in the
single ended case because it is much more
susceptible to noise in this case.
OUT+
GND
IS31AP2005
6
8
5
VCC
OUT-
CS
1 F
VBattery
4IN-
IN+
3
0.1 F
7
SDB
1
100k
CIN+
0.1 F
CIN-
0.1 F
RIN+
150k
RIN-
150k
Differential
Input
Shutdown
Control
Figure 12 Typical Application Circuit with Differential Input
OUT+
GND
IS31AP2005
VCC
OUT-
CS
1 F
VBattery
IN-
IN+
0.1 F
SDB
100k
CIN-
0.1 F
CIN+
0.1 F
RIN-
150k
RIN+
150k
Shutdown
Control
Single-ended
Input
6
8
5
4
3
7
1
Figure 13 Typical Application Circuit with Single-Ended Input
INPUT RESISTORS (RIN)
The input resistors (RIN) set the gain of the amplifier
according to Equation (1).
IN
R
ain
0k512
G
V
V (1)
Resistor matching is very important in fully differential
amplifiers. The balance of the output on the reference
voltage depends on matched ratios of the resistors.
CMRR, PSRR, and cancellation of the second
harmonic distortion diminish if resistor mismatch
occurs. Therefore, it is recommended to use 1%
accuracy resistors or better to keep the performance
optimized. Matching is more important than overall
accuracy.
Place the input resistors close to the IS31AP2005 to
reduce noise injection on the high-impedance nodes.
For optimal performance the gain should be set to
2V/V or lower. Lower gain allows the IS31AP2005 to
operate at its best, and keeps a high voltage at the
input making the inputs less susceptible to noise.
DECOUPLING CAPACITOR (CS)
The IS31AP2005 is a high-performance Class-D audio
amplifier that requires adequate power supply
decoupling to ensure high efficiency and low total
harmonic distortion (THD). For higher frequency
transients, spikes, or digital noises on the line, a good
low equivalent-series-resistance (ESR) ceramic
capacitor, typically 1μF, placed as close as possible to
the device VCC pin works best. Placing this decoupling
capacitor close to the IS31AP2005 is also important for
the efficiency of the Class-D amplifier, because any
resistance or inductance in the trace between the
device and the capacitor can cause a loss in efficiency.
For filtering lower-frequency noise signals, a 10μF or
greater capacitor placed near the audio power
amplifier would also be helpful, but it is not required in
most applications because of better PSRR of this
device.
IS31AP2005
Lumissil Microsystems – www.lumissil.com 11
Rev. D, 06/02/2017
INPUT CAPACITORS (CIN)
The input capacitors and input resistors form a
high-pass filter with the corner frequency, fC,
determined in Equation (2).
ININ CR
c
f
2
1
(2)
The value of the input capacitor is important to
consider as it directly affects the bass (low frequency)
performance of the circuit. Speakers in wireless
phones cannot usually respond well to low frequencies,
so the corner frequency can be set to block low
frequencies in this application.
Equation (3) is reconfigured to solve for the input
coupling capacitance.
CIN fR
IN
C
2
1
(3)
If the corner frequency is within the audio band, the
capacitors should have a tolerance of ±10% or better,
because any mismatch in capacitance causes an
impedance mismatch at the corner frequency and
below.
For a flat low-frequency response, use large input
coupling capacitors (1μF). However, in a GSM phone
the ground signal is fluctuating at 217Hz, but the signal
from the codec does not have the same 217Hz
fluctuation. The difference between the two signals is
amplified, sent to the speaker, and heard as a 217Hz
hum.
SUMMING INPUT SIGNALS
Most wireless phones or PDAs need to sum signals at
the audio power amplifier or just have two signal
sources that need separate gain. The IS31AP2005
makes it easy to sum signals or use separate signal
sources with different gains. Many phones now use the
same speaker for the earpiece and ringer, where the
wireless phone would require a much lower gain for
the phone earpiece than for the ringer. PDAs and
phones that have stereo headphones require summing
of the right and left channels to output the stereo signal
to the mono speaker.
SUMMING TWO DIFFERENTIAL INPUT SIGNALS
Two extra resistors are needed for summing
differential signals (Figure 14). The gain for each input
source can be set independently by Equations (4) and
(5).
1
1
1502
1
IN
IN
ORk
Gain V
V
V
V (4)
2
2
1502
2
IN
IN
ORk
Gain V
V
V
V (5)
Figure 14 Application Circuit with Summing Two Differential Inputs
If summing left and right inputs with a gain of 1V/V, use
RIN1= RIN2= 300kΩ.
If summing a ring tone and a phone signal, set the
ring-tone gain to Gain2= 2V/V, and the phone gain to
Gain1= 0.1V/V. The resistor values would be.
RIN1= 3MΩ, and RIN2= 150kΩ.
SUMMING A DIFFERENTIAL INPUT SIGNAL AND A
SINGLE-ENDED INPUT SIGNAL
Figure 15 shows how to sum a differential input signal
and a single-ended input signal. Ground noise may
couple in through IN- with this method. It is better to
use differential inputs. The corner frequency of the
single-ended input is set by CIN2, shown in Equation (6).
To assure that each input is balanced, the
single-ended input must be driven by a low-impedance
source even if the input is not in use. The gain for each
input source can be set independently by Equations (4)
and (5).
22
22
1
CIN
IN fR
C
(6)
If summing a ring tone and phone signals, the phone
signals should use the differential inputs while the ring
tone should use the single-ended input. The phone
gain is set at Gain1= 0.1V/V, and the ring-tone gain is
set to Gain2= 2V/V, the resistor values would be
RIN1= 3MΩ, and RIN2= 150kΩ.
The high pass corner frequency of the single-ended
input is set by CIN2. If the desired corner frequency is
less than 20Hz.
Hzk
IN
C201502
1
2
(7)
pFCIN 53
2 (8)
IS31AP2005
Lumissil Microsystems – www.lumissil.com 12
Rev. D, 06/02/2017
Figure 15 Application Circuit with Summing Differential Input and
Single-Ended Input Signals
SUMMING TWO SINGLE-ENDED INPUT SIGNALS
The corner frequencies (fC1 and fC2) for each input
source can be set independently by Equations (9) and
(10). Resistor, RP, and capacitor, CP, are needed on
the IN+ terminal to match the impedance on the IN-
terminal (Figure 16). The gain for each input source
can be set independently by Equations (4) and (5).
The single-ended inputs must be driven by low
impedance sources.
11
12
1
CIN
IN fR
C
(9)
22
22
1
CIN
IN fR
C
(10)
21 ININP CCC
(11)
21
21
ININ
ININ
R
R
RR
P
R
(12)
4IN-
IN+
3
CP
CIN1-
RP
RIN1-
CIN2- RIN2-
Single-ended
Input 1
Single-ended
Input 2
Figure 16 Application Circuit with Summing Two Single-Ended
Inputs
IS31AP2005
Lumissil Microsystems – www.lumissil.com 13
Rev. D, 06/02/2017
CLASSIFICATION REFLOW PROFILES
Profile Feature Pb-Free Assembly
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
150°C
200°C
60-120 seconds
Average ramp-up rate (Tsmax to Tp) 3°C/second max.
Liquidous temperature (TL)
Time at liquidous (tL)
217°C
60-150 seconds
Peak package body temperature (Tp)* Max 260°C
Time (tp)** within 5°C of the specified
classification temperature (Tc) Max 30 seconds
Average ramp-down rate (Tp to Tsmax) 6°C/second max.
Time 25°C to peak temperature 8 minutes max.
Figure 17 Classification Profile
IS31AP2005
Lumissil Microsystems – www.lumissil.com 14
Rev. D, 06/02/2017
PACKAGING INFORMATION
DFN-8
IS31AP2005
Lumissil Microsystems – www.lumissil.com 15
Rev. D, 06/02/2017
MSOP-8
IS31AP2005
Lumissil Microsystems – www.lumissil.com 16
Rev. D, 06/02/2017
RECOMMENDED LAND PATTERN
DFN-8
MSOP-8
Note:
1. Land pattern complies to IPC-7351.
2. All dimensions in MM.
3. This document (including dimensions, notes & specs) is a recommendation based on typical circuit board manufacturing parameters. Since
land pattern design depends on many factors unknown (eg. user’s board manufacturing specs), user must determine suitability for use.
IS31AP2005
Lumissil Microsystems – www.lumissil.com 17
Rev. D, 06/02/2017
REVISION HIST ORY
Revision Detail Information Date
A Initial release 2011.07.06
B
1. P.1 Add short-circuit and thermal protect
2. P.7-8 Update PSRR and efficiency figures
3. Add function block
4. POD should use GOODARK
2012.12.11
C
1. Add ESD(CDM)
2. Add SOP-8 package
2. Add land pattern
2015.08.31
D 1. Remove SOP-8 package information
2. Add θJA 2017.06.02
