74HC/HCT 4520 MSI DUAL 4-BIT SYNCHRONOUS BINARY COUNTER FEATURE AT! $ TYPICAL @ Output capability: standard SYMBOL PARAMETER CONDITIONS UNIT Icc category: MSI ' He | HCT tPHL/ propagation delay GENERAL DESCRIPTION TPLH nCPg, nCP1 to nQph 24 24 ns The 74HC/HCT4520 are high-speed : =1 Si-gate CMOS devices and are pin tPHL prep agation Gelay vie [Spr 13 13 ns compatible with the 4520 of the A 40008 series. They are specified in . 4 compliance with JEDEC standard no. 7A. fmax maximum clock frequency 68 8 MHz The 74HC/HCT4520 are dual 4-bit Cc; ; input capacitance 3.5 35 pF internally synchronous binary counters + with an active HIGH clock input (nCPq) power dissipation and an active LOW clock input (nCP}), fPp ; Capacitance per counter notes 1 and 2 29 24 pF buffered outputs from all four bit positions (nQg to nQ3) and an active GND = 0 V; Tamb = 25 C; ty = te = 6 ns HIGH overriding asynchronous master reset input (nMR). Notes . toes The counter advances an either the LOW- 1. Cpo is used to determine the dynamic power dissipation (Pp in uW): to-HIGH transition of nCPg if nCP} is Pp =Cppx Vcc x fi+ 2 (CL x Voc? x fo) where: HIGH or the HiGH-to-LOW transition of fj = input frequency in MHz CL == output load capacitance in pF nCP 1 if nCPg is LOW. Either nCPg or fo = output frequency in MHz VCC = supply voltage in V nCP 1 may be used as the clock input to ZC x Voc? x fo) = sum of outputs the counter and the other clock input may be used as a clock enable input. A HIGH on nMR resets the counter (nQg to nQ3 = LOW) independent of nCPQ and nCPq. PACKAGE OUTLINES SEE PACKAGE INFORMATION SECTION PIN DESCRIPTION 2. For HC the condition is Vj = GND to Vcc For HCT the condition is Vj) = GND to Vcc 1.5 V APPLICATIONS @ Multistage synchronous counting @ Multistage asynchronous counting PIN NO. SYMBOL NAME AND FUNCTION @ Frequency dividers 5 1,9 1CPg, 2CPg clock inputs {LOW-to-HIGH, edge-triggered) 2, 10 1CP,, 2CPy clock inputs (HIGH-to-LOW, edge- triggered) 3,4,5,6 10g to 103 data outputs 7,15 IMR, 2MR asynchronous master reset inputs (active HIGH) 8 GND ground (0 V) 11,12, 13,14 | 209 to 203 data outputs i 16 Vcc positive supply voltage | CTA4 tcPo (1 | U 16] Yoo ah fol 1%, (2] BED 25 * ol Ls 7 5 109 GB] fia] 203 1.9 1tP5 Fo 3 {er-0 Te tay fe] [13] 202 2.10 ~ofcry Oy 432 t 4 102] 520 [12] 20, O72 5.13 sa | a3L- , 3Ss1 aa 193 [6 | [17] 205 7.48 mr 93 6.14 a . cs ep 293790 ime (7 | fio] 2, we tet oy as ano [8 | a] 26Po we 7293798 7203799 Fig. 1 Pin configuration. Fig 2 Logic symbol. Fig. 3 1EC logic symbol. December 1990 107574HC/HCT4520 MSI FUNCTION TABLE nCPg | ncP, | MR| MODE t H L counter advances L 4 L counter advances 4 x L no change x t L no change t L L no change H J L no change x x H Qg to Q3 = LOW H = HIGH voltage level L = LOW voltage level X = dont care ft = LOW-to-HIGH clock transition 4 = HIGH-to-LOW clock transition 7291792 Fig. 4 Functional diagram. Q2 a3 CP, a a FRY FR FRa cP ce cP CP9 Ap a ap Ro 7293600 Fig. 5 Logic diagram (one counter). 7Z93801 Fig. 6 Timing diagram. 1076 January 1986Dual 4-bit synchronous binary counter 74HC/HCT4520 MSI DC CHARACTERISTICS FOR 74HC For the DC characteristics see chapter "HCMOS family characteristics, section Family specifications. Output capability: standard 1Cc category: MSI AC CHARACTERISTICS FOR 74HC GND =O V; ty = tf = 6 ns: CL = 50 pF Tamb (C) TEST CONDITIONS : 74HC SYMBOL | PARAMETER : UNIT | Vcc | WAVEFORMS : +25 | 40 to +85 | -40 to +125 v y | min. | typ. | max. | min. | max. | min. max. f | 77 | 240 300 | 360 2.0 tPHL/ , Propagation delay 23 | 48 60 | 72 ns 45 Fig. 8 PLH = j_-NCPQ to nQn 22 | 41 51 61 6.0 I i . 77 | 240 300 360 2.0 tPHL/ Propagation delay 28 | 48 60 72 ns | 45 | Fig.8 tPLH NCP} tonQn 122 ' 41 51 61 6.0 ; . 4 1 0 tpHL |. Propagation delay 8 30. 38 a ns 45 Fig. 9 | AMR tonQn 12/26 , | 33 38 6.0 erat / | 19| 75 | 95 110 2.0 it Output transition time i 7 15 19 22 ns 4.5 Fig. 8 TLH + 76 413 16 19 6.0 80 | 22 100 120 2.0 tw clock puise width 16 18 20 | 24 | ns | 45 | Fig.7 | HIGH or Low 14/6 a7 | 20 6.0 | i t | tw master reset pulse width 3 8 xe. 3 ns 28 Fig. 7 ' HIGH 20 | 11 26 31 6.0 . 0 |-28 0 0 2.0 removal time _ : . trem NMR to nCPq:; nCPy 5 Tg 3 ! ns eo Fig. 7 I i t : set-up time go | 14 I 100 120 , | 20 | teu nCP1 to nCPo; 16/5 20 24 ns 4.5 Fig. 8 nCPp ta nCPy 1414 17 20 6.0 . 6.0 | 19 . 4. 0 f maximum clock pulse 30 |58 oe 20 MHz a8 Fig. 7 mex frequency 36 |69 28 24 6.0 March 1988 107774HC/HCT4520 MSI DC CHARACTERISTICS FOR 74HCT For the DC characteristics see chapter HCMOS family characteristics, section Family specifications. Output capability: standard cc category: MSI Note to HCT types The value of additional quiescent supply current (Alc) for a unit load of 1 is given in the family specifications. To determine Alcg per input, multiply this value by the unit load coefficient shown in the table belaw. UNIT LOAD INPUT COEFFICIENT RCP, nCPy 0.80 nMR 1.50 AC CHARACTERISTICS FOR 74HCT GND = 0 V; ty = t = 6 ns; Cy = 50 pF Tamb (C) TEST CONDITIONS 74HCT SYMBOL PARAMETER UNIT; Vec | WAVEFORMS ! +25 40 to +85 | 40 to +125 Vv T min.| typ. ; max. ; min. | max. | min. | max. tpHL/ propagation delay 28 | 53 66 i so | ns 45 | Fig 8 tPLH nCPg to nQnq | T 'PHL/ propagation delay 25 | 53 86 go | os | 48 | Fig.8 TPLH | nCPy to nQy : propagation delay . tPHL MR to nQn 16 | 36 44 53 ns 45 Fig. 9 THU output transition time 7 16 19 22 ns 45 | Fig. 8 tTLH clock pulse width . w HIGH or LOW 20 | 10 26 30 ns | 45 | Fig. 7 master reset puise width : tw i HIGH 20 | 12 25 30 ns 45 Fig. 7 removal time _ o Fig. 7 trem nMR to nCPq: nCPy 9 8 9 9 ns 45 9. ep time : tsu nCP 1 to nga Os 16 | 6 20 24 ns 45 Fig. 8 nCPQg to nCP 7 maximum clock pulse . fmax frequency 30 | 58 24 20 MHz| 4.5 Fig. 7 1078 March 1988Dual 4-bit synchronous binary counter 74HC/HCT4520 MS! AC WAVEFORMS gx: + ah, INPUT (nCPg = LOW! acPg INPUT Fig. 7 Waveforms showing removal time for nMR; {aCPy * HIGH} minimum nCPg, nCP1, nMR pulse widths and maximum clock pulse frequency. Conditions: nCPy = HIGH while nCPQ is triggered on a OMA INPUT LOW-to-HIGH transition; tw and trep, also apply when nCPo = LOW and nCPy is a Wel bem 7293708 triggered on a HIGH-to-LOW transition. nCPg INPUT Vial GP INPUT nd, OUTPUT Fig. 8 Waveforms showing set-up times for nCP9 to nCPy and nCP, to nCPo, propagation delays 7293796 and output transition times. aR INPUT nQ, OUTPUT Fig. 9 Waveforms showing propagation delay 7293797 from nMR to nQy output. Note to AC waveforms (1) HC : Vy = 50%; V) = GND to Voc. HCT: Vy = 1.3; V} = GND to 3V. January 1986 1079