Vishay Siliconix
Si9243A
Document Number: 70788
S11-0975-Rev. F, 16-May-11
www.vishay.com
1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Single-Ended Bus Transceiver
FEATURES
Operating Power Supply Range
6 V VBAT 36 V
Reverse Battery Protection Down to VBAT - 24 V
Standby Mode With Very Low Current Consumption
IBAT(SB) = 1 µA at VDD = 0.5 V
Low Quiescent Current in OFF Condition
IBAT = 120 µA and IDD 10 A
ISO 9141 Compatible
Overtemperature Shutdown Function For K Output
Defined K Output OFF for Open GND
Defined Receive Output Status for Open K Input
Defined K Output OFF for TX Input Open
Open Drain Fault Output
2 kV ESD
Typical Transmit Speeds of 200 kBaud
DESCRIPTION
The Si9243AEY is a monolithic bus transceiver designed to
provide bidirectional serial communication in automotive
diagnostic applications.
The device incorporates protection against overvoltages and
short circuits to VBAT. The transceiver pin is protected and
can be driven beyond the VBAT voltage.
The RX output is capable of driving CMOS or 1 x LSTTL
load.
The Si9243AEY is built on the Vishay Siliconix BiC/DMOS
process. This process supports bipolar transistors, CMOS,
and DMOS. An epitaxial layer prevents latchup.
The Si9243AEY is available in a 8-pin SO package and
operates over the automotive temperature range (- 40 °C to
125 °C). The Si9243AEY is available in both standard and
lead (Pb)-free packages.
PIN CONFIGURATION AND FUNCTIONAL BLOCK DIAGRAM
TX
RXL
K
L
+
-
L
+
-
K
+
-
VBAT/2
K
Logic and Fault Detect Circuitry
(See State Diagram and Truth Table)
VBAT
VDD
GND
RXK
VDD
VDD
VDD
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Document Number: 70788
S11-0975-Rev. F, 16-May-11
Vishay Siliconix
Si9243A
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
OUTPUT TABLE AND STATE DIAGRAMS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
A = 1 A = 0
Over Temp
Over Temp . TX
B = 1 B = 0
Short Circuit
TX
Power On
Power On
Note: Over Temp is an internal condition, not meant
to be a logic signal.
INPUTS STATE
VARIABLE
OUTPUT
TABLE
TX L A B K RXKRXLComments
0011000
1111111
0111001
1011110
XL01HiZKLOver Temp
0 L 1 0 HiZ K L Short Circuit
1 1 1 1 1 1 1 Receive Mode
1011000
X = "1" or "0"
HiZ = High Impedance State
ABSOLUTE MAXIMUM RATINGS
Parameter Limit Unit
Voltages Referenced to Ground
Voltage On VBAT - 24 to 45
VVoltage K, L - 16 to (VBAT + 1)
Voltage Difference V(VBAT, K, L) 55
Voltage On Any Pin (Except VBAT , K, L) or Max. Current - 0.3 V to (VDD + 0.3 V) or 10 mA
Voltage on VDD 7V
K Pin Only, Short Circuit Duration (to VBAT or GND) Continuous
Operating Temperature (TA)- 40 to 125 °C
Junction and Storage Temperature - 55 to 150
Thermal Impedance (JA)125 °C/W
RECOMMENDED OPERATING RANGE
Parameter Limit Unit
Voltages Referenced to Ground
VDD 4.5 to 5.5
VVBAT 6 to 36
K, L 6 to 36
Digital Inputs 0 to VDD
Document Number: 70788
S11-0975-Rev. F, 16-May-11
www.vishay.com
3
Vishay Siliconix
Si9243A
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Notes:
a. Room = 25 °C, Cold and Hot = as determined by the operating temperature suffix.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. Guaranteed by design, not subject to production test.
e. Minimum pulse width to reset a fault condition.
SPECIFICATIONS
Parameter Symbol
Test Conditions Unless Specified
VDD = 4.5 V to 5.5 V
VBAT = 6 V to 36 V
Limits
- 40 to 125 °C Unit
Temp.a Min.bTyp.cMax.b
Transmitter and Logic Levels
TX Input Low Voltage VILT Full 1.5 V
TX Input High Voltage VIHT Full 3.5
TX Input CapacitancedCINT Full 10 pF
TX Input Pull-up Resistance RTX VDD = 5.5 V, TX = 1.5 V, 3.5 V Full 10 20 40 k
K Transmit
K Output Low Voltage VOLK
RL = 510 ± 5 %, VBAT = 6 to 18 Full 0.2 VBAT
V
RL = 1 k ± 5 %, VBAT = 16 to 36 Full 0.2 VBAT
RL = 510 ± 5 %, VBAT = 4.5 Full 1.2
K Output High Voltage VOHK
RL = 510 ± 5 %, VBAT = 4.5 to 18 Full 0.95 VBAT
RL = 1 k ± 5 %, VBAT = 16 to 36 Full 0.95 VBAT
K Rise, Fall Times tr, tf See Test Circuit Full 9.6 µs
K Output Sink Resistance Rsi TX = 0 V Full 110
K Output CapacitancedCOFull 20 pF
Receiver
L and K Input High Voltage VIH Full 0.65 VBAT V
L and K Input Hysteresisc, d VHYS Full 0.05 VBAT
L and K Input Currents IIH
TX = 4
VIH= VBAT Full 20 µA
RXL and RXK Output Low Voltage VOLR
VILK, VILL = 0.35 VBAT
IOLR = 1 mA Full 0.4 V
RXL and RXK Pull-up Resistance RRX Full 5 20 k
RXK Turn On Delay td(on)
RL = 510 ± 5 %, VBAT = 6 V to 18 V
CL = 10 nF, See Test Circuit Full 3 10
µs
RL = 1 k ± 5 %, VBAT = 16 V to 36 V
CL = 4.7 nF, See Test Circuit Full 3 10
RXK Turn Off Delay td(off)
RL = 510 ± 5 %, VBAT = 6 V to 18 V
CL = 10 nF, See Test Circuit Full 3 10
RL = 1 k ± 5 %, VBAT = 16 V to 36 V
CL = 4.7 nF, See Test Circuit Full 3 10
Supplies
Bat Supply Current On IBAT(on) TX = 0 V, VBAT 16 V Full 1.2 3 mA
Bat Supply Current Off IBAT(off)
VIHT VTX, VIHK VK, VIHL VL
VBAT 12 V Full 120 220 µA
Bat Supply Current Standby IBAT(SB) VDD 0.5 V, VBAT 12 V Full < 1 10
Logic Supply Current On IDD(on) VDD 5.5 V, TX = 0 V Full 1.4 2.3 mA
Logic Supply Current Off IDD(off)
VIHT VTX, VIHK VK, VIHL VL
VBAT 12 V Full 10 µA
Miscellaneous
TX Transmit Baud Rate BRTRL = 510 , CL = 10 nF Full 10.4 kBaud
RXL and RXK Receive Baud RatecBRR6 V < VBAT < 16 V, CRX = 20 pF Full 200
Transmission Frequency fK-RXK 6 V < VBAT < 16 V, RK = 510 , CK 1.3 nF Full 50 200 kHz
TX Minimum Pulse Widthd, e tTX Full 1 µs
Over Temperature ShutdowndTSHUT Temperature Rising 160 180 °C
Temperature Shutdown HysteresiscTHYST 30
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Document Number: 70788
S11-0975-Rev. F, 16-May-11
Vishay Siliconix
Si9243A
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
PIN CONFIGURATION
FUNCTIONAL DESCRIPTION
The Si9243AEY can be either in transmit or receive mode
and it contains over temperature, and short circuit VBAT fault
detection circuits.
The voltage on the K and L pins are internally compared to
VBAT/2. If the voltage on the K or L pin is less than VBAT/2 then
RXK or RXL output will be "low". If the voltage on the K or L
pin is greater than VBAT/2 then RXK or RXL output will be
"high".
In order to be in transmit mode, TX must be set "low". The TX
signal is then internally inverted and turns the MOSFET on,
causing the K pin to be "low". In transmit mode, the
processor monitors the RXK and TX. When the two mirror
each other there is no fault. In the event of over temperature,
or short circuit to VBAT, the Si9243AEY will turn off the K
output to protect the IC. The K pin will stay in high impedance
and RXK will follow the K pin. The fault will be reset when TX
is toggled high. RXK, RXL and TX pins have internal pull up
resistor to VDD while K and L pins have internal pull down
resistors. When any one of the TX, VBAT or GND pins is open
the K output is off.
When the TX pin is set "high" the Si9243AEY is in receive
mode and the internal MOSFET is turned off. RXL and RXK
outputs will follow L and K inputs respectively.
1
2
3
45
6
7
8
Top View
Narrow Body
RXL
RXK
TX
VBAT
K
GND
SO Package
VDD
L
ORDERING INFORMATION
Part Number Temperature Range
Si9243AEY-T1 - 40 to 125 °C
Si9243AEY-T1-E3 (Lead (Pb)-free)
PIN DESCRIPTION
Pin Number Symbol Description
1RXKK Receiver, Output
2RXLL Receiver, Output
3VDD Positive Power Supply
4 TX Transmit, Input
5 GND Ground Connection
6 K K Transmit/Receive, Bidirectional
7VBAT Battery Power Supply
8 L L Transmit, Input
Document Number: 70788
S11-0975-Rev. F, 16-May-11
www.vishay.com
5
Vishay Siliconix
Si9243A
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TEST CIRCUIT AND TIMING DIAGRAMS (TRANSMIT ONLY)
APPLICATIONS CIRCUIT
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?70788.
td(off)
VK, VL
VBAT
VDD
GND
K
TX
Si9243AEY
VBAT
RL
CL
80 % 80 %
20 %20 %
trtf
-
+
V-
+
RXK
TXmin
td(on)
VBAT
RL = 510 Ω , CL = 10 nF, VBAT = 6 V to 18 V
RL = 1 kΩ, CL = 4.7 nF, VBAT = 16 V to 36 V
-
+
RXL
RXK
L
TX
VDD
VDD
VDD
VB
Microcontroller
ECU
I/Os
ECU = Electronic Control Unit
L-Line
Diagnostic Tester
510 Ω
0.4 Ω
K-Line
Bus
VDD
VBAT
C1
0.1 µF
C1
0.1 µF
50 V
Si9243AEY
-
+
V-
+
-
+
VDD
VDD
VDD
Vishay Siliconix
Package Information
Document Number: 71192
11-Sep-06
www.vishay.com
1
DIM
MILLIMETERS INCHES
Min Max Min Max
A 1.35 1.75 0.053 0.069
A10.10 0.20 0.004 0.008
B 0.35 0.51 0.014 0.020
C 0.19 0.25 0.0075 0.010
D 4.80 5.00 0.189 0.196
E 3.80 4.00 0.150 0.157
e 1.27 BSC 0.050 BSC
H 5.80 6.20 0.228 0.244
h 0.25 0.50 0.010 0.020
L 0.50 0.93 0.020 0.037
q0°8°0°8°
S 0.44 0.64 0.018 0.026
ECN: C-06527-Rev. I, 11-Sep-06
DWG: 5498
4
3
12
5
6
87
HE
h x 45
C
All Leads
q0.101 mm
0.004"
L
BA
1
A
e
D
0.25 mm (Gage Plane)
SOIC (NARROW): 8-LEAD
JEDEC Part Number: MS-012
S
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Revision: 12-Mar-12 1Document Number: 91000
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