Order this document as AN429/D MOTOROLA -- SEMICONDUCTOR APPLICATION NOTE AN429 MC68332 QSPI interface for the MCM2814 EEPROM By Mark Malolani Motorola Semiconductors Ltd East Kilbride Glasgow INTRODUCTION HARDWARE CONFIGURATION This application note describes the software and hardware necessary to use the MCM2814 serial EEPROM with the MC68332 Queued Serial Peripheral Interface, or OSPI. As wellas giving specific details on accessing the MCM281 4 EEPROM with the OSPI. this application note can also be used to provide general information on configuring and using the OSPI with SPI compatible devices. Figure 1 shows a simple system with four MCM2814 EEPROMs connected directly to the MG68332 OSPI. The MCM2814 is a serially accessed 256 byte FEPROM, which can be used in either IC or SPI protocol systems. In this application SPI mode is selected by pulling the MCM281 4 MODE pin to the ..-5V supply level, Vdd. As the MCM2814 generates its programming voltage (Vpp) internally, only a single 5V supply is necessary. The main areas covered are hardware configuration, the general operation of the OSPI and a description of software which allows programming and reading data from the MGM2814. Information on interfacing the software with high level `C' language programs is also covered, with a short demonstration program included. In the simplest configuration, selection of the individual EEPROMs is accomplished by connecting the OSPI slave select lines, PCSO-3, directly to the MCM2814 SPI slave select lines, SPISS. With this configuration a maximum of four EEPROMs or other SPI devices can be individually selected. If more than four devices are to be connected to the SPI bus, a decoder can be added to select a maximum of 15 devices. P053 P052 PcS1 PcSo -- 1 MC68332 OSPI Vdd MISO MOSI 50K 1 SPISS MODE 2 SPISO 5 SPISI 7 SPICK SPISS Vdd MODE 1 Vdd MODE 2 SPISO 5 SPISI 7 SPICK MCM281 4 #0 SPISS 2 SPISO 5 7 SPISI SPICK MCM281 4 #1 MCM281 4 #2 1 Vdd SPISS MODE 2 SPISO 5 SPISI 7 S PIGK MCM281 4 #3 --m Figure 1 -- Basic Hardware MOTOROLA CMOTOROLA LTD. 1990 AN429/D U SPI AND OSPI OVERVIEW The SPI bus consists of two serial data lines, a clock line and one or more slave select lines. The two data lines, MOSI and MISO, are used by the master device on the bus to transmit and receive data respectively. The clock and slave select lines, designated SCK and P050-3 on the OSPI. are generated by the master, which in this case is the OSPI. When the SPI master accesses a particular SPI device, the slave select linefor thatparticular device is driven low before the required number of bits are transferred during SCK transitions. The SPI protocol defines that data transmission and recep;,on always occur simultaneously, as while data is transmited from the master on the MOSI line, data is being received ~iongthe MISO line. If the master only has to read data from levice, it may transmit uninitialised or `don't care' values :i'ng MOSI, and conversely if the master only has to write ~ta to a device it may ignore the data received along MISO. enhancements of the OSPI over the SPI consist mainly the queued architecture of the OSPI. Rather than having program each individual transfer before it is transmitted, as on the SPI, the OSPI can be configured to automatically carry out a number of transfers without intervention from the processor. Each transfer can be individually configured to access a specific device by using the PCSO-3 lines. Individual control of the number of bits per transfer, bus timing delays and the state of the PCS lines between transfers is also possible. The transfer data and control information is contained in three queues:- the receive data queue RECRAM, the transmit data queue TRANRAM and the command data queue COMD.RAM. The transmit and receive queues are 16 bits wide, although each SPI transfer can be from 8 to 16 bits long, defined by BITS of register SPCRO and BITSE of the command entries. The command data queue is byte wide, with each byte configuring various aspects of one transfer, such as the number of bits in the transfer, bus delays and device selection. Figure 2 shows the bit usage of the command bytes. All three queues are 16 entries deep, resulting in 32 bytes each for the transmit and receive data queues and 16 bytes for the command queue bits. 3 Command Queue Entry 7 6 ICONTIBtTSE BIT CONT BITSE DT STATE 3 2 OSOKI P0531 P052 1 ACTION 0 1 Transfer length defaults to 8 bits Bits field of SPORO defines transfer length (8 16 bits) o Default delay of 17 clocks after each transter Delay specified by DTL field of SPORi 0 0 P0511 P050 1 1 P053-0 DT 4 Slave Select Lines POS 3-0 return to default states, as defined in QPDR, between transfers POS 3-0 do not change between transfers o 1 OSCK 5 - Default delay of 1/2 clock between device selection and transfer Delay specified by DSCKL field of SPORi Defines the state of the slave select lines PCS3-0 during transfer FIgure 2-- Command entry format MOTOROLA AN429/D ) NVMRWC SOFTWARE OVERVIEW - The MC68332 assembly language software, NVMRWC, contains routines to both read and write EEPROM data via the OSPI, and is configured to be called as a function from a C language program. The read routine is entered at <ee_read>, and is used to read up to 29 bytes of data starting from any MCM281 4 location. Figures 3 and 4 show the main program flow for the read action, and an example read operation. The write routine starts at <ee_write>, and is able to write up to 4 bytes of data starting at any location, as long as all of the bytes are within a 4 byte boundary. This limitation is due to the operation of the MCM2814, which is detailed in the data sheet for the device. Program flow for the write action and an example transfer are shown in figures 5 and 6. Transmit Data Queue TRAN.RAM QSTART~ee read> Store registers on local stack area 15 READ 87 ($A7) 0 Address xx xx xx Wait until QSPI has finished any pending transfers before initializing <OSPINIT> Entry 1 Entry 2 Entry 3 xx xx xx -L [ Entry 0 ($20) .1 Get passed parameters from `C' call I---- Receive Data Queue REC.RAM 87 0 2~X XX 15 Entry 0 Initialize transmit data queue, command ~I~QA~1a queue and main QSPI control registers using parameters from C' call Start transfers by enabling OSPI ~xI~$2~dat~ L ~a~1a Entry 1 Entry 2 Entry 3 ,j- K U--" Command Queue CMD.RAM CONT/BITSE/DT/DSCK PCS3-0 Has OSPI finished transfers? Copy data from receive queue into `C' parameter area using MC68332 loop mode ~PASSL00Th FIgure 3 AN429/D -- EEPROM read flowchart 7 1 1 6 1 1 5 1 1 4 0 0 3210 0010 0010 1 0 1 1 1 1 0 0 0010 0010 Entry 0 Entry 1 Entry 2 Entry 3 I.- Example queue set-up for a read of 5 bytes of data starting from MCM2814 address $20. with the device select code, (PCS3-O), set to 0010. Note the use of 16 bit transfers for each two bytes of data. XX is un-initialised or unused data, underlined data is received from MCM2814. FIgure 4 -- EEPROM read example MOTOROLA 3 ) Transmit Data Queue TXD.RAM 15 87 START .~ee write> Store registers on local stack area ~1 Wait until OSPI has finished any pending transfers before initializing <OSPINIT> 0 ($A6) Entry 0 XX Vpp ON XX WRITE ($A2) Entry 1 XX Address ($10) Entry 2 XX Data XX Data XX Vpp OFF ($AA) Entry 3 ($55) Entry 4 ($A4) Entry 5 -------I F Get passed parameters from `0' call Receive Data Queue REC.RAM 87 15 :uitialize transmit data queue, command queue and main OSPI control registers using parameters from `C' call 0 XX XX XX XX XX XX Xx XX XX XX XX XX Entry 0 Entry 1 Entry 2 Entry 3 Entry 4 Entry 5 Start transfers by enabling OSPI Command Queue CMD.RAM CONT/BITSE/DT/DSCK 7 65 4 Has programming delay elapsed? 0 1 1 1 0 0 NO YES Initialise SPCR2 to send Vpp OFF command 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0 L PCS3-0 3210 0001 0001 0001 0001 0001 0001 Entry Entry Entry Entry Entry Entry 0 1 2 3 4 5 4 Example queue set-up for a write of 3 bytes of data starting from MCM2814 address $10, with the device select code, (PCS3-0), set to 0010. XX is un-initialised or unused data, underlined data is received from McM2814. Figure 5-- EEPROM wrIte flowchart Figure 6 -- EEPROM wrIte example AN429/D ' WORKSPACE ALLOCATION - LINK. UNLK AND MOVEM The routines <ee_read> and <ee_write> return with all processor registers restored to their origimal state. To accomplish this, the registers are written to the stack on entry, and recovered before returning. The instruction, LINK A6,#&-28, creates a 28 byte stack frame for this purpose by moving the stack pointer. A7, past the reserved area, and loading A6 to act as the frame pointer. Storing the processor registers is accomplished in a single instruction by the MOVEM (move multiple) command. MOVEM.L DO/D1/D2/D3/AO/A1/A2,(A71 stores all of the listed registers as long words starting at the address pointed to by the stack pointer A7. As the LINK instruction sets A7 to point to the lowest address of the reserved 28 bytes, all of the registers are stored in this area. Figure 7 shows the stack organisation in detail. The MOVEM instruction is used again at the end of the program, with the order of the operands reversed, to recover the register values, and the reserved stack area is deallocated by the UNLK (unlink) instruction. This recovers the original value of the specified local stack pointer, A6, and resets the main stack pointer, A7, to its previous value. Un-used stack (Stack pointer A7 --bafter LINK) DO Dl D2 D3 AO Al 28 bytes reserved by LINK (contents after MOVEM) A2 (AG after LINK) (Stack pointer A7 before LINK) Decreasing address Temporary store of AG `C' return address Parameter `DEV' Parameter `ADDR' Parameter `BYTE COUNT' Address of array `BYTE BUFFER I Stack condition on entry br Long word (4 byte) width FIgure 7 Stack allocatIon -- AN429/D MOTOROLA 5 INITIALISING THE OSPI Before the OSPI is used for an EEPROM read or write, it is initialised to the desired startup state. The subroutine <OSPIN IT> allows the OSPI to complete any pending transfers before it is stopped and initialised. At this stage initialisation consists mainly of configuring the OSPI hardware by assigning the lines MISO,MOSI,SCK and PCSO-3 to the OSPI. with MOSI and PCSO-3 set as outputs which default high. The OSPI is also set to non wired-or outputs and SPI master with a clock rate of 100KHz at this point. Note that if it is known the OSPI will be idle and in a suitable state when an EEPROM read or write is requested, or if it is acceptable to halt the OSPI with transfers pending, the initialisation subroutine could be simplified, FUNCTION PARAMETER PASSING MC68332 LOOP MODE - .A.'hen either reading or writing EEPROM data, the software ~sto retrieve the parameters that the C program has placed the stack. NVMRWC is configured to work with a C 2ompiler that passes the variables in the stack locations `wn in figure 7. If the C compiler passes the variables in fferent manner, the program must be altered accordv. The parameters are initially stored in the MC68332 mal registers as follows:.~ Address in MC68332 memory of the C data array, <BYTE_BUFFER> I -- 0 -- Number of bytes to transfer, <BYTE_COUNT> -- MCM2814 starting byte address, <ADDR> -- Device selection code for PCSO-3 pins, <DEV> Note that Al is the memory address of the main C array, rather than the actual data. This allows NVMRWC to read or modify the data in the array when necessary by using Al as a pointer. An example of this is when the EEPROM data is passed back to the array after a read in the routine <PASSLOOP>. This program section uses a MOVE instruction to copy a byte of data from the OSPI receive data queue to the array, and a decrement if false, or DBF instruction to cause the program to loop around until a count register reaches 0. As the MOVE instruction occupies one word, the MC68332 automatically enters `Loop Mode' when this program section is encountered. When in this mode, no instruction fetches are made to memory, thus greatly speeding execution. TRANSMIT DATA QUEUE INITIALISATION The transmit dataqueue has to be initialised with the correct sequence of MCM2814 commands and data before an EE PROM read or writecan be carried out. Reading data from the E EPROM uses the simplest sequence, consisting of the following> with the receive queue holding up to 29 bytes of received EEPROM data. When writing data to the EEPROM, the following sequence is transmitted:- MCM2814 READ command 1SA7) Vpp ON command ($A6) Starting byte address to be read WRITE DATA command (SA2) The remainder of the transmit queue does not need to be initialised, as after this sequence has been sent the MCM28l 4 transmits data, and no longer monitors incoming data. Because the MCM281 4 remains selected between all of the individual byte transfers, the full 16 bit width of the data queues can be used to increase the maximum possible transfer size. The example in figure 4 shows that the read code and the byte address are sent as one 16 bit transfer, <"OROLA Starting byte address to be programmed up to 4 bytes of data Vpp OFF command CSA4) Because the EEPROM has to be deselected at various points during the sequence, all transfers are 8 bit only. An example transfer is shown in figure 6. AN429/D COMMAND QUEUE INITIALISATION The command queue is configured with the device selection state during and between transfers, timing information and bit size information. For an EEPROM read or write sequence the device select code remains constant throughout, as all of the transfers are intended for a single device. This device select code, which is determined from the parameter <DEV>, is written into the PCSO-3 field of all of the COMD entries used. An MCM2814 read sequence is treated as one command, and the device must remain selected for its full duration, even between the individual transfers. To accomplish this the CONT bits are set for all of the COMD entries except the one which controls the last transfer. Because a MCM2814 write sequence consists of three command blocks lVpp ON, WRITE and Vpp OFF) and the device has to be deselected between the blocks, the CONT bits have to be cleared for the lasttransfer of each block. This can be seen in the example, figure 6, where the CONT bits are clear in the COMD entries corresponding to the Vpp ON command, the last data byte and the Vpp OFF command. As all EEPROM writes are byte size, BITSE is clear for all of the command queue entries. This forces the OSPI to use the default transfer size, which is 8 bits. For the EEPROM read operation all transfers are 16 bit, so BITSE is set for all of the COMD entries. This causes the OSPI to use the transfer size programmed into the BITS field of register SPCRO, which has previously been set to 16. If necessary, the BITS field can be used to selectalternative transfer sizes from 8 to 16 bits. To conform with the MCM2814 timing spec. a delay is generated after each transfer by setting bit DT in the command queue entries, causing the OSPI to use the 5p~S delay specified in control register SPCR1. No extra delay is needed between selection of the MCM2814 and data transfer, so the DSCK bits, which control this delay, are cleared in the command queue entries. MAIN QSPI CONTROL REGISTERS Before the OSPI transfers can be started, the main configuration register SPCR2 is configured. This register holds the first and last OSPI entry numbers that are to be sent which are dependent on the type of transfer and parameters, eg. the number of bytes to read/write. The WRAP control bits, which control the OSPI wrapping operation in which the OSPI constantly loops around a group of queue entries, are set to disable this function. OSPI transfers are started by setting the OSPI enable bit, SPE, of SPCR1. The program then loops, testing for completion of transfers by polling the SPI finished flag, SPIF. of the status register SPSR. DEMONSTRATION C PROGRAM - EECALL A small demonstration C program, EECALL, shows the way that a C program can utilise the assembly language program NVMRWC as well as demonstrating its functions. Several functions can be invoked by a single keypress. These functions are:- R (Read Data) One call is made to the assembly language routine <EE_READ> using the previously set parameters. The returned data is printed in ASCII format, with each byte separated by a slash (.1) character. P (Set Parameters) This option allows the user to define the parameters Start Address, No. of Bytes and Device Code. D (EE PROM Dump) The entire contents ofone EE PROM (as selected by the previously setdevice code) are printed on screen in an ASCII table format. This option calls <EE_READ> 16 times, with each call reading 16 bytes of EEPROM. -- -- W (Write Data) This option makes one call to the assembly language routine <EE_WRITE> using the parameters which have been set previously. The user is prompted to enter the data to be programmed, byte by byte. This data is entered as single ASCII characters, with no carriage return necessary. -- -- -- -- -- T (Text Entry) --When this option is selected, the user can enter a text message of undefined length to be programmed into EEPROM. To terminate the message a hash l#) must be entered. Programming is carried out character by character, by using a call to <EE_WRITE> to program each byte -- X AN429~O -- -- (Exit) -- Exits the program EECALL by executing an RTS. MOTOROLA .7 1* EECALL.C Basic front--end program to test and show use of assember calls EE_READ and EE_WRITE to read and write data on MQ42814 LEPROM connected to OSPI. * * * *1 *include <terminal. h> typedef unsigned char byte; byte i,tbc,dev,addr,tadd,byte mt iovar; count,byte_buffer(29]; char c; extern byte ee_write (byte d,byte a,byte bcount,byte *b_buffer); extern byte ee_read (byte d,byte a,byte b_count,byte *b buffer); void pstring (s) char *5; while (*s) putchar(*s++); main() byte error; dev--14; /* Initialise pass parameters */ addrOxl 0; byte_count'-4; for (i--0;i<4;i++) byte_buffer~i]=i+40; open 0; /* initialize I/O device *1 pstring("Enter an \"X\" to terminate the program\n\r"); pstringQ' pstring(" pstring(" pstring(" pstring(" while ((c -- \"WV' \"RV' \"P\" \"D\" \"T\" to to to to to Write to EEPROM \n\r"); Read the EEPROM\n\r"); set Parameters\n\r"); Dump entire EEPROM\n\r"); enter Text message\n\r"); toupper(getcharo)) if (c -- -- `X') `W') pstring ("Write Data\n\r"); for (i--O;i<byte_count; i++) pstring ("\n\rEnter char c--getchar0; Jutchar (c); byte buffer [il--c; -- "I; pstring("\n\rWriting Data to E.EPR~. error -- ee_write(dev,addr,byte_count,byte error -- error+l; MOTOROLA 8 buffer); AN429/D if (c -- `T') printf ("Program text from address %d.\n\r",addr); pstring ("Enter Text to terxuinate\n\r"); tadd -- addr; tbc = 1; while (Cc getcharO) !-- `I') * yutchar (c); byte_buffer[0]--c; error -- ee write (dev,tadd,tbc,byte_buffer); ++tadd; if (c -- R') patring ("Read Data\n\r"); ee read(dev,addr,byte_count,byte for (i--O;i<byte_count;i++) buffer); putchar (byte_buffer[i]); putchar( `I'); pstring ("\n\r"); if (c -- `0') patring ("Block EEPROM durnp\n\r"); tbc -- 16; tadd = 0; do printf("\n %4d -- ",tadd); ee_read(dev,tadd,tbc,byte_buffer); for (i--0;i<16; i++) if (byte buffer)>] < 32 byte_buffer[i] -- putchar (byte_bufferfi]); tadd -- tadd + 16; putchar(' `I; I while (tadd>0); pstring("\n\r"); if Cc -- `P') pstring ("Parameters"); pstring("\n\rEnter no. of bytes 0--29 :"); do scanf ("%d", &iovar); while ( iovar > 29 1; byte_count -- (byte)iovar; pstring("Enter start address 0--255 :"); do scanf ("%d", Liovar); while Ciovar > 255); addr = (byte)iovar; printf ("Bytes -- %d Address -- %d.\n",bytecount,addr); pstring ("\n\r"); pstrinq("\n\rX:eXit W:Write R:Read P:Paranieters D:Dump T:Text\n\r"); pstring ("7"); pstring("EXIT PROGRAl'1\n\r"); AN429/D MOTOROLA 9 (This page intentionally left blank) MOTOROLA 10 AN429/I MCM2814 EEPROM Read and Write Subroutines Configured as a `C' language extermal call * * for the MC68332 OSPI * * Copyright Motorola 1990 * Call format: F.E_READ (0EV, ADDR, BYTE_COUNT, *BYTE_BUFFER) LIB 68332.REG Include MC68332 register equates section .data *********** **************************************** EEPROM read * ****** ********************************************* * *** ee read * * * *** CREATE LOCAL STACK FRAME AND STORE REGI STERS A6,#&--28 Allocate local stack area of 28 bytes and use A6 as local stack pointer MOVEM.L DO/D1/D2/D3/AO/A1/A2, (A7) Store registers in local stack frame LINK INITIALISE QSPI BSR OSPINIT * *** FETCH PARAMETERS FROM STACK USING AO AS POINTER LEA (&52,A7),AO Point to element above first parameter MOVE.L -(AO),Al Put BYTE_BUFFER address in Al MOVE.L -(AO),DO Put BYTE COUNT in DO MOVE.L -(AOLDl Put ADOR in Dl MOVE.L -(AO),D2 Put DEV in D2 *** LOAD TXD QUEUE WITH ~Z2184 COt'24ANDS 0: Read byte con~nand 1: MC~428l4 byte address MOVE.B *$A7,TXD store READ coriwnand MOVE.B Dl,'IXD+l store byte address into TXD queue (Dl can be used now) ENSURE BYTE_COUNT IS IN RANGE 1 TO 29 ANDI.W *$OOFF,DO Clear MSB (word will be used in DBcc) CMP.B *$1E,DO Should be 0 < BYTE_COUNT < &30 BCS B_COKi BYTE_COUNT < ~3O? MOVE.B *$1D,DO No. so force to &29 TST DO BYTE_COUNT <> 0? BNE B_COK2 MOVE.B *S0l,DO No, so force to 1 BYTE_COUNT should be O.K. now MOVE.W 00,01 Working copy of BYTE_COUNT in Dl * * * * Disable QSPI and initialise I/O *** B_COKi * B_COK2 *** SET UP CCJMD QUEUE Use 0EV code to calculate CCMD queue entries ORI.B #$EO,D2 Calculate entry with CONT bit set 16 bit transfer MOVEA. L *COMD, AD Use AD as COMO queue pointer * * * COMDLOOP * \N429/D No. of 32 bit transfers -- ((BYTE_COUNT+2)/2) + 1 Calculate value in D2 for DBcc loop to set up COMO queue ADD.B #$02, Dl BYTE_COUNT +2 ASR.B #1,Dl (BYTE_COUNT+2)/2 SUB.B #$01,Dl (BYTE_~OUNT+2)/2--1 Setup all C~4D entries except last with CONT bit set ~VE .B 02, (AO)+ DBF Dl, COMOLOOP Setup last COMO entry with CONT clear (deselect EEPROM at end) *S6F,D2 Calculate entry with CONT bit clear ANDI .B MOVE. B 02, (AD) Install in COMO queue MOTOROLA 11 * *** CALCULATE LAST QSPI ENTRY MOVE.B DO,Dl ADD.B *$02,D1 ASR.B ~1,D1 MOVE.B D1,SPCR2 MOVE.B #S0O, SPCR2+1 NO. AND INCORPORATE IN SPCR2 Make working copy of BYTE_COUNT BYTE_COUNT +2 (BYTE_COUNT+2) /2 Put into SPCR2 MSB and 00 as start entry in LSB * ~ READ DATA FROM MC~42814 MOVE.W *S8003, SPCRl Enable 0521, ~ * WTLOOP * * * * * WAIT FOR END OF TRANSMISSION TST.B SPSR Test SPIF bit BPL WTLOOP and wait till set PASS DATA BACK TO C PRCX3RAM ARRAY SUB.B #SO1,DO Use BYTE_COUNT-i as loop counter MOVEA.L #REC+3,AO Use AO as REC queue pointer Use MC68332 LOOP MODE to fill array Copy one data entry (AO)+,(Al)+ DO,PASSLOOP (loop until 00<0 from REC queue PASSLOOP MOVE.B DBF * RESTORE REGISTERS AND DE-ALLOCATE STACK MOVEM.L (A7) ,DO/Dl/02/D3/AO/Al/A2 Retrieve registers from local UNIX A6 And de--allocate local stack RTS * ** * **************************** ****** **** * ee **** stack frame * ****************** EEPROM write * write * `~`~` *** * * * * * * * * MOTOROLA *************** ************ ************** CREATE LOCAL STACK FRAME AND STORE REGISTERS LINK A6,~&-28 Allocate local stack area of 16 bytes for reg. store, using A6 as stack pointer MOVEM.L DO/D1/D2/D3/AO/Al/A2, (A7) Store registers in local stack frame INITIALISE QSPI BSR QSPINIT Disable and initialise OSPI FETCH PARAMETERS FROM STACK USING AO AS POINTER LEA (52,A7),AO Point to element above first parameter MOVE.L -(AO),Al Put BYTE_BUFFER address in Al MOVE.L -(AO),DO Put BYTE_COUNT in DO MOVE.L -(AO),Dl Put ADDR in Dl MOVE.L -(AO),D2 Put 0EV in D2 Stack pointer unchanged LOAD T~ QUEUE WITH 14ZM2814 CO~t1ANDS 0: Vpp on coiwnand 1: Write data corrtnand 2: reserved for byte address data 3: 4: Vpp off conunand MOVE. B *$A6, TXD+l Vpp ON conunand *$A2, TXD+3 MOVE B WRITE coirvriand Dl, TXD+5 MOVE. B Use ADDR as byte address (Dl can be used now) * 12 DTL delay of approx 5u5 ~ Adjust Byte_Count for use in DBcc loop SUB.B *soi,oo Need BYTE_COUNT loop counter in range 0-3 ANDI.W *S03,DO for use in DBcc loop, not 1-4 MOVE .W 00,01 Working copy in Dl AN429/IJ * * ** * * DATALOOP * PROGRAM COW) AND TXD QUEUES Program start of TXD and COW) queues MOVEA.L *COW),AO Use AO as CCt'!D queue pointer MOVEA.L #TXD+7,A2 Use A2 as TXD queue pointer ORI.B *S20,02 Calculate COW) entry with CONT bit clear Use as entry for Vpp ON (CONT clear) MOVE.B D2, (AO)+ ORI.B *$AO,D2 Calculate COW) entry with CONT set Use as entry for WRITE DATA and MOVE.B 02, (AO)+ ADDR, (CONT set) MOVE.B D2,(AO)+ PROGRAM TXD AND CMD QUEUES (Al)+, (A2)+ Put a byte of write data in TXD queue MOVE. B * $01, A2 TXD buffer is i'K)RD wide, so increment ADDA.L 02, (AO)+ Put an entry into COW) queue (CONT set) MOVE. B DBF Dl, DATALOOP Loop until finished Finish off COW) and TXD queue setup MOVE. B *$A4, (A2) Vpp OFF conunand in TXD queue ANDI.B #$2F,D2 Calculate COW) entry with CONT clear MOVE. B 02, (--l,AO) Change last data COW) entry to CONT clear MOVE . B D2, (AO) Last COW) entry (Vpp OFF), CONT clear * *** CALCULATE WHAT QUEUE ENTRIES TO SEND FOR PROGRAMMING ADD.B *$03,DO Last data entry is no. 2+BYTE_BUFFER MOVE.B DO, SPCR2 Put into SPCR2 MSB MOVE.B *SOO,SPCR2+1 and 00 as start entry in LSB * *** START TRANSMISSION AND PROGRAMMING DELAY MOVE.W *$8003,SPCR1 ** Start progranuning ** MOVE.L #$00008000,Dl Progranuning delay (approx 2Oms) DBF Dl, LOOP *** CALCULATE WHAT QUEUE ENTRIES TO SEND FOR Vpp OFF ADD.B *$0l,DO Vpp OFF conunand is inunediately after progranuning sequence MOVE.B DO,SPCR2 Put into SPI~R2 MSB and LSB MOVE.B DO,SPCR2+l so that only this cormnand is sent LOOP * * * * AN429/D ~ RESTORE REGISTERS AND DE-ALLOCATE STACK MOVEM.L (A7) ,DO/D1/D2/D3/AO/Al/A2 Retrieve registers from local UNIX AE And de--allocate local stack RTS stack frame MOTOROLA 13 ** **** * *** * ***** *** ****** ** ****************************** QSPINIT Orderly stop and initialise * * * ** * ***** QSPINIT ****** ORI.B ANDI.B ANDI.B *$80,SPCRO *$BF,SPCR2 #$7F,SPSR * * * NOSPIF * * MISS QSPI hardware ****************************** Is QSPI active TST.B SPCRl BPL MISS Ensure QSPI is mester Clear WREN (stop wrapping) Clear SPIF to enable sensing of when transmission has finished Test SPE bit to see if QSPI enabled Goto MISS if disabled Wait till QSPI reached end of current queue ANDI.B *$06,SPCR3 Ensure system not HALTed TST.B SPSR Wait until SPlFinished BPL NOSPIF Disable QSPI ANDI.B *S7F,SPCR1 Initialise MOVE.W MOVE.W MOVE.W ANDI.B Clear SPE bit QSPI for accessing M~42814 *S8054,SPCRO Set MASTER, no WIRED OR, 16 bits, 100KHZ *$7B7E,QPAR Configure MOSI,MISO+PCSO-3 as QSPI lines *$OOFA,QPDR MOSI+PCSO to default high *S7F,SPSR Clear SPIF to enable sensing of when next transmission has finished RTS * * Allow other programs ee_write and ee_read (eg C program) to access routine labels export ee_write export ee read MOTOROLA 14 AN429/l (This page IntentIonally left blank) AN429/D MOTOROLA 15 All products are sold on Motorola's Terms & Conditions of Supply. Inordering a product covered by this document the Customer agrees to be bound by those Terms & Conditions and nothing contained in this document constitutes or farms pan ofa contract Iwith the exception of the contents of this Notice). A copy of Motorola's Terms & Conditionsof Supply isavailable on request. Motorola reserves the right to make changes without further notice toany products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or arcuit, and specificaily disclaims any and ail liability, includingwithout limitation consequential or incidental damages. "Uyplcal" parameterscan and dovary indifferent applications. All operating parameters, induding "Typicals must be validated for each customer application by customer's technical experts. Motorola does not convey any license under itS patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to suppert or sustain life, or tar any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintendedorunauthorized application.Buyer shall indemnity and hold Motorola and its officers, employees, subsidiaries, atfiliates and distributors harmless against all daims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death assoaated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and (~ are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. The Customer should ensure that it has the most up to date version of the document by contacting its local Motorola office. This document supersedes any earlier documentation relating to the products referred to herein. The information contained in this document is current at the date of publication. It may subsequently be updated, revised or withdrawn. Uterature DistrIbution Centers: USA: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. EUROPE. Motorola Ltd.; European Uterature Centre; 88 Tanners Drive, Blakelands, Milton Keynes, MK14 58P, England. JAPAN: Nippon Motorola Ltd.; 4-32-1, Nishi-Gotanda, Shinagawa-ku, Tokyo 141, Japan ASIA PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Center, No. 2 Dal King Street, Tal Pa Industrial Estate, Tai Po N T Hong Kong U MOTOROLA Jut PRtNTED IN THE USA 1993 lAPS AN42~IO I IllJill 111111 III11111IIIIIliii IllliiiIIIliii