LR12
LR12
High Input Voltage, Adjustable
3-Terminal Linear Regulator
Features
13.2 to 100V input voltage range
Stable with 100nF output capacitor
Adjustable 1.20 to 88V output regulation
5% reference voltage tolerance
Output current limiting, 50mA min.
10µA typical ADJ current
Over temperature protection
Available in 3 different packages
Applications
DC/DC SMPS startup circuits
Adjustable high voltage constant current sources
Industrial controls
Motor controls
Battery powered systems
Power supplies
Telecom applications
LED drivers
Automotive applications
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General Description
The Supertex LR12 is a high voltage, low output current,
adjustable linear regulator. It has a wide operating input
voltage range of 13.2 - 100V. The output voltage can be
adjusted from 1.20 - 88V, provided that the input voltage
is at least 12V greater than the output voltage. The output
voltage can be adjusted by means of two external resistors
R1 and R2 as shown in the typical application circuits. The
LR12 regulates the voltage difference between VOUT
and ADJ pins to a nominal value of 1.20V. The 1.20V is
amplified by the external resistor ratio R1 and R2. An internal
constant bias current of typically 10µA is connected to
the ADJ pin. This increases VOUT by a constant voltage of
10µA times R2.
The LR12 has current limiting and temperature limiting. The
output current limit is 100mA maximum and the minimum
temperature limit is 125°C. An output short circuit current
will therefore be limited to 100mA maximum. When the
junction temperature reaches its temperature limit, the
output current and/or output voltage will decrease to keep
the junction temperature from exceeding its temperature
limit. For SMPS start-up circuit applications, the LR12
turns off when an external voltage greater than the output
voltage of the LR12 is applied to VOUT of the LR12. To
maintain stability, a bypass capacitor of 100nF or larger
and a minimum DC output current of 500µA are required.
LR12 Typical Application
VIN
*
*Required for conditions where VIN is less than VOUT.
R1
R2
C2
C1 RLOAD
VOUT
1.2V to 88V
13.2V to
100V LR12
VOUT
ADJ
VIN
2
LR12
Ordering Information Pin Configurations
Package Options
Device 8-Lead SOIC TO-252
(D-PAK) TO-92
LR12 LR12LG-G LR12K4-G LR12N3-G
-G indicates package is RoHS compliant (‘Green’)
Absolute Maximum Ratings
Parameter Value
VIN-ADJ -0.5V to +120V
VOUT-ADJ -10V to +10V
VIN - VOUT -0.5V to +120V
Operating ambient temperature -40°C to +85°C
Operating junction temperature -40°C to +125°C
Storage temperature -65°C to +150°C
Absolute maximum ratings are those values beyond which damage to the device may oc-
cur. Functional operation under these conditions is not implied. Continuous operation of the
device at the absolute rating level may affect device reliability. All voltages are referenced
to device ground.
Thermal Characteristics
Package Power Dissipation
@ TA = 25OC
θjc
(OC/W)
θja
(OC/W)
TO-252 2.0W 6.25 50
8-Lead SOIC 1.8W - 55*
TO-92 0.6W 125 170
Notes:
* Mounted on FR4 board, 25mm x 25mm x 1.57mm
Sym Parameter Min Typ Max Units Conditions
VIN - VOUT Input to output voltage difference 12 - 98.8 V ---
VOUT Overall output voltage regulation 1.14 1.20 1.26 V 13.2V < VIN <100V, R1 = 2.4KΩ, R2 = 0
ΔVOUT
Line regulation - 0.003 0.03 %/V 15V < VIN <100V, VOUT = 5.0V, IOUT = 0.5A
Load regulation - 1.4 3.0 % VIN = 15V, VOUT = 5.0V,
0.5mA< IOUT<50mA
Temperature regulation -1.0 - +1.0 % VIN = 15V, VOUT = 5.0V, IOUT = 10mA,
-40OC < TA < 85OC
Electrical Characteristics (Test conditions unless otherwise specified: -40OC < TA < +85OC)
8-Lead SOIC (LG)
VOUT
VOUT
VOUT
VOUT
NC
ADJ
VIN
NC
TO-252 (K4)
VIN
ADJ
VOUT
ADJ
VIN
VOUT
Product Marking
YY = Year Sealed
WW = Week Sealed
L = Lot Number
= “Green” Packaging
YYWW
LR12
LLLL
YY = Year Sealed
WW = Week Sealed
L = Lot Number
= “Green” Packaging
Si YYWW
LR12K4
LLLLLLL
Y = Last Digit of Year Sealed
W = Code for Week Sealed
L = Lot Number
= “Green” Packaging
S i L R
1 2
YWLL
TO-92 (N3)
TO-252 (K4)
8-Lead SOIC (LG)
Package may or may not include the following marks: Si or
Package may or may not include the following marks: Si or
Package may or may not include the following marks: Si or
TO-92 (N3)
3
LR12
Functional Block Diagram
Electrical Characteristics (cont.)
Sym Parameter Min Typ Max Units Conditions
IOUT
Output current limit 50 - 100 ma TJ < 85OC, VIN - VOUT < 12V
- - -0.5 TJ < 125OC, VIN - VOUT < 100V
Minimum output current 0.5 - - mA Includes R1 and load current
IADJ Adjust output current 5.0 10 15 µA ---
C2 Minimum output load
capacitance 100 - - nF ---
DVOUT/DVIN Ripple rejection ratio 50 60 - dB 120Hz, VOUT = 5.0V
TLIMIT Junction temperature limit 125 - - OC ---
Overtemp &
Overcurrent 10μA
1.2V
VIN VOUT
ADJ
LR12
Pass
Element
6.5V
1.0KΩ
Current Limit
-40 -20 0 20 40 60 80 100
50
60
70
80
90
100
Temperature (oC)
IC (mA)
4
LR12
Figure 3: High Voltage Adjustable Constant Current Source
Figure 2: SMPS Start-Up Circuit
Typical Application Circuits
PWM IC
VOUT1
VOUT2
+
+
-
-
VCC
VAUX
FB
LR12
VIN=15V to 100V
VOUT
ADJ
VIN
R
IOUT =1.20V
R
+
-
100nF
VIN = 15V to 100V
VOUT
ADJ
VIN
LR12
Figure 1: High Input Voltage, 5.0V Output Linear Regulator
* Required for conditions where VIN is less than VOUT.
LR12
VIN=17V to 100V
*
R2
18.2KΩ
±1%
C2
100nF
C1
VOUT = 5.0V
VOUT = 1.20V + IADJ R21+ R2
R1
VOUT
ADJ
VIN
RLOAD ≤ 16.5KΩ
R1
6.04KΩ
±1%
5
LR12
Typical Performance Curves
13.2V
2.4KΩ 100nF
VOUT = 1.2V
VOUT
ADJ
VIN
LR12
VOUT (V)
T(junction) (oC)
Temperature Variation
-50 -25 0 25 50 75 100 125
1.00
1.05
1.10
1.15
1.20
1.25
1.30
6.04KΩ
±1%
18.2KΩ
±1%
100nF
RLOAD
25V
IOUT
VOUT = 5.0V
LR12
VOUT
ADJ
VIN
6
LR12
Typical Performance Curves (cont.)
6.04KΩ
±1%
18.2KΩ
±1%
100nF
1KΩ
0V to 50V
VOUT = 5.0V
VOUT
ADJ
VIN
LR12
VOUT vs. VIN
VOUT (V)
VIN (V)
0 20 40 60 80 100
0
1
2
3
4
5
6
6.04KΩ
±1%
18.2KΩ
±1%
100nF
RLOAD
65V
IOUT
20VP-P
@ 120Hz
VOUT = 5.0V
VOUT
ADJ
VIN
LR12
Ripple Rejection
Ripple Rejection Ratio (dB)
IOUT (mA)
0 10 20 30 40 50
-60
-61
-62
-63
-64
-65
7
LR12
Typical Performance Curves (cont)
Line Power Up Transient Line Power Down Transient
25V
18.2KΩ
±1%
100nF
SW
100nF
10KΩ
0V
100V
VIN
LR12
VOUT
ADJ
VIN
VOUT = 5V
6.04KΩ
±1%
10KΩ
509Ω
LR12
VOUT
ADJ
VIN
18.2KΩ
±1%
6.04KΩ
±1%
Load Transient Response Line Transient Response
Load Transient Response, Load = 509Ω Line Turn On/Off Response
SW
Open
Closed
VOUT
200mV/div
VIN
5V/div
VIN
50V/div
VIN
50V/div
VIN
5V/div
VIN
50V/div
VIN
5V/div
8
LR12
3-Lead TO-252 D-PAK Package Outline (K4)
Note:
Although 4 terminal locations are shown, only 3 are functional. Lead number 2 was removed.1.
1 2 3
4
L4 L5
b
b2
e
D1
E1
L1
L
Seating
Plane
A1
Gauge
Plane
θ
D
E
View B
Front View Side View
Rear View
View B
θ1
H
c2
A
L3
L2
b3
Note 1
Symbol A A1 b b2 b3 c2 D D1 E E1 e H L L1 L2 L3 L4 L5 θθ1
Dimen-
sion
(inches)
MIN .086 .000* .025 .030 .195 .018 .235 .205 .250 .170
.090
BSC
.370 .055
.108
REF
.020
BSC
.035 .025* .045 0O0O
NOM - - - - - - .240 - - - - .060 - - - - -
MAX .094 .005 .035 .045 .215 .035 .245 .217* .265 .182* .410 .070 .050 .040 .060 10O15O
JEDEC Registration TO-252, Variation AA, Issue E, June 2004.
* This dimension is not specified in the original JEDEC drawing. The value listed is for reference only.
Drawings not to scale.
Supertex Doc. #: DSPD-3TO252K4, Version D081408.
9
LR12
8-Lead SOIC (Narrow Body) Package Outline (LG)
4.90x3.90mm body, 1.75mm height (max), 1.27mm pitch
1
8
Seating
Plane
Gauge
Plane
L
L1
L2
E
E1
D
eb
AA2
A1
Seating
Plane
A
A
Top View
Side View
View B
View B
θ1
θ
Note 1
(Index Area
D/2 x E1/2)
View A-A
h
h
Note 1
Symbol A A1 A2 b D E E1 e h L L1 L2 θ θ1
Dimension
(mm)
MIN 1.35* 0.10 1.25 0.31 4.80* 5.80* 3.80*
1.27
BSC
0.25 0.40
1.04
REF
0.25
BSC
0O5O
NOM - - - - 4.90 6.00 3.90 - - - -
MAX 1.75 0.25 1.65* 0.51 5.00* 6.20* 4.00* 0.50 1.27 8O15O
JEDEC Registration MS-012, Variation AA, Issue E, Sept. 2005.
* This dimension is not specified in the original JEDEC drawing. The value listed is for reference only.
Drawings are not to scale.
Supertex Doc. #: DSPD-8SOLGTG, Version H101708.
Note:
This chamfer feature is optional. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier;
an embedded metal marker; or a printed indicator.
1.
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an
adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the
replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications
are subject to change without notice. For the latest product specifications refer to the Supertex inc. website: http//www.supertex.com.
©2009 All rights reserved. Unauthorized use or reproduction is prohibited.
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com
LR12
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline
information go to http://www.supertex.com/packaging.html.)
Doc.# DSFP-LR12
B030509
3-Lead TO-92 Package Outline (N3)
Symbol A b c D E E1 e e1 L
Dimensions
(inches)
MIN .170 .014†.014†.175 .125 .080 .095 .045 .500
NOM - - - - - - - - -
MAX .210 .022†.022†.205 .165 .105 .105 .055 .610*
JEDEC Registration TO-92.
* This dimension is not specified in the original JEDEC drawing. The value listed is for reference only.
† This dimension is a non-JEDEC dimension.
Drawings not to scale.
Supertex Doc.#: DSPD-3TO92N3, Version D080408.
Seating Plane
1
2
3
Front View Side View
Bottom View
E1 E
D
e1
L
e
c
1 2 3
b
A