May 2001
QFETTM
FQD7P06 / FQU7P06
©2001 Fairchild Semiconductor Corporation Rev. A2. May 2001
FQD7P06 / FQU7P06
60V P-Channel MOSFET
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand a high energy pulse in the
avalanche and commutation modes. These devices are
well suited for low voltage appl ications such as automotive,
DC/DC converters, and high ef ficiency s witch ing fo r power
management in portable and battery operated products.
Features
-5.4A, -60V, RDS(on) = 0.45 @VGS = -10 V
Low gate charge ( typical 6.3 nC)
Low Crss ( typical 25 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Thermal Characteristics
Symbol Parameter FQD7P06 / FQU7P06 Units
VDSS Drain-Source Voltage -60 V
IDDrain Current - Continuous (TC = 25°C) -5.4 A
- Continuous (TC = 100°C) -3.42 A
IDM Drain Current - Pulsed (Note 1) -21.6 A
VGSS Gate-Source Voltage ± 25 V
EAS Single Pulsed Avalanche Energy (Note 2) 90 mJ
IAR Avalanche Current (Note 1) -5.4 A
EAR Repetitive Avalanche Energy (Note 1) 2.8 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) -7.0 V/ns
PDPower Dissipation (TA = 25°C) * 2.5 W
Power Dissipation (TC = 25°C) 28 W
- Derate above 25°C 0.22 W/°C
TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C
TLMaximum lead temperature for soldering purposes,
1/8" from case for 5 seconds 300 °C
Symbol Parameter Typ Max Units
RθJC Thermal Resistance, Junction-to-Case -- 4.5 °C/W
RθJA Thermal Resistance, Junction-to-Ambient * -- 50 °C/W
RθJA Thermal Resistance, Junction-to-Ambient -- 110 °C/W
* When mounted on the minimum pad size recommended (PCB Mount)
I-PAK
FQU Series
D-P AK
FQD Series GS
D
GS
D
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D
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FQD7P06 / FQU7P06
Rev. A2. May 2001©2001 Fairchild Semiconductor Corporation
Elerical Characteristics TC = 25°C unless otherwise noted
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 3.6mH, IAS = -5.4A, VDD = -25V, RG = 25 Ω, Starting TJ = 25°C
3. ISD -7.0A, di/dt 300A/µs, VDD BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width 300µs, Duty cycle 2%
5. Essentially independent of operating temperature
Symbol Parame ter Test Condit ions Min Typ Max Unit s
Off Characteristics
BVDSS Drain-S ource Breakdown Voltage VGS = 0 V, I D = -250 µA-60 -- -- V
BVDSS
/ TJ
Breakdown Voltage Temperature
Coefficient ID = -250 µA, Referenced to 25°C -- -0.07 -- V/°C
IDSS Zero Gate Voltage Drain Current VDS = -60 V, VGS = 0 V -- -- -1 µA
VDS = -48 V, TC = 125°C -- -- -10 µA
IGSSF Gate-Body Leakage Current, Forward VGS = -25 V, VDS = 0 V -- -- -100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = 25 V, VDS = 0 V -- -- 100 nA
On Characteri st ics
VGS(th) Gate Threshold Volt age VDS = VGS, ID = -250 µA-2.0 -- -4.0 V
RDS(on) Static Drain-Source
On-Resistance VGS = -10 V, ID = -2.7 A -- 0.36 0.451
gFS Forward Transconductance VDS = -30 V, ID = -2.7 A -- 3.8 -- S
Dynamic Characteristics
Ciss Input Capacitance VDS = -25 V, VGS = 0 V,
f = 1.0 MHz
-- 225 295 pF
Coss Output Capacitance -- 110 145 pF
Crss Reverse Transfer Capacitance -- 25 3 2 pF
Switching Characteristics
td(on) Turn-On Delay Time VDD = -30 V, ID = -3.5 A,
RG = 25
-- 7 25 ns
trTurn-On Rise Time -- 50 110 ns
td(off) Turn-Off De l a y Time -- 7 .5 25 ns
tfTurn -Off Fa ll Time -- 2 5 60 ns
QgTotal Gate Ch arge VDS = -48 V, ID = -7.0 A,
VGS = -10 V
-- 6.3 8.2 nC
Qgs Gate-Source Charge -- 1.6 -- nC
Qgd Gate-Drain Charge -- 3.1 -- nC
Drain-Source Diode Characteristics and Maximum Ratings
ISMaximum Continuous Drain-Source Diode Forward Current -- -- -5.4 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- -21.6 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, I S = -5.4 A -- -- -4.0 V
trr Reverse Recovery Time VGS = 0 V, I S = -7.0 A,
dIF / dt = 100 A/µs
-- 77 -- ns
Qrr Reverse Recovery Charge -- 0.23 -- µC
(Note 4)
(Note 4, 5)
(Note 4, 5)
(Note 4)
FQD7P06 / FQU7P06
©2001 Fairchild Semiconductor Corporation Rev. A2. May 2001
0 4 8 12 16 20
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
N o te : TJ = 25
VGS = - 20V
VGS = - 10V
RDS(on) [],
Drain-Source On-Resistance
-ID , Dr a in Curre n t [A]
10-1 100101
10-1
100
101
VGS
Top : - 15.0 V
- 10.0 V
- 8.0 V
- 7.0 V
- 6.0 V
- 5.5 V
- 5.0 V
B o tto m : - 4 .5 V
No tes :
1. 250μs Pu lse Tes t
2. TC = 25
-ID, D ra in Curren t [A]
-VDS, Drain-Source Voltage [V]
01234567
0
2
4
6
8
10
12
VDS = -30V
VDS = -48V
Note : ID = -7.0 A
-VGS , Gate-Source Voltage [V]
QG, Tota l Ga t e Charge [nC]
10-1 100101
0
100
200
300
400
500
600 Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
Notes :
1. VGS = 0 V
2. f = 1 MH z
Crss
Coss
Ciss
Capacitance [pF]
VDS, Drain-Source Voltage [V]
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8
10-1
100
101
150
Notes :
1. VGS = 0V
2. 250μs Pulse Test
25
-IDR , R e v e rse Dra in Curren t [A ]
-VSD , Source-Drain Voltage [V]
246810
10-1
100
101
150
25
-55 Notes :
1. VDS = -30V
2. 250μs Pulse Test
-ID , Drain Current [A]
-VGS , Gate-Source Voltage [V]
Typical Characteristics
Figure 5. C apacitanc e Ch aracterist i cs Figure 6. Ga te Ch arge Cha ra ct eri stics
Figu re 3. O n-Res i stance Variat ion vs.
Drain Current and Gate Voltage Figure 4. Body Diode Fo rwa rd Voltage
Variation vs. Source Current
and Temperature
Figure 2. Transfer CharacteristicsFigure 1. On- R egi on Character i st ic s
FQD7P06 / FQU7P06
©2001 Fairchild Semiconductor Corporation Rev. A2. May 2001
10-5 10-4 10-3 10-2 10-1 100101
10-1
100 Note s :
1 . Z θJC(t) = 4.5 /W Ma x .
2 . D u ty F a c to r, D = t1/t2
3 . T JM - T C = P DM * Z θJC(t)
single p ulse
D=0.5
0.02
0.2
0.05
0.1
0.01
ZθJC
(t), Therm al Response
t1, S quare W ave P ulse D uration [sec]
25 50 75 100 125 150
0
1
2
3
4
5
6
-ID, Drain Current [A]
TC, Case Temperature [
]
100101102
10-1
100
101
DC
10 ms
1 ms
100 µs
Operation in This Area
is Limited by R DS(on)
No tes :
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
-ID, Drain Current [A]
-VDS, Drain-Source Voltage [V]
-100 -50 0 50 100 150 200
0.0
0.5
1.0
1.5
2.0
2.5
Notes :
1. VGS = -10 V
2. ID = -2.7 A
RDS(ON) , (Normalized)
Drain-Source On-Resistance
TJ, Junction Temperature [oC]
-100 -50 0 50 100 150 200
0.8
0.9
1.0
1.1
1.2
Notes :
1 . VGS = 0 V
2 . ID = -250 μA
-BV DSS , (No rma liz e d )
Drain-Source Breakdow n Voltage
TJ, Junction Tem perature [oC]
Typical Characteristics (Continued)
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
Figu re 7. Breakdown Voltage Variation
vs. Temperature Figure 8. On-Resistance Variation
vs. Temperature
Figure 11. Transient Thermal Response Cur ve
t1
PDM
t2
FQD7P06 / FQU7P06
©2001 Fairchild Semiconductor Corporation Rev. A2. May 2001
Charge
VGS
-10V Qg
Qgs Qgd
-3mA
VGS
DUT
VDS
300nF
50KΩ
200nF
12V
Same Type
as DUT
Charge
VGS
-10V Qg
Qgs Qgd
-3mA
VGS
DUT
VDS
300nF
50KΩ
200nF
12V
Same Type
as DUT
VDS
VGS 10%
90%
td(on) tr
ton toff
td(off) tf
VDD
-10V
VDS RL
DUT
RG
VGS
VDS
VGS 10%
90%
td(on) tr
ton toff
td(off) tf
VDD
-10V
VDS RL
DUT
RG
VGS
EAS =LI
AS2
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
-10V DUT
RG
L
ID
t p
EAS =LI
AS2
----
2
1
EAS =LI
AS2
----
2
1
----
2
1--------------------
BVDSS -V
DD
BVDSS
VDD
VDS
BVDSS
t p
VDD
IAS
VDS (t)
ID (t)
Time
-10V DUT
RG
LL
ID
ID
t p
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
FQD7P06 / FQU7P06
©2001 Fairchild Semiconductor Corporation Rev. A2. May 2001
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
VDS
+
_
Driver
RGCompliment of DUT
(N-Channel)
VGS dv/dt controlled by RG
•I
SD con trol l e d by pulse period
VDD
L
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pu lse P eri od
--------------------------
DUT
VDS
+
_
Driver
RGCompliment of DUT
(N-Channel)
VGS dv/dt controlled by RG
•I
SD con trol l e d by pulse period
VDD
LL
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pu lse P eri od
--------------------------
D = Gate Pulse Width
Gate Pu lse P eri od
--------------------------
FQD7P06 / FQU7P06
©2001 Fairchild Semiconductor Corporation Rev. A2. May 2001
6.60 ±0.20
2.30 ±0.10
0.50 ±0.10
5.34 ±0.30
0.70 ±0.20
0.60 ±0.20
0.80 ±0.20
9.50 ±0.30
6.10 ±0.20
2.70 ±0.20 9.50 ±0.30
6.10 ±0.20
2.70 ±0.20
MIN0.55
0.76 ±0.10 0.50 ±0.10
1.02 ±0.20
2.30 ±0.20
6.60 ±0.20
0.76 ±0.10
(5.34)
(1.50)
(2XR0.25)
(5.04)
0.89 ±0.10
(0.10) (3.05)
(1.00)
(0.90)
(0.70)
0.91 ±0.10
2.30TYP
[2.30±0.20]
Dimensions in Millimeters
Mechanical Dimensions
D - PAK
FQD7P06 / FQU7P06
©2001 Fairchild Semiconductor Corporation Rev. A2. May 2001
6.60 ±0.20
0.76 ±0.10
MAX0.96
2.30TYP
[2.30±0.20] 2.30TYP
[2.30±0.20]
0.60 ±0.20
0.80 ±0.10
1.80 ±0.20
9.30 ±0.30
16.10 ±0.30
6.10 ±0.20
0.70 ±0.20
5.34 ±0.20
0.50 ±0.10
0.50 ±0.10
2.30 ±0.20
(0.50) (0.50)(4.34)
IPAK
Mechanical Dimensions
Dimensions in Millimeters
I - PAK
©2001 Fairchild Semiconductor Corporation Rev. H2
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CORPORATION.
As used herein:
1. Life support devices or systems are devic es or syst em s
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when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or In
Design This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary First Production This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconduct or reserv es the right to make
changes at any time without notice in order to improve
design.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete Not In Production This datasheet contains specifications on a product
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The datasheet is printed for reference information only.
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