32K x 8 Power Switched and
Reprogrammable PROM
CY7C271A
Cypress Semiconductor Corporation • 3901 North F irs t Street • San Jos e • CA 95134 • 408-943-2600
Document #: 38-04013 Rev. *B Revised December 28, 2002
1CY7C271A
Features
• CMOS for optimum speed/power
• Window ed for reprogramm abi lity
• High speed
—25 ns (Commercial)
• Low power
—275 mW (Commercial)
• Super low standby power
—Less than 85 mW when deselected
• EPROM technology 100%programmable
• Slim 300-mil package
• Direct replacement for bipolar PROMs
• Capable of withstanding >4001V static discharge
Functional Description
The CY7C271A is a high-performance 32,768-word by 8-bit
CMOS PROM. When disabled (CE HIGH), the 7C271A
automatically powers down into a low-power stand-by mode.
The CY7C271A is packaged in the 300-mil slim package and
is available in a cerDIP package equipped with an erasure
window to provide for reprogrammability . When exposed to UV
light, the PROM is erased and can be reprogrammed. The
memory cells utilize proven EPROM floating gate technology
and byte-wide intelligent programming algorithms.
The CY7C271A offers the advantages of lower power,
superior performance, and programming yield. The EPROM
cell req uire s onl y 1 2.5 V for t he s up er v ol t age , a nd l ow c urre nt
requirements allow for gang programming. The EPROM cells
allow ea ch memo ry location to be teste d 100% b eca us e each
locatio n is writt en into, era sed, and repeatedl y exerc ised pri or
to encapsulation. Each PROM is also tested for AC perfor-
mance to guarantee that after customer programming, the
product will meet DC and AC specification limits.
Reading the 7C271A is accomplished by placing active LOW
signals on CS1 and CE, and an active HIGH on CS2. The
contents of the memory location addressed by the address
lines (A0–A14) will become available on the output lines
(O0–O7).
Logic BlockDiagram Pin Configurations
1
2
3
4
5
6
7
8
9
10
11
12 16
17
18
19
20
24
23
22
21
13
14
25
28
27
26
A8
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
VCC
A11
A12
A13
O7
O6
O4
O5
O3
A12
A11
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
POWER-DOWN
O7
O6
O5
O4
O3
O2
O1
O0
CE
256 x 1024
PROGRAMABLE
ARRAY 8 x 1 OF 128
MULTIPLEXER
15
A10
A13
CS1
A9A10
A14
CS1
CS2
CE
A14
CS2
DIP/Flatpack
Y
X
ADDRESS
ADDRESS
28
4
5
6
7
8
9
10
321 27
13
26
25
24
23
22
21
20
1112 19
A5
VCC
GND A6
A7
O3
O1
O018
O4
O5
NC
A0
A4
A3
E
NC
NC
NC
CLR
ES
O7
O6
A2
A1CP
O2
A8
PS
PLCC
Top View
14151617
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CY7C271A
Document #: 38-04013 Rev. *B Page 2 of 10
Maximum Ratings[1]
(Above which the useful life may be impaired. For user guide-
lines, not tes ted .)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage to Ground Potential...............–0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State ...............................................–0.5V to +7.0V
DC Input Voltage............................................–3.0V to +7.0V
DC Program Voltage ....................................................13.0V
Static Discha rge Voltage..... ................. ...... ................>4001V
(per MIL-STD-883, Method 3015)
Latch-Up Current.....................................................>200 mA
UV Exposure ................................................7258 Wsec/cm2
Selection Guide 7C271A-25 7C271A-30 7C271A-35 7C271A-45 Unit
Maxi mu m A cc es s Time 25 30 35 45 ns
Maximum Operat ing Curre nt Com’l 75 75 50 50 mA
Standby Current Com’l 15 15 15 15 mA
Operating Range
Range Ambient
Temperature VCC
Commercial 0°C to +700°C 5V ±10%
Electrical Characteristi cs Ov er the Operating Ran ge [2, 3]
Parameter Description Test Conditions
7C271A-25
7C271A-30 7C271A-35 7C271A-45
UnitMin. Max. Min. Max. Min. Max.
VOH Output HIGH
Voltage VCC = Min., IOH = –2.0 mA 2.4 2.4 2.4 V
VOL Output LOW Voltage VCC = Min., I OL = 8.0 mA 0.4 0.4 0.4 V
VIH Input HIGH Level Guaranteed Input Logical HIGH
Voltage for All Input s 2.0 VCC 2.0 VCC 2.0 VCC V
VIL Input LOW Level Guaranteed Input Logical LOW
Voltage for All Input s 0.8 0.8 0.8 V
IIX Input Leakage
Current GND < VIN < VCC –10 +10 –10 +10 –10 +10 µA
IOZ Output Leakage
Current GND < VOUT < VCC,
Output Disable –10 +10 –10 +10 –10 +10 µA
IOS Output Short Circuit
Current[4] VCC = Max., VOUT = GND –20 –90 –20 –90 –20 –90 mA
ICC Power Supply
Current VCC=Max., IOUT = 0 mA,
f = 10 MHz Com’l 75 50 50 mA
ISB Stand-By Current VCC=Max.,
CE = VIH Com’l 15 15 15 mA
Capacitance[3]
Parameter Description Test Conditions Max. Unit
CIN Input Capacitance TA = 25°C, f = 1 MHz,
VCC = 5.0V 10 pF
COUT Output Capacitance 10 pF
Notes:
1. The voltage on any input or I/O pin cannot exceed the power pin during power-up.
2. See the last page of this specification for Group A subgroup testing information.
3. See Introduction to CMOS PROMs in this Data Book for general information on testing.
4. For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds.
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CY7C271A
Document #: 38-04013 Rev. *B Page 3 of 10
AC Test Loads and Waveforms
90%
10%
3.0V
GND
90%
10%
ALL INPUT PULSES
5V
OUTPUT
30 pF
INCLUDING
JIG AND
SCOPE
5V
OUTPUT
5 pF
INCLUDING
JIG AN D
SCOPE
(a) NormalLoad (b) High-ZLoad
5ns 5ns
OUTPUT
R1 500Ω
658Ω MIL
R2 333Ω
403Ω MIL
200Ω
250Ω MIL
Equivale nt to: THÉ VENIN EQUIVALENT
2.00V Commercial
1.90V MIL
R1 500Ω
658Ω MIL
R2 333Ω
403Ω MIL ≤≤
Switching Characteristics Over the Operating Range[2, 3]
7C271A-25 7C271A-30 7C271A-35 7C271A-45
Parameter Description Min. Max. Min. Max. Min. Max. Min. Max. Unit
tAA Address to Output Valid 25 30 35 45 ns
tACS CS1/CS2 Active to
Output Valid 12 18 18 18 ns
tACE CE Active to Output Valid 30 35 35 45 ns
tHZCS CS1/CS2 Inactive to High Z 12 18 18 18 ns
tHZCE CE Inactive to High Z 12 18 18 18 ns
tPU CE Active to Power-Up 0 0 0 0 ns
tPD CE Inactive to
Power-Down 30 35 40 40 ns
tOH Output Data Hold 0 0 0 0 ns
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CY7C271A
Document #: 38-04013 Rev. *B Page 4 of 10
Erasure Characteri stics
W ave lengths o f light l ess than 4000 Ang stroms b egin to e rase
the CY7C271A in the windowed package. For this reason, an
opaque label should be placed over the window if the PROM
is exposed to sunlight or fluorescent lighting for extended
periods of time.
The recommended dose of ultraviolet light for erasure is a
wavelength of 2537 Angstroms for a minimum dose (UV
intensi ty mu lti plied by ex po su re t im e) o f 25 Ws ec /c m2. F or a n
ultravio let lam p with a 12 mW/cm2 pow er rating , the exposu re
time would be approximately 35 minutes. The CY7C271A
needs to be within 1 inch of the lamp during erasure.
Permanent damage may result if the PROM is exposed to
high-intensity UV light for an extended period of time. 7258
Wsec/cm2 is the recommended maximum dosage.
Programming Modes
Programming support is available from Cypress as well as
from a number of third-party software vendors. For detailed
programming information, including a listing of software
packages, please see the PROM Programming Information
located at the end of this section. Programming algorithms can
be obtained from any Cypress representative.
Switching Waveform
tPU
tACE
tAA
tPD
CE
O0-O
7
A0-A
14
CS1
ICC
ADDRA ADDRB
tAA
DATA ADATABDATAB
tHZCS tACS tHZCE
tOH
CS2ACTIVE INACTIVE ACTIVE
Table 1. Programming Electrical Characteristics
Parameter Description Min. Max. Unit
VPP Programming Power Supply 12.5 13 V
IPP Programming Supply Current 50 mA
VIHP Programming Input Voltage HIGH 3.0 VCC V
VILP Progr amming Input Voltage LOW –0.5 0.4 V
VCCP Pr ogramming VCC 6.0 6.5 V
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CY7C271A
Document #: 38-04013 Rev. *B Page 5 of 10
Table 2. Mode Selection
Pin Function[5]
Mode CS1/VPP CS2/PGM CE/VFY A0A9Data
Read VIL VIH VIL A0A9O7–O0
Output Disable VIH VIH VIL A0A9High Z
Output Disable VIL VIL VIL A0A9High Z
Stand-by X X VIH A0A9High Z
Program VPP VILP VIHP A0A9D7–D0
Program Verify VPP VIHP VILP A0A9O7–O0
Pro gram Inhibit VPP VIHP VIHP X X X
Signature (MFG ) VILP VILP VILP VILP VHV[6] 34H
Signature (DE V) VILP VILP VILP VIHP VHV[6] 20H
Note:
5. X can be VIL or VIH.
6. VHV=12±0.5V
Programming Pinouts
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
24
23
22
21
13
14
A8
A7
A6
A5
A4
A3
A2
A1
A0
D0
D1
D2
GND
VCC
D7
D6
D4
D5
D3
15
PS
E
VPP
VFY
PGM
28
4
5
6
7
8
9
10
321 27
1314151617
26
25
24
23
22
21
20
1112 19
A5
V
CC
GND A6
A7
D3
D1
D018
D4
D5
NC
A0
A4
A3
A8
NC
NC
D7
D6
A2
A1
D2
E
VPP
VFY
PGM
NC
PS
DIP PLCC
Top View Top View
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CY7C271A
Document #: 38-04013 Rev. *B Page 6 of 10
Typical DC and AC Characteristics
CLOCK PERIOD (ns)
NORMALIZED SUPPLY CURRENT
vs. CYCLE PERIOD
NORMALIZED ACCESS TIME
vs. AMBIENT TEMPERAT URE
NORMALIZED SUPPLY CURRENT
vs. SUP PLY VOLTAGE
SUPPLY VOLTAGE (V) AMBIENT TEMPER ATURE (°C)
NORMALIZED SUPPLY CURRENT
vs. AMBIENT TEMPERATURE
NORMALIZED ACCESS TIME
NORMALIZED ACCESS TIME
vs. SUPPLY VO LTAGE 120
100
60
40
20
0.0 1.0 2.0 3.0 4.0
OUTPUT SINK CURRENT (mA)
0
80
OUTPUT SINK CURRENT
vs. OUTPUT VOLTAGE
VCC = 5.0V
TA = 25°C
-100
-80
-60
-40
-20
0.0 1.0 2.0 3.0 4.0
OUTPUT SOURCE CURRENT
OUTPUT VOLTAGE (V)
OUTPUT SOURCE CURRENT vs.
OUTPUT VOLTAGE
0.0 5.0
SUPPLYVOLTAGE (V) AMBIENT TEMPERATURE (°C) OUTPUT VOLTAGE (V)
C271A-9
1.1
1.0
0.9
0.8
0.7
0.6
0.0 50 100 150 200
0.5 250
1.7
1.3
1.1
0.7
0.6
44.5 55.5 6
0.5
VCC =5.5V
TA=25°C
f= 10MHz
TA= 25°C
0.8
0.9
1.0
1.2
1.4
1.5
1.6 1.25
1.2
1.1
1.0
0.9
0.85
–100 –50 0 50 100
0.8 150
VCC = 5.5V
f= 10 MHz
0.95
1.05
1.15
1.15
1.1
1.0
0.95
0.9
44.5 55.5 6
0.85
1.05
TA =25°C
1.2
1.25 1.4
1.3
1.2
1.1
1.0
0.9
–100 –50 0 50 100
0.8 150
VCC = 4.5V
NORMALIZED ACCESS T IM E
NORMALIZED ICC
NORMALIZED ICC
NORMALIZED ICC
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CY7C271A
Document #: 38-04013 Rev. *B Page 7 of 10
MILITARY SPECIFICATIONS
Group A Subgroup Testing
Ordering Information
Speed
(ns) Ordering Code Package
Name Package Type Operating
Range
25 CY7C271A-25JC J65 32-Lead Plas tic Lead ed Chip Carrie r Commercial
30 CY7C271A-30PC P21 28-Lead (300-Mil) Molded DIP Commercial
35 CY7C271A-35PC P21 28-Lead (300-Mil) Molded DIP Commercial
CY7C271A-35WC W22 28-Lead (300-Mil) Windowed CerDIP
45 CY7C271A-45WC W22 28-Lead (300-Mil) Windowed CerDIP Commercial
DC Characteristics
Parameter Subgroups
VOH 1, 2, 3
VOL 1, 2, 3
VIH 1, 2, 3
VIL 1, 2, 3
IIX 1, 2, 3
IOZ 1, 2, 3
ICC 1, 2, 3
ISB 1, 2, 3
Switching Characteristics
Parameter Subgroups
tAA 7, 8, 9, 10, 11
tACS 7, 8, 9, 10, 11
tACE 7, 8, 9, 10, 11
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CY7C271A
Document #: 38-04013 Rev. *B Page 8 of 10
Package Diagrams
51-85014-*B
28-Lead (300-Mil) Molded DIP P21
32-Lead Plastic Leaded Chip Carrier J65
51-85002-*B
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CY7C271A
Document #: 38-04013 Rev. *B Page 9 of 10
© Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any ci rcuitry other th an circuitry embod ied in a Cypr ess Semiconductor pr oduct. Nor does it convey or imply any licen se under p atent or other ri ghts. Cypre ss Semiconductor does not autho rize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
All product and company names mentioned in this document may be the trademarks of their respective holders.
Package Diagrams (continued)
28-Lead
(300-Mil)
Windowed CerDIP W22
MIL-STD-1835 D-15 Config. A
51-80087-**
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CY7C271A
Document #: 38-04013 Rev. *B Page 10 of 10
Document History Page
Document Title: CY7C271A 32K x 8 Power Switched and Reprogrammable PROM
Document Number: 38-04013
REV. ECN NO. Issue
Date Orig. of
Change Description of Change
** 114409 3/26/02 DSG Change from Spec number: 38-00424 to 38-04013
*A 11889 9 9/13/ 02 GBI Update Ordering Information
*B 122254 12/26/02 RBI Add power up requirements to maximum ratings information
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