Semiconductor Components Industries, LLC, 2004
January, 2004 − Rev. 0 Publication Order Number:
IMH20TR1G/D
IMH20TR1G
Dual Bias Resistor
Transistor
NPN Surface Mount
•Low VCC (sat) 80 mV max at IC/IB = 50 mA/2.5 mA
•High Current: IC = 600 mA max
•This is a Pb−Free Device
MAXIMUM RATINGS (TA = 25°C)
Rating Symbol Value Unit
Collector−Base Voltage V(BR)CBO 30 Vdc
Collector−Emitter Voltage V(BR)CEO 15 Vdc
Emitter−Base Voltage V(BR)EBO 5.0 Vdc
Collector Current − Continuous IC600 mAdc
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Power Dissipation* PD300 mW
Junction Temperature TJ150 °C
Storage Temperature Tstg −55 to +150 °C
*Total for both Transistors.
Q1 + Q2: NPN
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
Characteristic Symbol Min Max Unit
Collector−Emitter Breakdown Voltage
(IC = 1.0 mAdc, IB = 0) V(BR)CEO 15 − Vdc
Collector−Base Breakdown Voltage
(IC = 50 Adc, IE = 0) V(BR)CBO 30 − Vdc
Emitter−Base Breakdown Voltage
(IE = 50 Adc, IC = 0) V(BR)EBO 5.0 − Vdc
Collector−Base Cutoff Current
(VCB = 20 Vdc, IE = 0) ICBO − 0.5 Adc
Emitter−Base Cutoff Current
(VEB = 4.0 V, IC = 0) IEBO − 0.5 Adc
DC Current Gain (Note 1)
(VCE = 5.0 Vdc, IC = 50 mAdc) hFE 100 600 −
Collector−Emitter Saturation Voltage
(IC = 50 mAdc, IB = 2.5 mAdc) VCE(sat) − 80 mV
Input Resistance R11.54 2.86 k
1. Pulse Test: Pulse Width ≤ 300 s, D.C. ≤ 2%.
SC−74
MARKING
DIAGRAM
H20 M
H20 = Specific Device Code
M = Date Code
Device Package Shipping†
ORDERING INFORMATION
IMH20TR1G SC−74R 3000/Tape & Reel
Q1
http://onsemi.com
Q2
R1
R1
(4)
(5)
(6)
(1)
(2)
(3)
SC−74R
318AA
Style 21
1
6
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
IMH20TR1G
http://onsemi.com
2
PACKAGE DIMENSIONS
SC−74R
CASE 318AA−01
ISSUE A
23
456
A
L
1
S
GD
B
H
C
0.05 (0.002)
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.1142 0.1220 2.90 3.10
B0.0512 0.0669 1.30 1.70
C0.0354 0.0433 0.90 1.10
D0.0098 0.0197 0.25 0.50
G0.0335 0.0413 0.85 1.05
H0.0005 0.0040 0.013 0.100
J0.0040 0.0102 0.10 0.26
K0.0079 0.0236 0.20 0.60
L0.0493 0.0649 1.25 1.65
M0 10 0 10
S0.0985 0.1181 2.50 3.00
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM LEAD
THICKNESS IS THE MINIMUM THICKNESS
OF BASE MATERIAL.
M
J
KSTYLE 21:
PIN 1. COLLECTOR 1
2. EMITTER 2
3. BASE 2
4. COLLECTOR 2
5. EMITTER 1
6. BASE 1
SC−74R
0.7
0.028
1.9
0.074
0.95
0.037
2.4
0.094
1.0
0.039
0.95
0.037
mm
inches
SCALE 10:1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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Phone: 81−3−5773−3850
IMH20TR1G/D
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