CC1
+VOUT
+
-
-
CF
VIN
+
-
RB1
V+
RB2
CC2
R2
R1
AV = -
R2
100 k:
R1
1 k:
= -100
120
100 10k 1M 100M
FREQUENCY (Hz)
-40
0
60
GAIN (dB)
10M100k
1k
100
80
40
20
-20
PHASE (q)
120
-40
0
60
100
80
40
20
-20
PHASE
GAIN
V+ = 5V
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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,
LMV652
,
LMV654
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LMV65x 12-MHz, Low Voltage, Low Power Amplifiers
1
1 Features
1 Typical 5-V Supply, Unless Otherwise Noted
Specified 3-V and 5-V Performance
Low Power Supply Current
LMV651: 116 μA
LMV652: 118 μA per Amplifier
LMV654: 122 μA per Amplifier
High Unity-Gain Bandwidth: 12 MHz
Maximum Input Offset Voltage: 1.5 mV
CMRR: 100 dB
PSRR: 95 dB
Input Referred Voltage Noise: 17 nV/Hz
Output Swing With 2-kLoad, 120 mV from Rail
Total Harmonic Distortion: 0.003% at 1 kHz, 2 k
Temperature Range: 40°C to 125°C
2 Applications
Portable Equipment
Automotive
Battery-Powered Systems
Sensors and Instrumentation
3 Description
TI’s LMV65x devices are high-performance, low-
power operational amplifier ICs implemented with TI's
advanced VIP50 process. This family of parts
features 12 MHz of bandwidth while consuming only
116 μA of current, which is an exceptional bandwidth
to power ratio in this operational amplifier class. The
LMV65x devices are unity-gain stable and provide an
excellent solution for general-purpose amplification in
low-voltage, low-power applications.
This family of low-voltage, low-power amplifiers
provides superior performance and economy in terms
of power and space usage. These operational
amplifiers have a maximum input offset voltage of 1.5
mV, a rail-to-rail output stage, and an input common-
mode voltage range that includes ground. The
LMV65x provide a PSRR of 95 dB, a CMRR of 100
dB, and a total harmonic distortion (THD) of 0.003%
at 1-kHz frequency and 2-kload.
The operating supply voltage range for this family of
parts is from 2.7 V and 5.5 V. These operational
amplifiers can operate over a wide temperature range
(40°C to 125°C), making them ideal for automotive
applications, sensor applications, and portable
equipment applications. The LMV651 is offered in the
ultra-tiny 5-pin SC70 and 5-pin SOT-23 package. The
LMV652 is offered in an 8-pin VSSOP package. The
LMV654 is offered in a 14-pin TSSOP package.
Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
LMV651 SOT-23 (5) 2.90 mm × 1.60 mm
SC70 (5) 2.00 mm × 1.25 mm
LMV652 VSSOP (8) 3.00 mm × 3.00 mm
LMV654 TSSOP (14) 5.00 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
High Gain Wide Bandwidth Inverting Amplifier Open-Loop Gain and Phase vs Frequency
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Table of Contents
1 Features.................................................................. 1
2 Applications ........................................................... 1
3 Description............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 3-V DC Electrical Characteristics.............................. 5
6.6 5-V DC Electrical Characteristics.............................. 6
6.7 Typical Characteristics.............................................. 7
7 Detailed Description............................................ 13
7.1 Overview................................................................. 13
7.2 Functional Block Diagram....................................... 13
7.3 Feature Description................................................. 13
7.4 Device Functional Modes........................................ 14
8 Application and Implementation ........................ 16
8.1 Application Information............................................ 16
8.2 Typical Applications ................................................ 16
8.3 Dos and Don'ts ....................................................... 18
9 Power Supply Recommendations...................... 18
10 Layout................................................................... 19
10.1 Layout Guidelines ................................................. 19
10.2 Layout Example .................................................... 19
11 Device and Documentation Support................. 20
11.1 Device Support .................................................... 20
11.2 Documentation Support ....................................... 20
11.3 Related Links ........................................................ 20
11.4 Community Resources.......................................... 20
11.5 Trademarks........................................................... 20
11.6 Electrostatic Discharge Caution............................ 20
11.7 Glossary................................................................ 21
12 Mechanical, Packaging, and Orderable
Information........................................................... 21
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision J (March 2013) to Revision K Page
Added ESD Ratings table, Feature Description section, Device Functional Modes,Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section.................................................................................................. 1
Changes from Revision I (March 2012) to Revision J Page
Changed layout of National Data Sheet to TI format ........................................................................................................... 18
3
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5 Pin Configuration and Functions
LMV651 DBV or DCK Package
5-Pin SC70 or SOT-23
Top View LMV652 DGK Package
8-Pin VSSOP
Top View
LMV654 PW Package
14-Pin TSSOP
Top View
Pin Functions: LMV651
PIN I/O DESCRIPTION
NAME NO.
–IN 3 I Inverting Input
+IN 1 I Noninverting Input
OUT 4 O Output
V– 2 P Negative supply input
V+ 5 P Positive Supply Input
Pin Functions: LMV652, LMV654
PIN I/O DESCRIPTION
NAME VSSOP TSSOP
–IN A 2 2 I Inverting input, channel A
+IN A 3 3 I Noninverting input, channel A
–IN B 6 6 I Inverting input, channel B
+IN B 5 5 I Noninverting input, channel B
–IN C 9 I Inverting input, channel C
+IN C 10 I Noninverting input, channel C
–IN D 13 I Inverting input, channel D
+IN D 12 I Noninverting input, channel D
OUT A 1 1 O Output, channel A
OUT B 7 7 O Output, channel B
OUT C 8 O Output, channel C
OUT D 14 O Output, channel D
V– 4 11 P Negative (lowest) power supply
V+ 8 4 P Positive (highest) power supply
4
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(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) The maximum power dissipation is a function of TJ(MAX,θJA, and TA. The maximum allowable power dissipation at any ambient
temperature is PD= (TJ(MAX) - TA)/ θJA. All numbers apply for packages soldered directly onto a PC board.
6 Specifications
6.1 Absolute Maximum Ratings(1)(2)
MIN MAX UNIT
Differential input VID ±0.3
Supply voltage (VS= V+- V) 6
Input or output pin voltage V0.3 V++ 0.3 V
Soldering information Infrared or convection (20 sec) 235 °C
Wave soldering lead temperature (10 sec) 260
Junction temperature(3) 150 °C
Storage temperature, Tstg 65 150 °C
(1) Human Body Model, applicable std. MIL-STD-883, Method 3015.7
(2) Machine Model, applicable std. JESD22-A115-A (ESD MM std. of JEDEC)Field-Induced Charge-Device Model, applicable std. JESD22-
C101-C (ESD FICDM std. of JEDEC).
6.2 ESD Ratings VALUE UNIT
V(ESD) Electrostatic
discharge Human-body model (HBM)(1) ±2000 V
Machine model(2) ±100
6.3 Recommended Operating Conditions MIN MAX UNIT
Temperature 40 125 °C
Supply voltage 2.7 5.5 V
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report, SPRA953.
6.4 Thermal Information
THERMAL METRIC(1)
LMV651 LMV652 LMV653
UNIT
DCK
(SC70) DBV
(SOT-23) DGK
(VSSOP) PW
(TSSOP)
5 PINS 5 PINS 8 PINS 14 PINS
RθJA Junction-to-ambient thermal resistance 303.5 214.2 200.3 134.9 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 135.5 173.3 89.1 60.9 °C/W
RθJB Junction-to-board thermal resistance 81.1 72.5 120.9 77.3 °C/W
ψJT Junction-to-top characterization parameter 8.4 56.7 21.7 11.5 °C/W
ψJB Junction-to-board characterization parameter 80.4 71.9 119.4 76.7 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance n/a n/a n/a n/a °C/W
5
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(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlations using
Statistical Quality Control (SQC) method.
(2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped
production material.
(3) Positive current corresponds to current flowing into the device.
(4) Slew rate is the average of the rising and falling slew rates.
(5) The part is not short-circuit protected and is not recommended for operation with low resistive loads. Typical sourcing and sinking output
current curves are provided in Typical Characteristics and should be consulted before designing for heavy loads.
6.5 3-V DC Electrical Characteristics
Unless otherwise specified, all limits are specified for TA= 25°C, V+= 3 V, V= 0 V, VO= VCM = V+/2, and RL> 1 M.
PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT
VOS Input offset voltage 0.1 ±1.5 mV
Over specified temperature range 2.7
TC VOS Input offset average drift 6.6 μV/°C
IBInput bias current(3) 80 120 nA
IOS Input offset current 2.2 15 nA
CMRR Common-mode rejection ratio 0 VCM2 V 87 100 dB
Over specified temperature range 80
PSRR Power supply rejection ratio 3V+5 V, VCM = 0.5 87 95
dB
Over specified temperature range 81
2.7 V+5.5 V,
VCM = 0.5 87 95
Over specified temperature range 81
CMVR Input common-mode voltage
range CMRR 75 dB 0 2.1 V
CMRR 60 dB, over specified temperature range 0 2.1
AVOL Large signal voltage gain
0.3 VO2.7, RL= 2 kto V+/2 80 85
dB
0.4 VO2.6, RL= 2 kto V+/2, over specified temperature range 76
0.3 VO2.7, RL= 10 kto V+/2 86 93
0.4 VO2.6, RL= 10 kto V+/2, over specified temperature
range 83
VO
Output swing high RL= 2 kto V+/2 80 95
mV from
rail
Over specified temperature range 120
RL= 10 kto V+/2 45 50
Over specified temperature range 60
Output swing low RL= 2 kto V+/2 95 110
Over specified temperature range 125
RL= 10 kto V+/2 60 65
Over specified temperature range 75
ISC Maximum continuous output
current Sourcing(4) 17 mA
Sinking(4) 25
ISSupply current per amplifier
LMV651 115 140
μA
Over specified temperature range 175
LMV652 118 140
Over specified temperature range 175
LMV654 122 140
Over specified temperature range 175
SR Slew rate AV= +1, 10% to 90%(5) 3.0 V/μs
GBW Gain bandwidth product 12 MHz
enInput-referred voltage noise f = 100 kHz 17 nV/Hz
f = 1 kHz 17
inInput-referred current noise f = 100 kHz 0.1 pA/Hz
f = 1 kHz 0.15
THD Total harmonic distortion f = 1 kHz, AV= 2, RL= 2 k0.003%
6
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(1) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlations using
Statistical Quality Control (SQC) method.
(2) Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary
over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped
production material.
(3) Positive current corresponds to current flowing into the device.
(4) The part is not short-circuit protected and is not recommended for operation with low resistive loads. Typical sourcing and sinking output
current curves are provided in Typical Characteristics and should be consulted before designing for heavy loads.
(5) Slew rate is the average of the rising and falling slew rates.
6.6 5-V DC Electrical Characteristics
Unless otherwise specified, all limits are specified for TJ= 25°C, V+= 5 V, V= 0 V, VO= VCM = V+/2, and RL> 1 M.
PARAMETER TEST CONDITIONS MIN(1) TYP(2) MAX(1) UNIT
VOS Input offset voltage 0.1 ±1.5 mV
Over specified temperature range 2.7
TC VOS Input offset average drift 6.6 μV/°C
IBInput bias current See(3) 80 120 nA
IOS Input offset current 2.2 15 nA
CMRR Common-mode rejection ratio 0 VCM4 V 90 100 dB
Over specified temperature range 83
PSRR Power supply rejection ratio 3 V V+5 V, VCM = 0.5 V 87 95
dB
Over specified temperature range 81
2.7 V V+5.5 V, VCM =
0.5 V 87 95
Over specified temperature range 81
CMVR Input common-mode voltage
range CMRR 80 dB 0 4.1 V
CMRR 68 dB, over specified temperature range 0 4.1
AVOL Large signal voltage gain
0.3 VO4.7 V, RL= 2 kto V+/2 79 84
dB
0.4 VO4.6 V, RL= 2 kto V+/2, over specified temperature range 76
0.3 VO4.7 V, RL= 10 kto V+/2 87 94
0.4 VO4.6 V, RL= 10 kto V+/2, over specified temperature
range 84
VO
Output swing high RL= 2 kto V+/2 120 140
mV from
rail
Over specified temperature range 185
RL= 10 kto V+/2 75 90
Over specified temperature range 120
Output swing low RL= 2 kto V+/2 110 130
Over specified temperature range 150
RL= 10 kto V+/2 70 80
Over specified temperature range 95
ISC Maximum continuous output
current Sourcing(4) 18.5 mA
Sinking(4) 25
ISSupply current per amplifier
LMV651 116 140
μA
Over specified temperature range 175
LMV652 118 140
Over specified temperature range 175
LMV654 122 140
Over specified temperature range 175
SR Slew rate AV= +1, VO= 1 VPP, 10% to 90%(5) 3.0 V/μs
GBW Gain bandwidth product 12 MHz
enInput-referred voltage noise f = 100 kHz 17 nV/Hz
f = 1 kHz 17
inInput-referred current noise f = 100 kHz 0.1 pA/Hz
f = 1 kHz 0.15
THD Total harmonic distortion f = 1 kHz, AV= 2, RL= 2 k0.003%
0 1 2 3 4 5
-1
-0.75
-0.5
-0.25
0
0.25
0.5
0.75
1
VOS (mV)
VCM (V)
125°C
25°C
-40°C
VS = 5V
-40°C
2.7 3.2 3.7 4.2 4.7 5.2
-1
-0.75
-0.5
-0.25
0
0.25
1
VOS (mV)
VS (V)
0.5
0.75 125°C
25°C
5.5
0 0.5 1 1.5 2 2.5
-1
-0.75
-0.5
-0.25
0
0.25
0.5
0.75
1
VOS (mV)
VCM (V)
125°C
25°C
-40°C
VS = 3V
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6.7 Typical Characteristics
Unless otherwise specified, TA= 25°C, VS= 5 V, V+= 5 V, V= 0 V, VCM= VS/2
Figure 1. Supply Current vs Supply Voltage (LMV651) Figure 2. Supply Current per Channel vs Supply Voltage
(LMV652)
Figure 3. Supply Current per Channel vs Supply Voltage
(LMV654) Figure 4. VOS vs VCM
Figure 5. VOS vs VCM Figure 6. VOS vs Supply Voltage
33.4 3.8 4.2 4.6 5
0
30
60
90
120
150
VOUT FROM RAIL (mV)
VS (V)
-40°C 25°C
125°C
RL = 2 k:
25°C
33.4 3.8 4.2 4.6 5
0
20
40
60
80
100
VOUT FROM RAIL (mV)
VS (V)
-40°C
125°C
RL = 10 k:
33.4 3.8 4.2 4.6 5
0
30
60
90
120
150
VOUT FROM RAIL (mV)
VS (V)
-40°C
25°C
125°C
RL = 2 k:
2.7 3.2 3.7 4.2 4.7 5.2
VS (V)
50
60
70
80
90
100
IBIAS (nA)
-40°C
25°C
125°C
5.5
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Typical Characteristics (continued)
Unless otherwise specified, TA= 25°C, VS= 5 V, V+= 5 V, V= 0 V, VCM= VS/2
Figure 7. IBIAS vs VCM Figure 8. IBIAS vs VCM
Figure 9. IBIAS vs Supply Voltage Figure 10. Positive Output Swing vs Supply Voltage
Figure 11. Negative Output Swing vs Supply Voltage Figure 12. Positive Output Swing vs Supply Voltage
180
100 10k 1M 100M
FREQUENCY (Hz)
-60
0
90
GAIN (dB)
10M100k
1k
150
120
60
30
-30
180
-60
0
90
150
120
60
30
-30
PHASE (°)
PHASE
GAIN
CL = 20 pF
CL = 100 pF
RL = 2 k:
CL = 100 pF
CL = 50 pF
CL = 50 pF
00.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4
VOUT FROM RAIL (V)
0
10
20
30
40
50
ISINK (mA)
VS = 5V
125°C
25°C
-40°C
0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45
0
10
20
30
40
50
ISINK (mA)
VOUT FROM RAIL (V)
25°C
-40°C
125°C
VS = 5V
3 3.4 3.8 4.2 4.6 5
0
15
30
45
60
75
90
VOUT FROM RAIL (mV)
VS (V)
-40°C 25°C
125°C
RL = 10 k:
125°C
-40°C
00.25 0.5 0.75 1 1.25 1.5
VOUT FROM RAIL (V)
0
5
10
15
20
25
30
ISOURCE (mA)
25°C
VS = 5V
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Typical Characteristics (continued)
Unless otherwise specified, TA= 25°C, VS= 5 V, V+= 5 V, V= 0 V, VCM= VS/2
Figure 13. Negative Output Swing vs Supply Voltage Figure 14. Sourcing Current vs Output Voltage
Figure 15. Sinking Current vs Output Voltage (LMV651) Figure 16. Sinking Current vs Output Voltage (LMV652)
Figure 17. Sinking Current vs Output Voltage (LMV654) Figure 18. Open-Loop Gain and Phase With Capacitive Load
0.001 0.01 0.1 1 10
VOUT (V)
0.0001
0.001
0.01
0.1
1
THD+N (%)
VS = 3V
VIN = 1 kHz
AV = +2
RL = 2 k:
RL = 100 k:
SINE WAVE
110 100 10k 100k
FREQUENCY (Hz)
1
10
100
1k
INPUT REFERRED VOLTAGE NOISE
HZ)
(nV/
110 100 1k 100k
FREQUENCY (Hz)
0.01
0.10
1
10
10k
INPUT REFERRED CURRENT NOISE
HZ)
(pA/
180
100 10k 1M 100M
FREQUENCY (Hz)
-60
0
90
GAIN (dB)
10M100k
1k
150
120
60
30
-30
180
-60
0
90
150
120
60
30
-30
PHASE (°)
PHASE
GAIN
RL = 2 k:
CL = 20 pF
RL = 10:
RL = 2 k:
CL (pF)
10 100 1000
0
10
20
30
40
50
60
PHASE MARGIN (°)
VS = 3V
VS = 5V
RL = 2 k:
10
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Typical Characteristics (continued)
Unless otherwise specified, TA= 25°C, VS= 5 V, V+= 5 V, V= 0 V, VCM= VS/2
Figure 19. Open-Loop Gain and Phase With Resistive Load Figure 20. Phase Margin vs Capacitive Load (Stability)
Figure 21. Input-Referred Voltage Noise vs Frequency Figure 22. Input-Referred Current Noise vs Frequency
Figure 23. Slew Rate vs Supply Voltage Figure 24. THD+N vs VOUT
-30
-25
-20
-15
-10
-5
30
VOUT (mV)
0
5
10
15
20
25
TIME (Ps)
020 40 60 70 80
VS = 5V
CL = 125 pF, AV = +1
VIN = 20 mVPP, 20 kHz
10 100 1k 10k 100k
FREQUENCY (Hz)
0.0001
0.001
0.01
0.1
THD+N (%)
VS = 5V
VIN = 2 VPP
AV = +2 RL = 2 k:
RL = 100 k:
0.001 0.01 0.1 1 10
VOUT (V)
0.001
0.01
0.1
1
THD+N (%)
VS = 5V
VIN = 1 kHz
AV = +2
RL = 2 k:
RL = 100 k:
SINE WAVE
10 100 1k 10k 100k
FREQUENCY (Hz)
0.001
0.01
0.1
1
THD+N (%)
VS = 3V
VIN = 1 VPP
AV = +2
RL = 2 k:
RL = 100 k:
11
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Typical Characteristics (continued)
Unless otherwise specified, TA= 25°C, VS= 5 V, V+= 5 V, V= 0 V, VCM= VS/2
Figure 25. THD+N vs VOUT Figure 26. THD+N vs Frequency
Figure 27. THD+N vs Frequency Figure 28. Small Signal Transient Response
Figure 29. Small Signal Transient Response Figure 30. Large Signal Transient Response
10 1k 1M
0.01
100
1000
ZOUT (W)
10M
10k
100 100M
FREQUENCY (Hz)
100k
10
1
0.1
120
10 1k 100k 10M
FREQUENCY (Hz)
0
80
PSRR (dB)
1M
10k
100
100
60
40
20
VS = 3V, -PSRR
VS = 5V, -PSRR
VS = 3V, +PSRR
VS = 5V, +PSRR
10 1k 1M
FREQUENCY (Hz)
0
40
120
CMRR (dB)
100k
10k
100
100
60
20
80
12
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Typical Characteristics (continued)
Unless otherwise specified, TA= 25°C, VS= 5 V, V+= 5 V, V= 0 V, VCM= VS/2
Figure 31. PSRR vs Frequency Figure 32. CMRR vs Frequency
Figure 33. Closed-Loop Output Impedance vs Frequency
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7 Detailed Description
7.1 Overview
TI’s LMV65x devices have 12 MHz of bandwidth, are unity-gain stable, and consume only 116 μA of current.
They also have a maximum input offset voltage of 1.5 mV, a rail-to-rail output stage, and an input common-mode
voltage range that includes ground. Lastly, these operational amplifiers provide a PSRR of 95 dB, a CMRR of
100 dB, and a total harmonic distortion (THD) of 0.003% at 1-kHz frequency and 2-kload.
7.2 Functional Block Diagram
(Each Amplifier)
7.3 Feature Description
7.3.1 Low Voltage and Low Power Operation
The LMV65x have performance specified at supply voltages of 3 V and 5 V. These parts are specified to be
operational at all supply voltages between 2.7 V and 5.5 V. The LMV651 draws a low supply current of 116 μA,
the LMV652 draws 118 μA/channel and the LMV654 draws 122 μA/channel. This family of operational amplifiers
provides the low voltage and low power amplification that is essential for portable applications.
7.3.2 Wide Bandwidth
Despite drawing the very low supply current of 116 µA, the LMV65x manage to provide a wide unity-gain
bandwidth of 12 MHz. This is easily one of the best bandwidth to power ratios ever achieved, and allows these
operational amplifiers to provide wideband amplification while using the minimum amount of power. This makes
this family of parts ideal for low-power signal processing applications such as portable media players and other
accessories.
7.3.3 Low Input Referred Noise
The LMV65x provides a flatband input referred voltage noise density of 17 nV/Hz, which is significantly better
than the noise performance expected from a low-power operational amplifiers. These operational amplifiers also
feature exceptionally low 1/f noise, with a very low 1/f noise corner frequency of 4 Hz. This makes these parts
ideal for low power applications which require decent noise performance, such as PDAs and portable sensors.
7.3.4 Ground Sensing and Rail-to-Rail Output
The LMV65x each have a rail-to-rail output stage, which provides the maximum possible output dynamic range.
This is especially important for applications requiring a large output swing. The input common-mode range of this
family of devices includes the negative supply rail which allows direct sensing at ground in a single-supply
operation.
7.3.5 Small Size
The small footprint of the packages for the LMV65x saves space on printed-circuit boards, and enables the
design of smaller and more compact electronic products. Long traces between the signal source and the
operational amplifier make the signal path susceptible to noise. By using a physically smaller package, these
operational amplifiers can be placed closer to the signal source, reducing noise pickup and enhancing signal
integrity.
ROUT
-
+
VIN
RF
CF
RIN
RL
CL
RS
0
UNSTABLE
ROC = 40 dB/decade
STABLE
ROC ± 20 dB/decade
FREQUENCY (Hz)
GAIN
14
LMV651
,
LMV652
,
LMV654
SNOSAI7K SEPTEMBER 2005REVISED MAY 2016
www.ti.com
Product Folder Links: LMV651 LMV652 LMV654
Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated
7.4 Device Functional Modes
7.4.1 Stability and Capacitive Loading
If the phase margin of the LMV65x is plotted with respect to the capacitive load (CL) at its output, it is seen that
the phase margin reduces significantly if CLis increased beyond 100 pF. This is because the operational
amplifier is designed to provide the maximum bandwidth possible for a low supply current. Stabilizing it for higher
capacitive loads would have required either a drastic increase in supply current, or a large internal compensation
capacitance, which would have reduced the bandwidth of the operational amplifier. Hence, if these devices are to
be used for driving higher capacitive loads, they would have to be externally compensated.
Figure 34. Gain vs Frequency for an Operational Amplifiers
An operational amplifier, ideally, has a dominant pole close to DC, which causes its gain to decay at the rate of
20 dB/decade with respect to frequency. If this rate of decay, also known as the rate of closure (ROC), remains
the same until the unity-gain bandwidth of the operational amplifiers is stable. If, however, a large capacitance is
added to the output of the operational amplifier, it combines with the output impedance of the operational
amplifier to create another pole in its frequency response before its unity-gain frequency (see Figure 34). This
increases the ROC to 40 dB/decade and causes instability.
In such a case a number of techniques can be used to restore stability to the circuit. The idea behind all these
schemes is to modify the frequency response such that it can be restored to an ROC of 20 dB/decade, which
ensures stability.
7.4.2 In The Loop Compensation
Figure 35 illustrates a compensation technique, known as in-the-loop compensation, that employs an RC