2 Mbit / 4 Mbit (x8) Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet GLS29SF/VF020 / 0402Mb / 4Mb (x8) Byte-Program, Small-Sector flash memories FEATURES: * Organized as 256K x8 / 512K x8 * Single Voltage Read and Write Operations - 4.5-5.5V for GLS29SF020/040 - 2.7-3.6V for GLS29VF020/040 * Superior Reliability - Endurance: 100,000 Cycles (typical) - Greater than 100 years Data Retention * Low Power Consumption: - Active Current: 10 mA (typical) - Standby Current: 30 A (typical) for GLS29SF020/040 1 A (typical) for GLS29VF020/040 * Sector-Erase Capability - Uniform 128 Byte sectors * Fast Read Access Time: - 55 ns for GLS29SF020/040 - 70 ns for GLS29VF020/040 * Latched Address and Data * Fast Erase and Byte-Program: - Sector-Erase Time: 18 ms (typical) - Chip-Erase Time: 70 ms (typical) - Byte-Program Time: 14 s (typical) - Chip Rewrite Time: 4 seconds (typical) for GLS29SF/VF020 8 seconds (typical) for GLS29SF/VF040 * Automatic Write Timing - Internal VPP Generation * End-of-Write Detection - Toggle Bit - Data# Polling * TTL I/O Compatibility for GLS29SF020/040 * CMOS I/O Compatibility for GLS29VF020/040 * JEDEC Standard - Flash EEPROM Pinouts and command sets * Packages Available - 32-lead PLCC - 32-lead TSOP (8mm x 14mm) * All non-Pb (lead-free) devices are RoHS compliant PRODUCT DESCRIPTION The GLS29SF020/040 and GLS29VF020/040 are 256K x8 / 512K x8 CMOS Small-Sector Flash (SSF) manufactured with high-performance SuperFlash technology. The split-gate cell design and thick-oxide tunneling injector attain better reliability and manufacturability compared with alternate approaches. The GLS29SF020/040 devices write (Program or Erase) with a 4.5-5.5V power supply. The GLS29VF020/040 devices write (Program or Erase) with a 2.7-3.6V power supply. These devices conform to JEDEC standard pin assignments for x8 memories. Featuring high performance Byte-Program, the GLS29SF020/040 and GLS29VF020/040 devices provide a maximum Byte-Program time of 20 sec. To protect against inadvertent write, they have on-chip hardware and Software Data Protection schemes. Designed, manufactured, and tested for a wide spectrum of applications, these devices are offered with a guaranteed endurance of at least 10,000 cycles. Data retention is rated at greater than 100 years. (c)2010 Greenliant Systems, Ltd. The GLS29SF020/040 and GLS29VF020/040 devices are suited for applications that require convenient and economical updating of program, configuration, or data memory. For all system applications, they significantly improve performance and reliability, while lowering power consumption. They inherently use less energy during Erase and Program than alternative flash technologies. The total energy consumed is a function of the applied voltage, current, and time of application. Since for any given voltage range, the SuperFlash technology uses less current to program and has a shorter erase time, the total energy consumed during any Erase or Program operation is less than alternative flash technologies. They also improve flexibility while lowering the cost for program, data, and configuration storage applications. The SuperFlash technology provides fixed Erase and Program times independent of the number of Erase/Program cycles that have occurred. Therefore, the system software or hardware does not have to be modified or de-rated as is necessary with alternative flash technologies, whose Erase and Program times increase with accumulated Erase/Program cycles. www.greenliant.com S71160-15-00005/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet Sector-Erase Operation To meet high density, surface mount requirements, the GLS29SF020/040 and GLS29VF020/040 devices are offered in 32-lead PLCC and 32-lead TSOP packages. The pin assignments are shown in Figures 2 and 3. The Sector-Erase operation allows the system to erase the device on a sector-by-sector basis. The GLS29SF020/ 040 and GLS29VF020/040 offer Sector-Erase mode. The sector architecture is based on uniform sector size of 128 Bytes. The Sector-Erase operation is initiated by executing a six-byte command sequence with Sector-Erase command (20H) and sector address (SA) in the last bus cycle. The sector address is latched on the falling edge of the sixth WE# pulse, while the command (20H) is latched on the rising edge of the sixth WE# pulse. The internal Erase operation begins after the sixth WE# pulse. The End-ofErase operation can be determined using either Data# Polling or Toggle Bit methods. For timing waveforms, see Figure 9. Any commands issued during the Sector-Erase operation are ignored. Device Operation Commands are used to initiate the memory operation functions of the device. Commands are written to the device using standard microprocessor write sequences. A command is written by asserting WE# low while keeping CE# low. The address bus is latched on the falling edge of WE# or CE#, whichever occurs last. The data bus is latched on the rising edge of WE# or CE#, whichever occurs first. Read The Read operation of the GLS29SF020/040 and GLS29VF020/040 devices are controlled by CE# and OE#, both have to be low for the system to obtain data from the outputs. CE# is used for device selection. When CE# is high, the chip is deselected and only standby power is consumed. OE# is the output control and is used to gate data from the output pins. The data bus is in high impedance state when either CE# or OE# is high. Refer to the Read cycle timing diagram in Figure 4 for further details. Chip-Erase Operation The GLS29SF020/040 and GLS29VF020/040 devices provide a Chip-Erase operation, which allows the user to erase the entire memory array to the "1s" state. This is useful when the entire device must be quickly erased. The Chip-Erase operation is initiated by executing a sixbyte Software Data Protection command sequence with Chip-Erase command (10H) with address 555H in the last byte sequence. The internal Erase operation begins with the rising edge of the sixth WE# or CE#, whichever occurs first. During the internal Erase operation, the only valid read is Toggle Bit or Data# Polling. See Table 4 for the command sequence, Figure 10 for the timing diagram, and Figure 19 for the flowchart. Any commands written during the Chip-Erase operation will be ignored. Byte-Program Operation The GLS29SF020/040 and GLS29VF020/040 devices are programmed on a byte-by-byte basis. Before programming, the sector where the byte exists must be fully erased. The Program operation is accomplished in three steps. The first step is the three-byte load sequence for Software Data Protection. The second step is to load byte address and byte data. During the Byte-Program operation, the addresses are latched on the falling edge of either CE# or WE#, whichever occurs last. The data is latched on the rising edge of either CE# or WE#, whichever occurs first. The third step is the internal Program operation which is initiated after the rising edge of the fourth WE# or CE#, whichever occurs first. The Program operation, once initiated, will be completed, within 20 s. See Figures 5 and 6 for WE# and CE# controlled Program operation timing diagrams and Figure 16 for flowcharts. During the Program operation, the only valid reads are Data# Polling and Toggle Bit. During the internal Program operation, the host is free to perform additional tasks. Any commands written during the internal Program operation will be ignored. (c)2010 Greenliant Systems, Ltd. Write Operation Status Detection The GLS29SF020/040 and GLS29VF020/040 devices provide two software means to detect the completion of a Write (Program or Erase) cycle, in order to optimize the system Write cycle time. The software detection includes two status bits: Data# Polling (DQ7) and Toggle Bit (DQ6). The End-of-Write detection mode is enabled after the rising edge of WE# which initiates the internal Program or Erase operation. The actual completion of the nonvolatile write is asynchronous with the system; therefore, either a Data# Polling or Toggle Bit read may be simultaneous with the completion of the Write cycle. If this occurs, the system may possibly get an erroneous result, i.e., valid data may appear to conflict with either DQ7 or DQ6. In order to pre- 2 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet Hardware Data Protection vent spurious rejection, if an erroneous result occurs, the software routine should include a loop to read the accessed location an additional two (2) times. If both reads are valid, then the device has completed the Write cycle, otherwise the rejection is valid. Noise/Glitch Protection: A WE# or CE# pulse of less than 5 ns will not initiate a Write cycle. VDD Power Up/Down Detection: The Write operation is inhibited when VDD is less than 2.5V for GLS29SF020/ 040. The Write operation is inhibited when VDD is less than 1.5V. for GLS29VF020/040. Data# Polling (DQ7) When the GLS29SF020/040 and GLS29VF020/040 devices are in the internal Program operation, any attempt to read DQ7 will produce the complement of the true data. Once the Program operation is completed, DQ7 will produce true data. Note that even though DQ7 may have valid data immediately following the completion of an internal Write operation, the remaining data outputs may still be invalid: valid data on the entire data bus will appear in subsequent successive Read cycles after an interval of 1 s. During internal Erase operation, any attempt to read DQ7 will produce a `0'. Once the internal Erase operation is completed, DQ7 will produce a `1'. The Data# Polling is valid after the rising edge of fourth WE# (or CE#) pulse for Program operation. For Sector- or Chip-Erase, the Data# Polling is valid after the rising edge of sixth WE# (or CE#) pulse. See Figure 7 for Data# Polling timing diagram and Figure 17 for a flowchart. Write Inhibit Mode: Forcing OE# low, CE# high, or WE# high will inhibit the Write operation. This prevents inadvertent writes during power-up or power-down. Software Data Protection (SDP) The GLS29SF020/040 and GLS29VF020/040 provide the JEDEC approved Software Data Protection scheme for all data alteration operations, i.e., Program and Erase. Any Program operation requires the inclusion of a series of three- byte sequence. The three-byte load sequence is used to initiate the Program operation, providing optimal protection from inadvertent Write operations, e.g., during the system power-up or power-down. Any Erase operation requires the inclusion of a six-byte load sequence. These devices are shipped with the Software Data Protection permanently enabled. The specific software command codes are shown in Table 4. During SDP command sequence, invalid commands will abort the device to read mode, within TRC. Toggle Bit (DQ6) During the internal Program or Erase operation, any consecutive attempts to read DQ6 will produce alternating `0's and `1's, i.e., toggling between 0 and 1. When the internal Program or Erase operation is completed, the toggling will stop. The device is then ready for the next operation. The Toggle Bit is valid after the rising edge of fourth WE# (or CE#) pulse for Program operation. For Sector or ChipErase, the Toggle Bit is valid after the rising edge of sixth WE# (or CE#) pulse. See Figure 8 for Toggle Bit timing diagram and Figure 17 for a flowchart. Product Identification The Product Identification mode identifies the devices as GLS29SF020, GLS29SF040 and GLS29VF020, GLS29VF040 and manufacturer as Greenliant. This mode may be accessed by software operations. Users may use the Software Product Identification operation to identify the part (i.e., using the device ID) when using multiple manufacturers in the same socket. For details, see Table 4 for Data Protection The GLS29SF020/040 and GLS29VF020/040 devices provide both hardware and software features to protect nonvolatile data from inadvertent writes. (c)2010 Greenliant Systems, Ltd. 3 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet Product Identification Mode Exit/Reset software operation, Figure 11 for the Software ID Entry and Read timing diagram, and Figure 18 for the Software ID Entry command sequence flowchart. In order to return to the standard Read mode, the Software Product Identification mode must be exited. Exit is accomplished by issuing the Software ID Exit command sequence, which returns the device to the Read operation. Please note that the Software ID Exit command is ignored during an internal Program or Erase operation. See Table 4 for software command codes, Figure 12 for timing waveform, and Figure 18 for a flowchart. TABLE 1: Product Identification Address Data 0000H BFH GLS29SF020 0001H 24H GLS29VF020 0001H 25H GLS29SF040 0001H 13H GLS29VF040 0001H 14H Manufacturer's ID Device ID T1.3 1160 SuperFlash Memory X-Decoder Memory Address Address Buffers & Latches Y-Decoder CE# OE# I/O Buffers and Data Latches Control Logic WE# DQ7 - DQ0 1160 B1.0 FIGURE 1: Functional Block Diagram (c)2010 Greenliant Systems, Ltd. 4 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 A0 DQ0 A17 A17 25 A11 A11 24 OE# OE# 11 23 A10 A10 A0 12 22 CE# CE# DQ0 13 21 DQ7 DQ7 GLS29SF/VF040 14 15 16 17 18 19 20 DQ6 A1 WE# A9 32-lead PLCC Top View DQ6 A2 A1 WE# A8 A9 DQ5 A2 10 VDD A8 26 DQ5 9 VDD 27 8 DQ4 A3 A18 7 DQ4 A3 NC A13 DQ3 A4 A16 A14 A13 DQ3 A5 A4 A16 A14 28 VSS A5 A15 29 32 31 30 VSS 6 A15 GLS29SF/VF040 1 DQ2 5 A6 A12 GLS29SF/VF020 2 DQ2 A7 A6 3 DQ1 A7 4 DQ1 GLS29SF/VF020 GLS29SF/VF020 GLS29SF/VF040 A12 GLS29SF/VF020 GLS29SF/VF040 Data Sheet 1160 32-plcc NH P1.2 FIGURE 2: Pin Assignments for 32-lead PLCC GLS29SF/VF040 GLS29SF/VF020 A11 A9 A8 A13 A14 A17 WE# VDD A18 A16 A15 A12 A7 A6 A5 A4 A11 A9 A8 A13 A14 A17 WE# VDD NC A16 A15 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 GLS29SF/VF020 GLS29SF/VF04 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 Standard Pinout Top View Die Up OE# A10 CE# DQ7 DQ6 DQ5 DQ4 DQ3 VSS DQ2 DQ1 DQ0 A0 A1 A2 A3 OE# A10 CE# DQ7 DQ6 DQ5 DQ4 DQ3 VSS DQ2 DQ1 DQ0 A0 A1 A2 A3 1160 32-tsopWH P2.2 FIGURE 3: Pin Assignments for 32-lead TSOP (8mm x 14mm) (c)2010 Greenliant Systems, Ltd. 5 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet TABLE 2: Pin Description Symbol Pin Name Functions AMS1-A0 Address Inputs To provide memory addresses. During Sector-Erase AMS-A8 address lines will select the sector. DQ7-DQ0 Data Input/output To output data during Read cycles and receive input data during Write cycles. Data is internally latched during a Write cycle. The outputs are in tri-state when OE# or CE# is high. CE# Chip Enable To activate the device when CE# is low. OE# Output Enable To gate the data output buffers. WE# Write Enable To control the Write operations. VDD Power Supply To provide power supply voltage: VSS Ground NC No Connection 4.5-5.5V for GLS29SF020/040 2.7-3.6V for GLS29VF020/040 Pin not connected internally T2.5 1160 1. AMS = Most significant address AMS = A17 for GLS29SF/VF020 and A18 for GLS29SF/VF040 TABLE 3: Operation Modes Selection Mode CE# OE# WE# DQ Address Read VIL VIL VIH DOUT AIN Program VIL VIH VIL DIN AIN Erase VIL VIH VIL X1 Sector address, XXH for Chip-Erase Standby VIH X X High Z X X VIL X High Z/ DOUT X X X VIH High Z/ DOUT X VIL VIL VIH Write Inhibit Product Identification Software Mode See Table 4 T3.4 1160 1. X can be VIL or VIH, but no other value. (c)2010 Greenliant Systems, Ltd. 6 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet TABLE 4: Software Command Sequence Command Sequence 1st Bus Write Cycle Addr1 Data 2nd Bus Write Cycle Addr1 Data 3rd Bus Write Cycle Addr1 4th Bus Write Cycle Data Addr1 Data Data 5th Bus Write Cycle 6th Bus Write Cycle Addr1 Data Addr1 Data Byte-Program 555H AAH 2AAH 55H 555H A0H BA2 Sector-Erase 555H AAH 2AAH 55H 555H 80H 555H AAH 2AAH 55H SAX3 20H Chip-Erase 555H AAH 2AAH 55H 555H 80H 555H AAH 2AAH 55H 555H 10H Software ID Entry4,5 555H AAH 2AAH 55H 555H 90H 2AAH 55H 555H F0H Software ID Exit6 XXH F0H Software ID Exit6 555H AAH T4.7 1160 1. Address format A14-A0 (Hex), Addresses A15-AMS can be VIL or VIH, but no other value, for the Command sequence for GLS29SF/VF020/040. AMS = Most significant address AMS = A17 for GLS29SF/VF020 and A18 for GLS29SF/VF040. 2. BA = Program Byte address 3. SAX for Sector-Erase; uses AMS-A7 address lines for GLS29SF/VF020/040 4. The device does not remain in Software Product ID mode if powered down. 5. With AMS-A1 = 0; Greenliant Manufacturer's ID = BFH, is read with A0 = 0, GLS29SF020 Device ID = 24H, is read with A0 = 1 GLS29VF020 Device ID = 25H, is read with A0 = 1 GLS29SF040 Device ID = 13H, is read with A0 = 1 GLS29VF040 Device ID = 14H, is read with A0 = 1 6. Both Software ID Exit operations are equivalent (c)2010 Greenliant Systems, Ltd. 7 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet Absolute Maximum Stress Ratings (Applied conditions greater than those listed under "Absolute Maximum Stress Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these conditions or conditions greater than those defined in the operational sections of this data sheet is not implied. Exposure to absolute maximum stress rating conditions may affect device reliability.) Temperature Under Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55C to +125C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to +150C D. C. Voltage on Any Pin to Ground Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to VDD+0.5V Transient Voltage (<20 ns) on Any Pin to Ground Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -2.0V to VDD+2.0V Voltage on A9 Pin to Ground Potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 13.2V Package Power Dissipation Capability (TA = 25C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0W Through Hole Lead Soldering Temperature (10 Seconds) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300C Surface Mount Solder Reflow Temperature1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C for 10 seconds Output Short Circuit Current2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA 1. Excluding certain with-Pb 32-PLCC units, all packages are 260C capable in both non-Pb and with-Pb solder versions. Certain with-Pb 32-PLCC package types are capable of 240C for 10 seconds; please consult the factory for the latest information. 2. Outputs shorted for no more than one second. No more than one output shorted at a time. Operating Range for GLS29SF020/040 Range Commercial Industrial Operating Range for GLS29VF020/040 Ambient Temp VDD Range 0C to +70C 4.5-5.5V Commercial -40C to +85C 4.5-5.5V Industrial Ambient Temp VDD 0C to +70C 2.7-3.6V -40C to +85C 2.7-3.6V AC Conditions of Test Input Rise/Fall Time . . . . . . . . . . . . . . 5 ns Output Load . . . . . . . . . . . . . . . . . . . . . CL = 30 pF for 55 ns Output Load . . . . . . . . . . . . . . . . . . . . . CL = 100 pF for 70 ns See Figures 13, 14, and 15 TABLE 5: DC Operating Characteristics VDD = 4.5-5.5V for GLS29SF020/040 Limits Symbol Parameter IDD Power Supply Current Min Max Units Test Conditions Address input=VIL/VIH, at f=1/TRC Min VDD=VDD Max Read 25 mA CE#=OE#=VIL, WE#=VIH, all I/Os open Write 30 mA CE#=WE#=VIL, OE#=VIH 3 mA CE#=VIH, VDD=VDD Max 100 A CE#=VIHC, VDD=VDD Max ISB1 Standby VDD Current (TTL input) ISB2 Standby VDD Current (CMOS input) ILI Input Leakage Current 1 A VIN=GND to VDD, VDD=VDD Max ILO Output Leakage Current 10 A VOUT=GND to VDD, VDD=VDD Max VIL Input Low Voltage VIH Input High Voltage VIHC Input High Voltage (CMOS) VOL Output Low Voltage VOH Output High Voltage 0.8 2.0 VDD-0.3 0.4 2.4 V VDD=VDD Min V VDD=VDD Max V VDD=VDD Max V IOL=2.1 A, VDD=VDD Min V IOH=-400 A, VDD=VDD Min T5.7 1160 (c)2010 Greenliant Systems, Ltd. 8 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet (c)2010 Greenliant Systems, Ltd. 9 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet TABLE 6: DC Operating Characteristics VDD = 2.7-3.6V for GLS29VF020/040 Limits Symbol Parameter IDD Power Supply Current Min Max Units Test Conditions Address input=VIL/VIH, at f=1/TRC Min VDD=VDD Max Read 25 mA CE#=OE#=VIL, WE#=VIH, all I/Os open Write 30 mA CE#=WE#=VIL, OE#=VIH ISB Standby VDD Current 30 A CE#=VIHC, VDD=VDD Max ILI Input Leakage Current 1 A VIN=GND to VDD, VDD=VDD Max ILO Output Leakage Current 10 A VOUT=GND to VDD, VDD=VDD Max VIL Input Low Voltage 0.8 V VDD=VDD Min VIH Input High Voltage 0.7VDD V VDD=VDD Max VIHC Input High Voltage (CMOS) VDD-0.3 V VDD=VDD Max VOL Output Low Voltage V IOL=100 A, VDD=VDD Min VOH Output High Voltage V IOH=-100 A, VDD=VDD Min 0.2 VDD-0.2 T6.9 1160 TABLE 7: Recommended System Power-up Timings Symbol Parameter Minimum Units TPU-READ1 Power-up to Read Operation 100 s TPU-WRITE1 Power-up to Program/Erase Operation 100 s 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. T7.1 1160 TABLE 8: Capacitance (TA = 25C, f=1 Mhz, other pins open) Parameter CI/O 1 CIN1 Description Test Condition Maximum I/O Pin Capacitance VI/O = 0V 12 pF Input Capacitance VIN = 0V 6 pF 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. T8.1 1160 TABLE 9: Reliability Characteristics Symbol NEND 1 Parameter Minimum Specification Units Endurance 10,000 Cycles JEDEC Standard A117 100 Years JEDEC Standard A103 100 + IDD mA TDR1 Data Retention ILTH1 Latch Up Test Method JEDEC Standard 78 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. (c)2010 Greenliant Systems, Ltd. 10 S71160-15-000 T9.2 1160 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet AC CHARACTERISTICS TABLE 10: Read Cycle Timing Parameters VDD = 4.5-5.5V for GLS29SF020/040 and 2.7-3.6V for GLS29VF020/040 GLS29SF020/040-55 GLS29VF020/040-70 Symbol Parameter TRC Read Cycle Time TCE Chip Enable Access Time 55 70 ns TAA Address Access Time 55 70 ns TOE Output Enable Access Time 30 35 ns TCLZ1 TOLZ1 TCHZ1 TOHZ1 TOH1 CE# Low to Active Output 0 0 ns OE# Low to Active Output 0 0 ns Min Max 55 Min Max Units 70 ns CE# High to High-Z Output 20 25 ns OE# High to High-Z Output 20 25 ns Output Hold from Address Change 0 0 ns 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. T10.10 1160 TABLE 11: Program/Erase Cycle Timing Parameters VDD = 4.5-5.5V for GLS29SF020/040 and 2.7-3.6V for GLS29VF020/040 Symbol Parameter TBP Byte-Program Time Min Max Units 20 s TAS Address Setup Time 0 ns TAH Address Hold Time 30 ns TCS WE# and CE# Setup Time 0 ns TCH WE# and CE# Hold Time 0 ns TOES OE# High Setup Time 0 ns TOEH OE# High Hold Time 10 ns TCP CE# Pulse Width 40 ns TWP WE# Pulse Width 40 ns TWPH1 WE# Pulse Width High 30 ns TCPH1 CE# Pulse Width High 30 ns TDS Data Setup Time 40 ns TDH1 Data Hold Time 0 ns 1 Software ID Access and Exit Time 150 ns TSE Sector-Erase 25 ms TSCE Chip-Erase 100 TIDA 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter. (c)2010 Greenliant Systems, Ltd. 11 S71160-15-000 ms T11.9 1160 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet TRC TAA ADDRESS AMS-0 TCE CE# TOE OE# TOHZ TOLZ VIH WE# TCLZ TOH HIGH-Z DQ7-0 DATA VALID TCHZ HIGH-Z DATA VALID 1160 F03.1 Note: AMS = Most significant address AMS = A17 for GLS29SF/VF020 and A18 for GLS29SF/VF040 FIGURE 4: Read Cycle Timing Diagram INTERNAL PROGRAM OPERATION STARTS TBP 555 ADDRESS AMS-0 2AA 555 ADDR TAH TWP TDH WE# TAS TWPH TDS OE# TCH CE# TCS DQ7-0 AA 55 A0 SW0 SW1 SW2 DATA BYTE (ADDR/DATA) 1160 F04.1 Note: AMS = Most significant address AMS = A17 for GLS29SF/VF020 and A18 for GLS29SF/VF040 FIGURE 5: WE# Controlled Program Cycle Timing Diagram (c)2010 Greenliant Systems, Ltd. 12 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet INTERNAL PROGRAM OPERATION STARTS TBP 555 ADDRESS AMS-0 2AA 555 ADDR TAH TDH TCP CE# TAS TDS TCPH OE# TCH WE# TCS DQ7-0 AA 55 A0 DATA SW0 SW1 SW2 BYTE (ADDR/DATA) 1160 F05.1 Note: AMS = Most significant address AMS = A17 for GLS29SF/VF020 and A18 for GLS29SF/VF040 FIGURE 6: CE# Controlled Program Cycle Timing Diagram ADDRESS AMS-0 TCE CE# TOEH TOES OE# TOE WE# DQ7 D D# D# D 1160 F06.1 FIGURE 7: Data# Polling Timing Diagram (c)2010 Greenliant Systems, Ltd. 13 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet ADDRESS AMS-0 TCE CE# TOEH TOES TOE OE# WE# DQ6 TWO READ CYCLES WITH SAME OUTPUTS 1160 F07.1 Note: AMS = Most significant address AMS = A17 for GLS29SF/VF020 and A18 for GLS29SF/VF040 FIGURE 8: Toggle Bit Timing Diagram TSE SIX-BYTE CODE FOR SECTOR-ERASE ADDRESS AMS-0 555 2AA 555 555 2AA SAX CE# OE# TWP WE# DQ7-0 AA 55 80 AA 55 20 SW0 SW1 SW2 SW3 SW4 SW5 1160 F08.1 Note: This device also supports CE# controlled Sector-Erase operation The WE# and CE# signals are interchangeable as long as minimum timings are met. (See Table 11) AMS = Most significant address AMS = A17 for GLS29SF/VF020 and A18 for GLS29SF/VF040 SAX = Sector Address. FIGURE 9: WE# Controlled Sector-Erase Timing Diagram (c)2010 Greenliant Systems, Ltd. 14 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet TSCE SIX-BYTE CODE FOR CHIP-ERASE ADDRESS AMS-0 555 2AA 555 555 2AA 555 CE# OE# TWP WE# DQ7-0 AA 55 80 AA 55 10 SW0 SW1 SW2 SW3 SW4 SW5 1160 F09.1 Note: This device also supports CE# controlled Chip-Erase operation The WE# and CE# signals are interchangeable as long as minimum timings are met. (See Table 11) AMS = Most significant address AMS = A17 for GLS29SF/VF020 and A18 for GLS29SF/VF040 FIGURE 10: WE# Controlled Chip-Erase Timing Diagram Three-Byte Sequence for Software ID Entry ADDRESS A14-0 555 2AA 555 0000 0001 CE# TIDA OE# TWP WE# TWPH DQ7-0 TAA AA 55 90 SW0 SW1 SW2 BF Device ID 1160 F10.1 Note: Device ID = 24H for GLS29SF020, 13H for GLS29SF040 25H for GLS29VF020, 14H for GLS29VF040 FIGURE 11: Software ID Entry and Read (c)2010 Greenliant Systems, Ltd. 15 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet Three-Byte Sequence for Sofware ID Exit and Reset ADDRESS A14-0 DQ7-0 555 2AA AA 555 55 F0 TIDA CE# OE# TWP WE# TWHP 1160 F11.1 SW0 SW1 SW2 FIGURE 12: Software ID Exit and Reset (c)2010 Greenliant Systems, Ltd. 16 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet VIHT INPUT VIT REFERENCE POINTS VOT OUTPUT VILT 1160 F12.0 AC test inputs are driven at VIHT (3.0V) for a logic "1" and VILT (0V) for a logic "0". Measurement reference points for inputs and outputs are VIT (1.5 VDD) and VOT (1.5 VDD). Input rise and fall times (10% 90%) are <10 ns. Note: VIT - VINPUT Test VOT - VOUTPUT Test VIHT - VINPUT HIGH Test VILT - VINPUT LOW Test FIGURE 13: AC Input/Output Reference Waveforms for GLS29SF020/040 VIHT INPUT VIT REFERENCE POINTS VOT OUTPUT VILT 1160 F12.0 AC test inputs are driven at VIHT (0.9 VDD) for a logic "1" and VILT (0.1 VDD) for a logic "0". Measurement reference points for inputs and outputs are VIT (0.5 VDD) and VOT (0.5 VDD). Input rise and fall times (10% 90%) are <5 ns. Note: VIT - VINPUT Test VOT - VOUTPUT Test VIHT - VINPUT HIGH Test VILT - VINPUT LOW Test FIGURE 14: AC Input/Output Reference Waveforms for GLS29VF020/040 (c)2010 Greenliant Systems, Ltd. 17 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet GLS29SF040 GLS29VF040 VDD TO TESTER TO TESTER RL HIGH TO DUT CL TO DUT CL RL LOW 1160 F14b.0 1160 F14a.0 FIGURE 15: Test Load Examples (c)2010 Greenliant Systems, Ltd. 18 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet Start Load data: AAH Address: 555H Load data: 55H Address: 2AAH Load data: A0H Address: 555H Load Byte Address/Byte Data Wait for end of Program (TBP, Data# Polling bit, or Toggle bit operation) Program Completed 1160 F15.0 FIGURE 16: Byte-Program Algorithm (c)2010 Greenliant Systems, Ltd. 19 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet Internal Timer Toggle Bit Data# Polling ByteProgram/Erase Initiated ByteProgram/Erase Initiated ByteProgram/Erase Initiated Read byte Read DQ7 Wait TBP, TSCE, or TSE Read same byte Program/Erase Completed No Is DQ7 = true data? Yes No Does DQ6 match? Program/Erase Completed Yes Program/Erase Completed 1160 F16.0 FIGURE 17: Wait Options (c)2010 Greenliant Systems, Ltd. 20 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet Software ID Entry Command Sequence Software ID Exit & Reset Command Sequence Load data: AAH Address: 555H Load data: AAH Address: 555H Load data: F0H Address: XXH Load data: 55H Address: 2AAH Load data: 55H Address: 2AAH Wait TIDA Load data: 90H Address: 555H Load data: F0H Address: 555H Return to normal operation Wait TIDA Wait TIDA Read Software ID Return to normal operation 1160 F17.0 FIGURE 18: Software ID Command Flowcharts (c)2010 Greenliant Systems, Ltd. 21 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet Chip-Erase Command Sequence Sector-Erase Command Sequence Load data: AAH Address: 555H Load data: AAH Address: 555H Load data: 55H Address: 2AAH Load data: 55H Address: 2AAH Load data: 80H Address: 555H Load data: 80H Address: 555H Load data: AAH Address: 555H Load data: AAH Address: 555H Load data: 55H Address: 2AAH Load data: 55H Address: 2AAH Load data: 10H Address: 555H Load data: 20H Address: SAX Wait TSCE Wait TSE Chip erased to FFH Sector erased to FFH 1160 F18.0 FIGURE 19: Erase Command Sequence (c)2010 Greenliant Systems, Ltd. 22 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet PRODUCT ORDERING INFORMATION Device GLS29xFxxx Speed - XXX Suffix1 - XX Suffix2 - XXX Environmental Attribute E1 = non-Pb Package Modifier H = 32 leads Package Type N = PLCC W = TSOP (type 1, die up, 8mm x 14mm) Temperature Range C = Commercial = 0C to +70C I = Industrial = -40C to +85C Minimum Endurance 4 = 10,000 cycles Read Access Speed 55 = 55 ns 70 = 70 ns Device Density 040 = 4 Mbit 020 = 2 Mbit Function F = Chip- or Sector-Erase Byte-Program Voltage S = 4.5-5.5V V = 2.7-3.6V 1. Environmental suffix "E" denotes non-Pb solder. Greenliant non-Pb solder devices are "RoHS Compliant". (c)2010 Greenliant Systems, Ltd. 23 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet Valid combinations for GLS29SF020 GLS29SF020-55-4C-NHE GLS29SF020-55-4C-WHE GLS29SF020-55-4I-NHE GLS29SF020-55-4I-WHE Valid combinations for GLS29VF020 GLS29VF020-70-4C-NHE GLS29VF020-70-4C-WHE GLS29VF020-70-4I-NHE GLS29VF020-70-4I-WHE Valid combinations for GLS29SF040 GLS29SF040-55-4C-NH GLS29SF040-55-4C-WH GLS29SF040-55-4C-NHE GLS29SF040-55-4C-WHE GLS29SF040-55-4I-NH GLS29SF040-55-4I-WH GLS29SF040-55-4I-NHE GLS29SF040-55-4I-WHE Valid combinations for GLS29VF040 GLS29VF040-70-4C-NH GLS29VF040-70-4C-WH GLS29VF040-70-4C-NHE GLS29VF040-70-4C-WHE GLS29VF040-70-4I-NH GLS29VF040-70-4I-WH GLS29VF040-70-4I-NHE GLS29VF040-70-4I-WHE Note: Valid combinations are those products in mass production or will be in mass production. Consult your Greenliant sales representative to confirm availability of valid combinations and to determine availability of new combinations. (c)2010 Greenliant Systems, Ltd. 24 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet PACKAGING DIAGRAMS TOP VIEW Optional Pin #1 Identifier .048 .042 SIDE VIEW .495 .485 .453 .447 2 1 32 .112 .106 .020 R. MAX. .029 x 30 .023 .040 R. .030 .042 .048 .595 .553 .585 .547 BOTTOM VIEW .021 .013 .400 .530 BSC .490 .032 .026 .050 BSC .015 Min. .095 .075 .050 BSC .140 .125 .032 .026 Note: 1. Complies with JEDEC publication 95 MS-016 AE dimensions, although some dimensions may be more stringent. 2. All linear dimensions are in inches (max/min). 3. Dimensions do not include mold flash. Maximum allowable mold flash is .008 inches. 4. Coplanarity: 4 mils. 32-plcc-NH-3 FIGURE 20: 32-lead Plastic Lead Chip Carrier (PLCC) Greenliant Package Code: NH (c) 2010 Greenliant Systems, Ltd. All rights reserved. Greenliant, the Greenliant logo and NANDrive are trademarks of Greenliant Systems, Ltd. SSF is a trademark and SuperFlash is a registered trademark of Silicon Storage Technology, Inc., a wholly owned subsidiary of Microchip Technology Inc. (c)2010 Greenliant Systems, Ltd. 25 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet 1.05 0.95 Pin # 1 Identifier 0.50 BSC 8.10 7.90 0.27 0.17 0.15 0.05 12.50 12.30 DETAIL 1.20 max. 0.70 0.50 14.20 13.80 0- 5 0.70 0.50 Note: 1. Complies with JEDEC publication 95 MO-142 BA dimensions, although some dimensions may be more stringent. 1mm 2. All linear dimensions are in millimeters (max/min). 3. Coplanarity: 0.1 mm 4. Maximum allowable mold flash is 0.15 mm at the package ends, and 0.25 mm between leads. 32-tsop-WH-7 FIGURE 21: 32-lead Thin Small Outline Package (TSOP) 8mm x 14mm Greenliant Package Code: WH (c)2010 Greenliant Systems, Ltd. 26 S71160-15-000 05/10 2 Mbit / 4 Mbit Small-Sector Flash GLS29SF020 / GLS29SF040 GLS29VF020 / GLS29VF040 Data Sheet TABLE 12: Revision History Number Description Date 05 * 06 * * * * * 2002 Data Book 07 * Corrected the Test Conditions for the Read Parameter in Table 5 on page 8 Apr 2003 08 * Added Commercial temperatures for all packages (See page 24 for details) Aug 2003 09 * * 2004 Data Book Changed status to "Data Sheet" Dec 2003 10 * Added 70 ns technical data and MPNs for SST29VF040 only Feb 2004 11 * Added RoHS compliance information on page 1 and in the "Product Ordering Information" on page 23 Reinstated 512 Kbit, 1 Mbit, and 2 Mbit devices and MPNs (excluding the PDIP package) Removed 55 ns technical data and MPNs for SST29VF040 Added non-Pb MPNs for all devices Clarified the solder temperature profile under "Absolute Maximum Stress Ratings" on page 8 Mar 2005 May 2002 Mar 2003 Removed 512 Kbit, 1 Mbit, and 2 Mbit parts Commercial temperature and 70 ns parts removed PH package is no longer offered Part number changes - see page 24 for additional information Changes to Tables 5 and 6 on page 8 and page 10: - Clarified Test Conditions for Power Supply Current and Read parameters - Clarified IDD Write to be Program and Erase - Corrected IDD Program and Erase from 20 mA to 30 mA - Corrected IDD Read from 20 mA to 25 mA * Clarified measurement reference points VIT and VOT to be 1.5V instead of 1.5VDD * Corrected the VOL test condition IOL to be 2.1 mA instead of 2.1 A in Table 5 on page 8 * * * * 12 * * Removed all entries related to SST29SF/VF512 and SST29SF/VF010 Removed leaded parts for 020 products. Nov 2005 13 * Changed IDD Read from 20mA to 25mA, and Changed IDD Write from 20mA to 30mA in Table 5 on page 8 and Table 6 on page 10 Oct 2006 14 * Changed ISB from 15 to 30 A in Table 6 on page 10. Oct 2008 15 * Transferred from SST to Greenliant May 2010 (c) 2010 Greenliant Systems, Ltd. All rights reserved. Greenliant, the Greenliant logo and NANDrive are trademarks of Greenliant Systems, Ltd. All trademarks and registered trademarks are the property of their respective owners. These specifications are subject to change without notice. SSF is a trademark and SuperFlash is a registered trademark of Silicon Storage Technology, Inc., a wholly owned subsidiary of Microchip Technology Inc. (c)2010 Greenliant Systems, Ltd. 27 S71160-15-000 05/10