Freescale Semiconductor Technical Data MC100ES6011 Rev 5, 08/2005 2.5 V/3.3 V ECL 1:2 Differential Fanout Buffer MC100ES6011 The MC100ES6011 is a differential 1:2 fanout buffer. The ES6011 is ideal for applications requiring lower voltage. The 100ES Series contains temperature compensation. D SUFFIX 8-LEAD SOIC PACKAGE CASE 751-07 Features * * * * * * * * 270 ps Typical Propagation Delay Maximum Frequency > 3 GHz Typical PECL Mode Operating Range: VCC = 2.375 V to 3.8 V with VEE = 0 V ECL Mode Operating Range: VCC = 0 V with VEE = -2.375 V to -3.8 V Open Input Default State Q Output Will Default LOW with Inputs Open or at VEE LVDS Input Compatible 8-Lead SOIC and TSSOP Pb-Free Packages Available EF SUFFIX 8-LEAD SOIC PACKAGE Pb-FREE PACKAGE CASE 751-07 DT SUFFIX 8-LEAD TSSOP PACKAGE CASE 1640-01 EJ SUFFIX 8-LEAD TSSOP PACKAGE Pb-FREE PACKAGE CASE 1640-01 ORDERING INFORMATION Q0 Q0 Q1 1 2 3 8 7 6 Device VCC D D Package MC100ES6011D SO-8 MC100ES6011DR2 SO-8 MC100ES6011EF SO-8 (Pb-Free) MC100ES6011EFR2 SO-8 (Pb-Free) MC100ES6011DT TSSOP-8 MC100ES6011DTR2 TSSOP-8 MC100ES6011EJ TSSOP-8 (Pb-Free) MC100ES6011EJR2 TSSOP-8 (Pb-Free) PIN DESCRIPTION Q1 4 5 VEE Pin (1) D ,D Figure 1. 8-Lead Pinout (Top View) and Logic Diagram (2) Function ECL Data Inputs Q0, Q0 Q1, Q1 ECL Data Outputs VCC Positive Supply VEE Negative Supply 1. Pins will default LOW when left open. 2. Pins will default to 0.572 VCC/2 when left open. (c) Freescale Semiconductor, Inc., 2005. All rights reserved. Table 1. Attributes Characteristics Value Internal Input Pulldown Resistor 75 k Internal Input Pullup Resistor 56 k ESD Protection Human Body Model Machine Model Charged Device Model > 4000 V > 200 V > 1500 V JA Thermal Resistance (Junction to Ambient) 0 LFPM, 8 SOIC 500 LFPM, 8 SOIC 190C/W 130C/W Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test Table 2. Maximum Ratings(1) Symbol VSUPPLY Parameter Conditions Power Supply Voltage Difference between VCC & VEE VIN Input Voltage VCC-VEE < 3.6 V IOUT Output Current Continuous Surge Rating Units 3.9 V VCC +0.3 VEE -0.3 V V 50 100 mA mA TA Operating Temperature Range -40 to +85 C Tstg Storage Temperature Range -65 to +150 C 1. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute-maximum-rated conditions is not implied. Table 3. DC Characteristics (VCC = 0 V; VEE = -2.5 V 5% or VCC = 2.5 V 5%; VEE = 0 V)(1) Symbol Characteristic -40C Min Typ Min Unit Power Supply Current 25 mA Output HIGH Voltage(2) VCC-1135 VCC-760 VCC-1070 VCC-760 mV VOL Voltage(2) VCC-1950 VCC-1350 VCC-1950 VCC-1520 mV Output Peak-to-Peak Voltage 200 12 Max IEE VOUTPP 25 Typ VOH Output LOW 12 0C to 85C Max 200 mV VIH Input HIGH Voltage (Single Ended) VCC-1165 VCC-880 VCC-1165 VCC-880 mV VIL Input LOW Voltage (Single Ended) VCC-1810 VCC-1475 VCC-1810 VCC-1475 mV VPP VCMR IIN Differential Input Voltage(3) Differential Cross Point Voltage(4) Input Current 0.12 1.3 0.12 1.3 V VEE +1.0 VCC -0.8 VEE +1.0 VCC-0.8 V 150 A 150 1. ES6011 circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow > 500 LFPM is maintained. 2. Output termination voltage VTT = 0 V for VCC = 2.5 V operation is supported but the power consumption of the device will increase. 3. VPP (DC) is the minimum differential input voltage swing required to maintain device functionality. 4. VCMR (DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the VCMR (DC) range and the input swing lies within the VPP (DC) specification. MC100ES6011 2 Advanced Clock Drivers Device Data Freescale Semiconductor Table 4. DC Characteristics (VCC = 0 V; VEE = -3.8 to -3.135 or VCC = 3.8 to 3.135 V; VEE = 0 V)(1) Symbol IEE VOH VOL VOUTPP -40C Characteristic Min Power Supply Current 0C to 85C Typ Max 12 25 Min Unit Typ Max 12 25 mA Output HIGH Voltage(2) VCC -1135 VCC -760 VCC -1070 VCC -760 mV Output LOW Voltage(2) VCC -1950 VCC -1500 VCC -1950 VCC -1520 mV Output Peak-to-Peak Voltage 200 200 mV VIH Input HIGH Voltage (Single Ended) VCC -1165 VCC -880 VCC -1165 VCC -880 mV VIL Input LOW Voltage (Single Ended) VCC -1810 VCC -1475 VCC -1810 VCC -1475 mV 0.12 1.3 0.12 1.3 V VEE +1.0 VCC -0.8 VEE +1.0 VCC -0.8 V 150 A VPP VCMR IIN Differential Input Voltage(3) Differential Cross Point Voltage(4) 150 Input Current 1. ES6011 circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow > 500 LFPM is maintained. 2. Output termination voltage VTT = 0 V for VCC = 2.5 V operation is supported but the power consumption of the device will increase. 3. VPP (DC) is the minimum differential input voltage swing required to maintain device functionality. 4. VCMR (DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the VCMR (DC) range and the input swing lies within the VPP (DC) specification. Table 5. AC Characteristics (VCC = 0 V; VEE = -3.8 to -2.375 or VCC = 2.375 to 3.8 V; VEE = 0 V)(1) Symbol Characteristic fMAX Maximum Frequency tPLH, tPHL Propagation Delay (Differential) CLK to Q, Q tSKEW Within Device Skew Q, Q Device-to-Device Skew(2) tJITTER Cycle-to-Cycle Jitter RMS (1) VPP VCMR tr tf Input Voltage Swing (Differential) -40C Min Max Min Typ >3 170 150 70 0C to 85C Max Min >3 260 300 9 20 130 180 1200 270 310 9 20 130 Max 210 150 1200 285 360 ps 9 20 150 ps 1 ps 1200 mV VCC -1.1 V 220 ps 150 VCC -1.1 VEE +1.2 70 220 Unit GHz 1 VCC-1.1 VEE +1.2 220 Typ >3 1 Differential Cross Point Voltage VEE +1.2 Output Rise/Fall Times (20% - 80%) Typ 25C 70 1. Measured using a 750 mV source 50% Duty Cycle clock source. All loading with 50 to VCC-2.0 V. 2. Skew is measured between outputs under identical transitions. Q D Receiver Device Driver Device Qb Db 50 50 VTT VTT = VCC - 2.0 V Figure 2. VOUTPP versus Frequency Figure 3. Typical Termination for Output Driver and Device Evaluation MC100ES6011 Advanced Clock Drivers Device Data Freescale Semiconductor 3 PACKAGE DIMENSIONS PAGE 1 OF 2 CASE 751-07 ISSUE U 8-LEAD SOIC PACKAGE MC100ES6011 4 Advanced Clock Drivers Device Data Freescale Semiconductor PACKAGE DIMENSIONS PAGE 2 OF 2 CASE 751-07 ISSUE U 8-LEAD SOIC PACKAGE MC100ES6011 Advanced Clock Drivers Device Data Freescale Semiconductor 5 PACKAGE DIMENSIONS 2X 3 0.20 C 3.00 1.95 1.5 A D 8 2 0.60 1 0.60 2.45 B 1.5 3 3.00 H 4.90 B 2X SEE VIEW C 0.20 C D VIEW A-A 0.65 0.325 B 8X 0.18 0.13 8 0.38 0.25 0.13 0.23 0.13 BASE METAL C A-B D M 0.48 MAX TOP VIEW DETAIL "B" A 0.38 0.25 0.33 0.25 0.25 C 8 SECTION B-B SEE NOTE 6 DAMBAR PROTRUSION DETAIL "B" 0.95 0.75 8X 0.10 C 1.10 MAX SEATING PLANE 0.15 0.05 C A SIDE VIEW 4X 15 5 0.07 MIN 0.25 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS ARE IN MILLIMETERS. 3. THIS DIMENSION DOES NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT DATUM H, MOLD FLASH OR PROTRUSIONS, SHALL NOT EXCEED 0.15mm PER SIDE. 4. DIMENSION IS THE LENGTH OF TERMINAL FOR SOLDERING TO A SUBSTRATE. 5. THE LEAD WIDTH DIMENSION DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08mm TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE LEAD FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.14mm SEE DETAIL "B" AND SECTION B-B. 6. SECTION B-B TO BE DETERMINED AT 0.10 TO 0.25mm FROM THE LEAD TIP. 7. THIS PART IS COMPLIANT WITH JEDEC REGISTRATION MO-187 AA. 8. DATUMS A AND B TO BE DETERMINED DATUM PLANE H. GAUGE PLANE SEATING PLANE 6 0 0.70 0.40 4 4X 15 5 C (0.95) VIEW C CASE 1640-01 ISSUE O 8-LEAD TSSOP PACKAGE MC100ES6011 6 Advanced Clock Drivers Device Data Freescale Semiconductor NOTES MC100ES6011 Advanced Clock Drivers Device Data Freescale Semiconductor 7 How to Reach Us: Home Page: www.freescale.com E-mail: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 +1-800-521-6274 or +1-480-768-2130 support@freescale.com Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen, Germany +44 1296 380 456 (English) +46 8 52200080 (English) +49 89 92103 559 (German) +33 1 69 35 48 48 (French) support@freescale.com Japan: Freescale Semiconductor Japan Ltd. Headquarters ARCO Tower 15F 1-8-1, Shimo-Meguro, Meguro-ku, Tokyo 153-0064 Japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com Asia/Pacific: Freescale Semiconductor Hong Kong Ltd. Technical Information Center 2 Dai King Street Tai Po Industrial Estate Tai Po, N.T., Hong Kong +800 2666 8080 support.asia@freescale.com For Literature Requests Only: Freescale Semiconductor Literature Distribution Center P.O. Box 5405 Denver, Colorado 80217 1-800-441-2447 or 303-675-2140 Fax: 303-675-2150 LDCForFreescaleSemiconductor@hibbertgroup.com MC100ES6011 Rev. 5 08/2005 Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Freescale Semiconductor reserves the right to make changes without further notice to any products herein. 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