AP7363
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P7363
1.5A LOW QUIESCENT CURRENT, FAST TRANSIENT
ULTRA-LOW DROP OUT LINEAR REGULATO R
Description
The AP7363 is a 1.5A adjustable output voltage linear regulator with
ultra-low dropout. The device includes pass element, error amplifier,
band-gap, current limit and thermal shutdown circuitry.
The characteristics of low dropout voltage and fast transient respon se
to step changes in load make it suitable for low voltage
microprocessor applications. The typical quiescent current is
approximately 0.5mA and changes little with load current. The built-in
current-limit and thermal-shutdown functions prev ent IC from damage
in fault conditions.
This device is available in U-DFN2030-8, SO-8EP, SOT223 and
TO252 packages.
Features
• 1.5A ultra-low dropout linear regulator
• Ultra-low dropout: 190mV at 1.5A
• Stable with 10µF input/output capacitor, any types
• Wide input voltage range: 2.2V to 5.5V
• Adjustable output voltage: 0.6V to 5.0V
• Fixed output options: 1V, 1.2V, 1.5V, 1.8V, 2.5V, 3.3V
• Low ground pin current
• 25nA quiescent current in shutdown mode
• V
ADJ accuracy of ±1.5% @ +25°C
• V
ADJ accuracy of ±3% over line, load and temperature
• Excellent Load/Line Transient Response
• Current limit and thermal shutdown protection
• Ambient temperature range: -40°C to +85°C
• U-DFN2030-8, SO-8EP, SOT223 and TO252: Available in
“Green” Molding Compound (No Br, Sb)
• Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
• Halogen and Antimony Free. “Green” Device (Note 3)
Applications
• ASIC power supplies in printers, graphics cards, DVD players,
STBs, routers, etc
• FPGA and DSP core or I/O power supplies
• SMPS regulator
• Conversion from 3.3V or 5V rail
Pin Assignments
Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.
2. See http://www.diodes.com for more information about Diodes In corpor ated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as tho se which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl)
and <1000ppm antimony compounds.
OUTOUTOUT
ADJ/
NC
IN INGND
3214
6785
U-DFN2030-8
(To p View)
IN
(Top View )
GND
IN
IN
ADJ/NC
OUT
OUT
OUT
4
3
2
1
5
6
7
8
SO-8EP
IN
(Top View)
SOT223
(Fixed Output)
OUT
GND (TAB)
IN
3
2
1
(Top View)
TO252
GND
3
2
1
AP7363
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P7363
Typical Applications Circuit
Ωk10Rwhere
R
R
1VV 2
2
1
REFOUT ≤
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛+=
Pin Descriptions
Pin
Name
Pin Number Function
SOT223
TO252 U-DFN2030-8
SO-8EP
GND 2 1 Ground.
IN 1 2, 3, 4 Voltage input pin.
OUT 3 5, 6, 7 Voltage output pin.
ADJ NA 8 Output feedback pin for adjustable version only – a resistor divider from this pin to the OUT
pin and ground sets the output voltage.
NC NA 8 No connection for fixed output version.
EP/TAB — — The exposed pad (EP) is used to remove heat from the package and it is recommended that
it is connected to a copper area. The die is electrically connected to the exposed pad. It is
recommended to connect it externally to GND, but should not be the only ground connection.
Functional Block Diagram
IN
EN
GND
OUT
Gate
Driver
0.605V
Current L im it
and Thermal
Shutdown
Fixed Version
R
R
IN
EN
GND
ADJ
OUT
Gate
Driver
0.605V
Current Limit
and Thermal
Shutdown
Adjus table V e rs ion
V
IN
V
OUT
OUTIN
AP7363
GND
Fixed Output
10µF
10µF
V
IN
V
OUT
OUTIN
AP7363
GND
Adjustable Output
10µF
10µF ADJ
R2
R1
AP7363
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Absolute Maximum Ratings (cont.) (@TA = +25°C, unless otherwise specified.)
Symbol Parameter Ratings Unit
ESD HBM Human Body Model ESD Protection 2000 V
ESD MM Machine Model ESD Protection 200 V
VIN Input Voltage -0.3 to +6.0 V
VOUT OUT Voltage -0.3 to VIN +0.3 V
IOUT Continuous Load Current Internal Limited
TST Storage Temperature Range -65 to +150 °C
TJ Maximum Junction Temperature 150 °C
Recommended Operating Conditions (@TA = +25°C, unless otherwise specified.)
Symbol Parameter Min Max Unit
VIN Input voltage 2.2 5.5 V
IOUT Output Current 0 1.5 A
TA Operating Ambient Temperature -40 +85 °C
TJ Operating Junction Temperature (Note 5) -40 +125 °C
Notes: 4. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated are not implied. Exposure to absolute-maximum rated
conditions for extended periods may affect device reliability.
5. Operating junction temperature must be evaluated and derated as needed, based on ambient temperature (TA), power dissipation (PD), maximum
allowable operating junction temperature (TJ-MAX), and package thermal resistance (θJA).
AP7363
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Electrical Characteristics (@TA = +25°C, VIN = 3.3V, IOUT = 10mA, CIN = 10µF, COUT = 10µF, unless otherwise specified.)
Minimum and maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric
norm at TA = +25°C, and are provided for reference purposes only.
Symbol Parameter Test Conditions Min Typ Max Unit
VADJ ADJ Pin Voltage VIN = VIN-MIN to VIN-MAX,
IOUT = 10mA to 1.5A TA = +25°C 0.584 0.605 0.626 V
Over temp 0.575 0.635
IADJ ADJ Pin Bias Current VIN = VIN-MIN to VIN-MAX TA = +25°C 50 nA
Over temp 750
VDROPOUT Dropout Voltage (Note 6) IOUT = 1.5A, VOUT = 2.5V TA = +25°C 190 240
mV
Over temp 280
ΔVOUT /ΔVIN Line Regulation (Note 7) VIN = VIN-MIN to VIN-MAX TA = +25°C — 0.04 — %/V
Over temp 0.05
ΔVOUT /ΔIOUT Load Regulation (Note 7) IOUT = 10mA to 1.5A TA = +25°C — 0.18 — %/A
Over temp 0.33
IGND Ground Pin Current in Normal
Operation Mode IOUT = 10mA to 1.5A TA = +25°C 1.0 1.2
mA
Over temp 1.3
IOUT-PK Peak Output Current VOUT ≥ VOUT - NOM -5% 3.6 A
ISC Short Circuit Current OUT grounded TA = +25°C 3.7 A
Over temp 2
td(off) Turn-Off Delay From VEN < VIL to VOUT = OFF, IOUT = 1.5A 25 μs
td(on) Turn-On Delay From VEN > VIH to VOUT = ON, IOUT = 1.5A 25 μs
PSRR Ripple Rejection VIN = 3.0V, IOUT = 1.5A, f = 120Hz 65 dB
VIN = 3.0V, IOUT = 1.5A, f = 1kHz 61
ρn(l/f) Output Noise Density F = 120Hz, COUT = 10μF ceramic 1.0 μV/√Hz
en Output Noise Voltage BW = 100Hz – 100kHz,
COUT = 10μF ceramic 100 μV(rms)
TSHDN Thermal Shutdown Threshold TJ rising 170 °C
THYS Thermal Shutdown Hysteresis TJ falling from TSHDN 10
θJA Thermal Resistance Junction-to-
Ambient
U-DFN2030-8 (Note 8) 174.0
oC/W
SO-8EP (Note 8) 52.8
SOT223 (Note 8) 105.7
TO252 (Note 8) 87.8
θJC Thermal Resistance Junction-to-Case
U-DFN2030-8 (Note 8) 28.2
oC/W
SO-8EP (Note 8) 10.0
SOT223 (Note 8) 18.5
TO252 (Note8) 17.3
Notes: 6. Dropout voltage is the minimum voltage difference between the input and the output at which the output voltage drops 2% below its nominal value.
For any output voltage less than 2.5V, the minimum VIN operating voltage is the limiting factor.
7. The line and load regulation specification contains only the typical number. However, the limits for line and load regulation are included in the adjust
voltage tolerance specification.
8. Device mounted on 2” x 2” FR-4 substrate PCB, 2oz copper with minimum recommended pad layout.
AP7363
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Typical Performance Characteristics (@TJ = +25°C, VIN = 2.7V, CIN = 10µF, COUT = 10µF, IOUT = 10mA, VOUT = 1.8V.)
100 1000 10k 100k
FREQUENCY (Hz)
Nois e Density
10
100
1k
10k
NOISE (nV/ Hz)
√
C = 10µF CER
OUT
100 1000 10k 100k
FREQUENCY (Hz)
Noise Density
10
100
1k
10
k
NOISE (nV/ Hz)
√
C = 10µF
OUT
I (A)
I vs. Load Cu r r ent
LOAD
GND
0
I (mA)
GND
0.5 1 1.5
0
0.5
1
1.5
2
2.5
3
V (V)
T urn-On Characteristics
IN
0123
V (V
)
OUT
0
1
2
125°C
25°C
-40°C
TEMPERATURE (°C)
V vs. Temperature
ADJ
-50 -25 75 12502550 100
V (V)
ADJ
0.590
0.595
0.600
0.605
0.610
0.61
5
LOAD CURRENT (A)
Dropout Voltag e vs. Load Curre nt
00.511.5
D
R
O
P
O
U
T
V
O
L
T
A
G
E (V)
0
0.1
0.2
0.3
125°C
25°C
-40°C
AP7363
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Typical Performance Characteristics (cont.)
(@TJ = +25°C, VIN = 2.7V, CIN = 10µF, COUT = 10µF, IOUT = 10mA, VOUT = 1.8V.)
Turn-On Time
Time (10μs/div)
Turn-On Time
Time (10μs/div)
Load Transient Response
Time (40μs/div)
90
FREQUENCY (kHz)
PSRR
100 1k 10k 100k 1M
V = 3.3V
V = 1.8V
I
C = 1µF CER
IN
OUT
OUT
OUT
IN
= 1A
C = 1µF CER
REJECTION RATIO (dB)
80
70
60
30
20
10
0
50
40
VOUT = 1.8V (50mV/div)
ILOAD = 100mA to 1.5A (1A/div)
VIN = 3.3V
COUT =10μF CER
VOUT = 1.2V (500mV/div)
IL = 1.5A, COUT = 10μF CER
VIN = 3.0V
(
2V/div
)
VOUT = 1.2V (500mV/div)
IL = 0A, COUT = 10μF CER
VIN = 3.0V
(
2V/div
)
AP7363
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P7363
Application Note
Input Capacitor
A minimum 2.2μF ceramic capacitor is recommended between IN and GND pins to decouple input p ower suppl y glitch and noise. The amount of
the capacitance may be increased without limit. Larger input capa citor like 10μF will provide better load transient res ponse. This input capacitor
must be located as close as possible to the device to assure input stability and red uce noise. For PCB layout, a wide copper trace is required for
both IN and GND pins. A lower ESR capacitor type allows the use of less capacitance, while higher ESR type requires more capacitance.
Output Capacitor
The output capacitor is required to stabilize and help the transient response of the LDO. The AP7363 is stable with any type of capacitor, with no
limitations on minimum or maximum ESR. The device is designed to have excellent transient response for most applications with a small amount
of output capacitance. The device is also stable with multiple capacitors in parallel, which can be of any type of value. Additional capacitance
helps to reduce undershoot and overshoot du ring transient loads. This capacitor sh ould be placed a s close as possible to OUT an d GND pins fo r
optimum performance.
Adjustable Operation
The AP7363 provides output voltage from 0.6V to 5.0V through external resistor divider as shown below.
The output voltage is calculated by:
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛+= 2
R1
R
1
REF
V
OUT
V
Where VREF = 0.6V (the internal reference voltage)
Rearranging the equation will give the following that is used for adjusting the output to a particular voltage:
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛−= 1
REF
VOUT
V
2
R
1
R
To maintain the stability of the internal reference voltage, R2 need to be kept smaller than 10kΩ.
No Load Stability
Other than external resistor divider, no minimum load is required to keep the device stable. The device will remain stable and regulated in no
load condition.
AP7363
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Application Note (cont.)
Stability and Phase Margin
Any regulator which operates using a feedback loop must be compensated in such a way as to ensu re adequate phase margin, which is defined
as the difference between the phase shift and -1 80 degre es at the frequenc y where the loop gain crosses unity (0 d B). For most LD O regulators,
the ESR of the output capacitor is required to create a zero to add enough phase lead to ensure stable operation. The AP7363 has a internal
compensation circuit which maintains phase margin regardless of the ESR of the output capacitor, any type of capacitos can be used.
The two charts on the next page show the gain/ph ase plot of the AP7363 with an o utput of 1.2V, 10 μF ceramic output capacitor, delivering 1.5A
load current and no load. It can be seen the phase margin is about 90° (which is very stable).
Short Circuit Protection
When output current at OUT pin is higher than current limit threshold, the current limit protection will be triggered and clamp the output current t o
prevent over-current and to protect the regulator from damage due to overheating.
Thermal Shutdown Protection
Thermal protection disables the output when the junction temperature rises to approximately +170°C, allowing the device to cool down. When the
junction temperature reduces to approximately +160°C the output circuitr y is enabled again. Depending on po wer dissipation, the rmal resistance,
and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits the heat dissipation of the regulator, protecting it
from damage due to overheating.
Low Quiescent Current
The AP7363, consuming only around 0.5mA for all input range, provides great power saving in portable and low power applications.
Output Noise
This is the integrated value of the output noise over a specified frequency range. Input voltage and output load current are kept constant during
the measurement. Results are expressed in µVrms or µV√Hz.
The AP7363 is a low noise regulator and needs no external noise reduction capacitor. Output voltage noise is typically 100μVr ms overall noise
level between 100 Hz and 100 kHz.
Noise is specified in two ways:
Output noise density is the RMS sum of all noise sources, measured at the regulator output, at a specific frequency (measured with a 1Hz
bandwidth). This type of noise is usually plotted on a curve as a function of frequency.
Output noise voltage is the RMS sum of spot noise over a specified bandwidth. Spot noise is measured in units μV/√Hz or nV/√Hz and total
output noise is measured in μV(rms). The primary source of noise in low-dropout regulators is the internal reference.
-120
-100
-80
-60
-40
-20
0
20
40
60
80
100
120
FREQUENCY(Hz)
Gain-Bandwidth Plot for 1.5A Load
140
100
120
100
80
60
40
20
0
-20
-40
-60
-80
PH ASE MARGIN ( °)
1k 10k 100k 1M
PHASE
V = 2.7V
V = 1.2V
I = 1.5A
C = 10µF CER
IN
OUT
LOUT
GAIN
L
O
O
P
G
AIN (dB)
-120
-100
-80
-60
-40
-20
0
20
40
60
80
100
120
L
O
O
P
G
AI
N
(dB)
140
120
100
80
60
40
20
0
-20
-40
-60
-80
PHASE MARGIN (°)
FREQUENCY(Hz)
Gain-Bandwidth Plot for no Load
100 1k 10k 100k 1M
V = 2.7V
V = 1.2V
I = 0A
C = 10µF CER
IN
OUT
LOUT
PHASE
GAIN
AP7363
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Application Note (cont.)
Power Dissipation
The device power dissipation and proper sizing of the thermal plane that is connected to the thermal pad is critical to avoid thermal shutdown and
ensure reliable operation. Power dissipation of the device depends on input voltage and load conditions and can be calculated by:
P
D = (VIN - VOUT) X IOUT
The maximum power dissipation, handled by the device, depends on the junction to ambient thermal resistance, and maximum ambient
temperature, which can be calculated by the equation in the following:
JA
R)
A
T-C150(
Pmax_D θ
°+
=
Ordering Information
Part Number Package Code Packaging
(Note 9) 7”/13” Tape and Reel
Quantity Part Number S uffix
AP7363-XXHA-7 HA U-DFN2030-8 3000/Tape & Reel -7
AP7363-XXSP-13 SP SO-8EP 2500/Tape & Reel -13
AP7363-XXE-13 E SOT223-3L 2500/Tape & Reel -13
AP7363-XXD-13 D TO252-3L 2500/Tape & Reel -13
Note: 9. TO252 and SOT223 are only available with fixed output version.
Marking Information
(1) U-DFN2030-8
Device Package Identification Code
AP7363ADJ U-DFN2030-8 SA
AP7363-10 U-DFN2030-8 SB
AP7363-12 U-DFN2030-8 SC
AP7363-15 U-DFN2030-8 SD
AP7363-18 U-DFN2030-8 SE
AP7363-25 U-DFN2030-8 SF
AP7363-33 U-DFN2030-8 SG
AP7363
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Marking Information (cont.)
(2) SO-8EP
(3) SOT223
(4) TO252
AP7363
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Package Outline Dimensions (All dimensions in mm.)
Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for latest version.
(1) U-DFN2030-8
(2) SO-8EP
U-DFN2030-8
Dim Min Max Typ
A 0.57 0.63 0.60
A1 0 0.05 0.02
A3 - - 0.15
b 0.20 0.30 0.25
D 1.95 2.05 2.00
D2 1.40 1.60 1.50
e - - 0.50
E 2.95 3.05 3.00
E2 1.50 1.70 1.60
L 0.35 0.45 0.40
Z - - 0.125
All Dimensions in mm
SO-8EP (SOP-8L-EP)
Dim Min Max Typ
A 1.40 1.50 1.45
A1 0.00 0.13 -
b 0.30 0.50 0.40
C 0.15 0.25 0.20
D 4.85 4.95 4.90
E 3.80 3.90 3.85
E0 3.85 3.95 3.90
E1 5.90 6.10 6.00
e - - 1.27
F 2.75 3.35 3.05
H 2.11 2.71 2.41
L 0.62 0.82 0.72
N - - 0.35
Q 0.60 0.70 0.65
All Dimensions in mm
D
E
e
b
L
AA1 A3
(Pin #1 ID)
Seating Plane
E2
Z
D2
C'0.25*45°
Gauge Plane
Seating P lane
E1
E
N
e
b
A
45
°
E0
H
F
Exposed Pad
Bottom View
L
QC
7
°
4° ± 3°
9° (A ll si de s )
A1
D
14
85
AP7363
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Package Outline Dimensions (cont.) (All dimensions in mm.)
Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for latest version.
(3) SOT223
(4) TO252
SOT223
Dim Min Max Typ
A 1.55 1.65 1.60
A1 0.010 0.15 0.05
b1 2.90 3.10 3.00
b2 0.60 0.80 0.70
C 0.20 0.30 0.25
D 6.45 6.55 6.50
E 3.45 3.55 3.50
E1 6.90 7.10 7.00
e — — 4.60
e1 — — 2.30
L 0.85 1.05 0.95
Q 0.84 0.94 0.89
All Dimensions in mm
TO252
Dim Min Max Typ
A 2.19 2.39 2.29
A1 0.00 0.13 0.08
A2 0.97 1.17 1.07
b 0.64 0.88 0.783
b2 0.76 1.14 0.95
b3 5.21 5.46 5.33
c2 0.45 0.58 0.531
D 6.00 6.20 6.10
D1 5.21 − −
e − − 2.286
E 6.45 6.70 6.58
E1 4.32 − −
H 9.40 10.41 9.91
L 1.40 1.78 1.59
L3 0.88 1.27 1.08
L4 0.64 1.02 0.83
a 0° 10° −
All Dimensions in mm
A1
A
b3
E
2X b2
D
L4
Ac2
e
A1
L
L3
3X b a
H
A2 E1
AP7363
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Suggested Pad Layout
Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version.
(1) U-DFN2030-8
(2) SO-8EP
(3) SOT223
(4) TO252
Dimensions Value
(in mm)
C 0.500
G 0.250
X 0.350
X1 1.500
X2 1.850
Y 0.600
Y1 1.600
Y2 3.300
Dimensions Value
(in mm)
C 1.270
X 0.802
X1 3.502
X2 4.612
Y 1.505
Y1 2.613
Y2 6.500
Dimensions Value (in mm)
X1 3.3
X2 1.2
Y1 1.6
Y2 1.6
C1 6.4
C2 2.3
Dimensions Value (in mm)
Z 11.6
X1 1.5
X2 7.0
Y1 2.5
Y2 7.0
C 6.9
E1 2.3
X2
Y2
Y
X
Y1
G
X1
Pin1
C
X2
C1
C2
X1
Y2
Y1
X2
CZ
X1
Y1
E1
Y2
C
Y1
X1
X
Y
Y2
X2
AP7363
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A. Life support devices or systems are devices or systems which:
1. are intended to implant into the body, or
2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the
labeling can be reasonably expected to result in significant injury to the user.
B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the
failure of the life support device or to affect its safety or effectiveness.
Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their pro ducts and an y
use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related
information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its
representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems.
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