PD - 95092C IRLR7833PbF IRLU7833PbF Applications l High Frequency Synchronous Buck Converters for Computer Processor Power l High Frequency Isolated DC-DC Converters with Synchronous Rectification for Telecom and Industrial Use l Lead-Free Benefits l Very Low RDS(on) at 4.5V VGS l Ultra-Low Gate Impedance l Fully Characterized Avalanche Voltage and Current HEXFET(R) Power MOSFET VDSS RDS(on) max 4.5m: 30V Qg 33nC D-Pak I-Pak IRLR7833PbF IRLU7833PbF Absolute Maximum Ratings Parameter Max. Units 30 V VDS Drain-to-Source Voltage VGS Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V 20 140 99 IDM Continuous Drain Current, VGS @ 10V Pulsed Drain Current PD @TC = 25C Maximum Power Dissipation 140 ID @ TC = 25C ID @ TC = 100C c PD @TC = 100C g Maximum Power Dissipation g TJ Linear Derating Factor Operating Junction and TSTG Storage Temperature Range f f A 560 W 71 0.95 -55 to + 175 Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw W/C C 300 (1.6mm from case) x x 10 lbf in (1.1N m) Thermal Resistance Parameter RJC RJA Junction-to-Case Junction-to-Ambient (PCB Mount) RJA Junction-to-Ambient Notes through www.irf.com g Typ. Max. --- 1.05 --- 50 --- 110 Units C/W are on page 11 1 05/19/09 IRLR/U7833PbF Static @ TJ = 25C (unless otherwise specified) Parameter BVDSS VDSS/TJ Min. Typ. Max. Units Drain-to-Source Breakdown Voltage 30 --- --- Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance --- --- 19 3.6 --- 4.5 VGS(th) VGS(th)/TJ IDSS Gate Threshold Voltage --- 1.4 4.4 --- 5.5 2.3 Gate Threshold Voltage Coefficient Drain-to-Source Leakage Current --- --- -6.0 --- --- 1.0 IGSS Gate-to-Source Forward Leakage --- --- --- --- 150 100 Gate-to-Source Reverse Leakage Forward Transconductance --- 66 --- --- -100 --- Total Gate Charge Pre-Vth Gate-to-Source Charge --- --- 33 8.7 50 --- Post-Vth Gate-to-Source Charge Gate-to-Drain Charge --- --- 2.1 13 --- --- Qgodr Qsw Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) --- --- 9.9 15 --- --- Qoss td(on) Output Charge Turn-On Delay Time --- --- 22 14 --- --- tr td(off) Rise Time Turn-Off Delay Time --- --- 6.9 23 --- --- tf Ciss Fall Time Input Capacitance --- --- 15 4010 --- --- Coss Crss Output Capacitance Reverse Transfer Capacitance --- --- 950 470 --- --- RDS(on) gfs Qg Qgs1 Qgs2 Qgd V Conditions VGS = 0V, ID = 250A mV/C Reference to 25C, ID = 1mA VGS = 10V, ID = 15A m VGS = 4.5V, ID = 12A V VDS = VGS, ID = 250A f f mV/C A nA S VDS = 24V, VGS = 0V VDS = 24V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V VDS = 15V, ID = 12A VDS = 16V nC VGS = 4.5V ID = 12A See Fig. 16 nC ns VDS = 16V, VGS = 0V VDD = 15V, VGS = 4.5V f ID = 12A Clamped Inductive Load VGS = 0V pF VDS = 15V = 1.0MHz Avalanche Characteristics EAS IAR Parameter Single Pulse Avalanche Energy Avalanche Current EAR Repetitive Avalanche Energy c d c Typ. --- --- Max. 530 20 Units mJ A --- 14 mJ Diode Characteristics Parameter Min. Typ. Max. Units 140 f Conditions IS Continuous Source Current --- --- ISM (Body Diode) Pulsed Source Current --- --- 560 VSD (Body Diode) Diode Forward Voltage --- --- 1.0 V p-n junction diode. TJ = 25C, IS = 12A, VGS = 0V trr Qrr Reverse Recovery Time Reverse Recovery Charge --- --- 39 37 58 55 ns nC TJ = 25C, IF = 12A, VDD = 15V di/dt = 100A/s ton Forward Turn-On Time 2 ch MOSFET symbol A showing the integral reverse D G S f f Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) www.irf.com IRLR/U7833PbF 1000 1000 VGS 10V 5.0V 4.5V 4.0V 3.5V 3.0V 2.8V 2.7V 100 BOTTOM TOP ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) TOP 100 2.7V 10 BOTTOM VGS 10V 5.0V 4.5V 4.0V 3.5V 3.0V 2.8V 2.7V 2.7V 10 60s PULSE WIDTH 60s PULSE WIDTH Tj = 175C Tj = 25C 1 1 0.1 1 10 0.1 100 10 100 V DS, Drain-to-Source Voltage (V) V DS, Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 1000 2.0 100 T J = 175C T J = 25C 10 VDS = 25V 60s PULSE WIDTH 1.0 ID = 30A VGS = 10V 1.5 (Normalized) RDS(on) , Drain-to-Source On Resistance ID, Drain-to-Source Current (A) 1 1.0 0.5 1 2 3 4 VGS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com 5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 T J , Junction Temperature (C) Fig 4. Normalized On-Resistance vs. Temperature 3 IRLR/U7833PbF 100000 6.0 VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, C ds SHORTED Crss = Cgd ID= 12A 10000 Ciss Coss 1000 Crss VDS= 24V VDS= 15V 5.0 VGS , Gate-to-Source Voltage (V) C, Capacitance(pF) Coss = Cds + Cgd 4.0 3.0 2.0 1.0 0.0 100 1 10 0 100 30 40 50 10000 100.00 ID, Drain-to-Source Current (A) 1000.00 ISD, Reverse Drain Current (A) 20 Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage Fig 5. Typical Capacitance vs. Drain-to-Source Voltage OPERATION IN THIS AREA LIMITED BY R DS(on) 1000 T J = 175C 100 10.00 T J = 25C 1.00 VGS = 0V 0.10 0.0 0.5 1.0 1.5 2.0 VSD, Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 10 Q G Total Gate Charge (nC) VDS, Drain-to-Source Voltage (V) 2.5 100sec 10 1msec Tc = 25C Tj = 175C Single Pulse 10msec 1 1 10 100 1000 VDS, Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRLR/U7833PbF 2.5 150 VGS(th) Gate threshold Voltage (V) LIMITED BY PACKAGE 125 ID , Drain Current (A) 100 75 50 25 2.0 ID = 250A 1.5 1.0 0.5 0.0 0 25 50 75 100 125 150 175 -75 -50 -25 TC, Case Temperature (C) 0 25 50 75 100 125 150 175 T J , Temperature ( C ) Fig 9. Maximum Drain Current vs. Case Temperature Fig 10. Threshold Voltage vs. Temperature (Z thJC) 10 1 Thermal Response D = 0.50 0.20 P DM 0.10 0.1 0.05 0.02 0.01 t1 SINGLE PULSE (THERMAL RESPONSE) t2 Notes: 1. Duty factor D = 2. Peak T 0.01 0.00001 0.0001 0.001 0.01 t1/ t 2 J = P DM x Z thJC +TC 0.1 1 t1, Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRLR/U7833PbF 15V 20V VGS + V - DD IAS 10000 A 0.01 tp EAS , Single Pulse Avalanche Energy (mJ) D.U.T RG ID 8.2A 14A BOTTOM 20A TOP 12500 DRIVER L VDS 15000 Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp 7500 5000 2500 0 25 50 75 100 125 150 Starting T J , Junction Temperature (C) Fig 12c. Maximum Avalanche Energy Vs. Drain Current I AS VDS Fig 12b. Unclamped Inductive Waveforms VGS RG Current Regulator Same Type as D.U.T. RD D.U.T. + -V DD V GS Pulse Width 1 s Duty Factor 0.1 % 50K 12V Fig 14a. Switching Time Test Circuit .2F .3F D.U.T. + V - DS VDS 90% VGS 3mA IG ID Current Sampling Resistors Fig 13. Gate Charge Test Circuit 6 10% VGS td(on) tr t d(off) tf Fig 14b. Switching Time Waveforms www.irf.com IRLR/U7833PbF D.U.T Driver Gate Drive + - - * D.U.T. ISD Waveform Reverse Recovery Current + RG * * * * dv/dt controlled by R G Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test V DD P.W. Period VGS=10V Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer D= Period P.W. + + Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage - Body Diode VDD Forward Drop Inductor Curent ISD Ripple 5% * VGS = 5V for Logic Level Devices Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs Id Vds Vgs Vgs(th) Qgs1 Qgs2 Qgd Qgodr Fig 16. Gate Charge Waveform www.irf.com 7 IRLR/U7833PbF Power MOSFET Selection for Non-Isolated DC/DC Converters Control FET Synchronous FET Special attention has been given to the power losses in the switching elements of the circuit - Q1 and Q2. Power losses in the high side switch Q1, also called the Control FET, are impacted by the Rds(on) of the MOSFET, but these conduction losses are only about one half of the total losses. The power loss equation for Q2 is approximated by; * Ploss = Pconduction + Pdrive + Poutput ( 2 Ploss = Irms x Rds(on) ) Power losses in the control switch Q1 are given by; + (Qg x Vg x f ) Ploss = Pconduction+ Pswitching+ Pdrive+ Poutput Q + oss x Vin x f + (Qrr x Vin x f ) 2 This can be expanded and approximated by; *dissipated primarily in Q1. Ploss = (Irms 2 x Rds(on ) ) Qgd +I x x Vin x ig Qgs 2 f + I x x Vin x f ig + (Qg x Vg x f ) + Qoss x Vin x f 2 This simplified loss equation includes the terms Qgs2 and Qoss which are new to Power MOSFET data sheets. Qgs2 is a sub element of traditional gate-source charge that is included in all MOSFET data sheets. The importance of splitting this gate-source charge into two sub elements, Qgs1 and Qgs2, can be seen from Fig 16. Qgs2 indicates the charge that must be supplied by the gate driver between the time that the threshold voltage has been reached and the time the drain current rises to Idmax at which time the drain voltage begins to change. Minimizing Q gs2 is a critical factor in reducing switching losses in Q1. Qoss is the charge that must be supplied to the output capacitance of the MOSFET during every switching cycle. Figure A shows how Qoss is formed by the parallel combination of the voltage dependant (nonlinear) capacitances Cds and Cdg when multiplied by the power supply input buss voltage. For the synchronous MOSFET Q2, Rds(on) is an important characteristic; however, once again the importance of gate charge must not be overlooked since it impacts three critical areas. Under light load the MOSFET must still be turned on and off by the control IC so the gate drive losses become much more significant. Secondly, the output charge Qoss and reverse recovery charge Qrr both generate losses that are transfered to Q1 and increase the dissipation in that device. Thirdly, gate charge will impact the MOSFETs' susceptibility to Cdv/dt turn on. The drain of Q2 is connected to the switching node of the converter and therefore sees transitions between ground and Vin. As Q1 turns on and off there is a rate of change of drain voltage dV/dt which is capacitively coupled to the gate of Q2 and can induce a voltage spike on the gate that is sufficient to turn the MOSFET on, resulting in shoot-through current . The ratio of Qgd/Qgs1 must be minimized to reduce the potential for Cdv/dt turn on. Figure A: Qoss Characteristic 8 www.irf.com IRLR/U7833PbF D-Pak (TO-252AA) Package Outline Dimensions are shown in millimeters (inches) D-Pak (TO-252AA) Part Marking Information (;$03/( 7+,6,6$1,5)5 3$57180%(5 :,7+$66(0%/< ,17(51$7,21$/ /27&2'( ,5)8 $ 5(&7,),(5 $66(0%/('21:: /2*2 ,17+($66(0%/