General Description
The MAX5930A/MAX5931A/MAX5931B +1V to +15V
triple hot-swap controllers provide complete protection
for multisupply systems. They allow the safe insertion
and removal of circuit cards into live backplanes. These
devices hot swap multiple supplies ranging from +1V to
+15V, provided one supply is at or above +2.7V. The
input voltage rails (channels) can be configured to
sequentially turn-on/off, track each other, or have com-
pletely independent operation.
The discharged filter capacitors of the circuit card provide
low impedance to the live backplane. High inrush cur-
rents from the backplane to the circuit card can burn up
connectors and components, or momentarily collapse the
backplane power supply leading to a system reset. The
MAX5930A/MAX5931A/MAX5931B hot-swap controllers
prevent such problems by gradually ramping up the out-
put voltage and regulating the current to a preset limit
when the board is plugged in, allowing the system to sta-
bilize safely. After the startup cycle is complete, on-chip
comparators provide VariableSpeed/BiLevel™ protection
against short-circuit and overcurrent faults, and provide
immunity against system noise and load transients.
The load is disconnected in the event of a fault condi-
tion. The MAX5930A/MAX5931A/MAX5931B fault-man-
agement mode is selectable, allowing latched fault or
autoretry after a fault condition.
The MAX5930A/MAX5931A/MAX5931B offer a variety of
options to reduce external component count and
design time. All devices integrate an on-board charge
pump to drive the gates of low-cost, external n-channel
MOSFETs, an adjustable startup timer, and an
adjustable current limit. The devices offer integrated
features like startup current regulation and current
glitch protection to eliminate external timing resistors
and capacitors. The MAX5931A provides an open-
drain, active-low status output for each channel, the
MAX5931B provides an open-drain, active-high status
output for each channel, and the MAX5930A status out-
put polarity is selectable.
The MAX5930A is available in a 24-pin QSOP package,
and the MAX5931A/MAX5931B are available in a 20-pin
QSOP package. All devices are specified over the
extended -40°C to +85°C temperature range.
Applications
Features
oSafe Hot Swap for +1V to +15V Power Supplies
with Any Input Voltage (VIN_) ≥ 2.7V
oAdjustable Circuit-Breaker/Current-Limit
Threshold from 25mV to 100mV
oConfigurable Tracking, Sequencing, or
Independent Operation Modes
oVariableSpeed/BiLevel Circuit-Breaker Response
oInternal Charge Pumps Generate n-Channel
MOSFET Gate Drives
oInrush Current Regulated at Startup
oAutoretry or Latched Fault Management
oProgrammable Undervoltage Lockout
oStatus Outputs Indicate Fault/Safe Condition
MAX5930A/MAX5931A/MAX5931B
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
________________________________________________________________
Maxim Integrated Products
1
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
MODE
ON3
LIM2
IN2LIM1
ON1
ON2
POL
TOP VIEW
SENSE2
GATE2
LIM3
IN3STAT1
GATE1
SENSE1
IN1
16
15
14
13
9
10
11
12
SENSE3
GATE3
GND
BIASSTAT3
LATCH
TIM
STAT2
QSOP
MAX5930A
Pin Configurations
Ordering Information
19-4200; Rev 0; 7/08
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
PART TEMP RANGE PIN-PACKAGE
MAX5930AEEG+ -40°C to +85°C 24 QSOP
MAX5931AEEP+ -40°C to +85°C 20 QSOP
MAX5931BEEP+ -40°C to +85°C 20 QSOP
VariableSpeed/BiLevel is a trademark of Maxim Integrated
Products, Inc.
Network Switches, Routers,
Hubs
Hot Plug-In Daughter Cards
RAID
Solid-State Circuit Breakers
Power-Supply
Sequencing/Tracking
Base-Station Line Cards
Portable Computer Device
Bays (Docking Stations)
Selector Guide and Typical Operating Circuit appear at end
of data sheet.
Pin Configurations continued at end of data sheet.
+
Denotes a lead-free/RoHS-compliant package.
MAX5930A/MAX5931A/MAX5931B
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages referenced to GND, unless otherwise noted.)
IN_ ..........................................................................-0.3V to +16V
GATE_.............................................................-0.3V to (IN_ + 6V)
BIAS (Note 1) .............................................. (VIN - 0.3V) to +16V
ON_, STAT_, LIM_ (MAX5930A), TIM, MODE,
LATCH, POL (MAX5930A)........................-0.3V to (VIN + 0.3V)
SENSE_........................................................-0.3V to (IN_ + 0.3V)
Current into Any Pin..........................................................±50mA
Continuous Power Dissipation (TA= +70°C)
20-Pin QSOP (derate 9.1mW/°C above +70°C)............727mW
24-Pin QSOP (derate 9.5mW/°C above +70°C)............762mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature .....................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
ELECTRICAL CHARACTERISTICS
(VIN_ = +1V to +15V, provided at least one supply is larger than or equal to +2.7V, TA= -40°C to +85°C, unless otherwise noted. Typical
values are at VIN1 = 12.0V, VIN2 = 5.0V, VIN3 = 3.3V, VON_ = +3.3V, and TA= +25°C.) (Notes 1, 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
POWER SUPPLIES
IN_ Input Voltage Range VIN_ At least one VIN_ ≥ +2.7V 1.0 15 V
Supply Current IQIIN1 + IIN2 + IIN3, VON_ = 2.7V,
VIN_ = +15V, after STAT_ high 2.5 5 mA
CURRENT CONTROL
LIM_ = GND (Note 4) 22.5 25 28
RLIM_ = 10kΩ (MAX5930A) 80 125
Slow-Comparator Threshold
(VIN_ - VSENSE_)
(Note 3)
VSC,TH
RLIM_ from LIM_ to GND (MAX5930A) RLIM_ x 7.5 x
10-6 + 25mV
mV
1mV overdrive 3 ms
Slow-Comparator Response Time
(Note 4) tSCD 50mV overdrive 130 µs
Fast-Comparator Threshold
(VIN_ - VSENSE_)VFC,TH 2 x
VSC
,
TH mV
Fast-Comparator Response Time tFCD 10mV overdrive, from overload condition 200 ns
SENSE_ Input Bias Current IB SENSE_ VSENSE_ = VIN_ 0.03 1 µA
MOSFET DRIVER
RTIM = 100kΩ8.0 10.8 13.6
RTIM = 4kΩ (minimum value) 0.30 0.4 0.55Startup Period (Note 5) tSTART
TIM unconnected (default) 5 9 14
ms
Note 1: VIN is the largest of VIN1, VIN2, and VIN3.
MAX5930A/MAX5931A/MAX5931B
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VIN_ = +1V to +15V, provided at least one supply is larger than or equal to +2.7V, TA= -40°C to +85°C, unless otherwise noted. Typical
values are at VIN1 = 12.0V, VIN2 = 5.0V, VIN3 = 3.3V, VON_ = +3.3V, and TA= +25°C.) (Notes 1, 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Charging, VGATE_ = GND, VIN_ = +5V
(Note 6) 80 100 125
Discharging, during startup 100
µA
Discharging, normal turn-off or triggered by
the slow comparator after startup; VGATE_ =
5V, VIN_ = 10V, VON_ = 0V
237
Average Gate Current IGATE
Discharging, triggered by a fault after
startup; VGATE_ = 5V, VIN_ = 10V, (VIN_ -
VSENSE_) > VFC,TH_ (Note 7)
28 50 120
mA
Gate-Drive Voltage VDRIVE VGATE_ - VIN_, IGATE_ = 1µA 4.9 5.3 5.6 V
ON COMPARATOR
Low to high 0.83 0.875 0.90 V
ON_ Threshold VON_
,
TH Hysteresis 25 mV
ON_ Propagation Delay 10mV overdrive 10 µs
ON_ Voltage Range VON_ Without false output inversion VIN V
ON_ Input Bias Current IBON VON_ = VIN 0.03 1 µA
ON_ Pulse-Width Low tUNLATCH To unlatch after a latched fault 100 µs
DIGITAL OUTPUTS (STAT_)
Output Leakage Current VSTAT_ ≤ 15V 1 µA
Output Voltage Low VOL_ POL = unconnected (MAX5930A),
ISINK = 1mA 0.4 V
UNDERVOLTAGE LOCKOUT (UVLO)
UVLO Threshold VUVLO
Startup is initiated when this threshold is
reached by any VIN_ and VON_ > 0.9V
(Note 8)
2.25 2.45 2.65 V
UVLO Hysteresis VUVLO
,
HYST 250 mV
UVLO Glitch Filter Reset Time tD,GF V
I N
< V
U V L O m axi m um p ul se w i d th to r eset 10 µs
UVLO to Startup Delay tD,UVLO Time input voltage must exceed VUVLO
before startup is initiated 20 37.5 60 ms
Input Power-Ready Threshold VPWRRDY (Note 9) 0.9 0.95 1.0 V
Input Power-Ready Hysteresis VPWRHYST 50 mV
LOGIC AND TIMING
POL Input Pullup IPOL POL = GND (MAX5930A) 2 4 6 µA
LATCH Input Pullup ILATCH LATCH = GND 2 4 6 µA
MODE Input Voltage VMODE MODE unconnected (default to sequencing
mode) 1.0 1.25 1.5 V
Independent-Mode Selection
Threshold VINDEP
,
TH VMODE rising 0.4 V
MAX5930A/MAX5931A/MAX5931B
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VIN_ = +1V to +15V, provided at least one supply is larger than or equal to +2.7V, TA= -40°C to +85°C, unless otherwise noted. Typical
values are at VIN1 = 12.0V, VIN2 = 5.0V, VIN3 = 3.3V, VON_ = +3.3V, and TA= +25°C.) (Notes 1, 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Tracking-Mode Selection
Threshold VTRACK
,
TH VMODE rising 2.7 V
MODE Input Impedance RMODE 200 kΩ
Autoretry Delay tRETRY Delay time to restart after fault shutdown 64 x
tSTART ms
Note 2: All devices are 100% tested at TA= +85°C. Limits over temperature are guaranteed by design.
Note 3: The slow-comparator threshold is adjustable. VSC,TH = RLIM_ x 7.5µA + 25mV (see the
Typical Operating Characteristics
section).
Note 4: The current-limit slow-comparator response time is weighed against the amount of overcurrent, the higher the overcurrent
condition, the faster the response time (see the
Typical Operating Characteristics
section).
Note 5: The startup period (tSTART) is the time during which the slow comparator is ignored and the device acts as a current-limiter
by regulating the sense current with the fast comparator (see the
Startup Period
section).
Note 6: The current available at GATE is a function of VGATE (see the
Typical Operating Characteristics
section).
Note 7: After a fault triggered by the fast comparator, the gate is discharged by the strong discharge current.
Note 8: Each channel input while the other inputs are at +1V.
Note 9: Each channel input while any other input is at +3.3V.
Typical Operating Characteristics
(
Typical Operating Circuit
, Q1 = Q2 = Q3 = Fairchild FDB7030L, VIN1 = +12.0V, VIN2 = +5.0V, VIN3 = +1V, TA= +25°C, unless oth-
erwise noted. Channels 1 through 3 are identical in performance. Where characteristics are interchangeable, channels 1 through 3
are referred to as X, Y, and Z.)
0
1
2
3
4
SUPPLY CURRENT vs. INPUT VOLTAGE
MAX5930A toc01
VINX (V)
IIN (mA)
0682 4 10 12 14
VINY = VINZ = 2.7V
IINX + IINY + IINZ
IINX
IINY + IINZ
1.0
2.0
3.0
4.0
5.0
264 8 10 12 14
TOTAL SUPPLY CURRENT
vs. INPUT VOLTAGE
MAX5930A toc02
VIN (V)
IIN (mA)
IIN = IIN1 + IIN2 + IIN3
VIN = VINX = VINY = VINZ
VON = VON1 = VON2 = VON3
VON = 0V
VON = 3.3V
0
2
4
6
8
GATE-DRIVE VOLTAGE
vs. INPUT VOLTAGE
MAX5930A toc04
VINX (V)
VDRIVEX (V)
0682 4 10 12 14
VINY = VINZ = 2.7V
MAX5930A/MAX5931A/MAX5931B
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
_______________________________________________________________________________________
5
0
2
4
6
8
GATE-DRIVE VOLTAGE
vs. INPUT VOLTAGE
MAX5930A toc04
VINX (V)
VDRIVEX (V)
0682 4 10 12 14
VINY = VINZ = 2.7V
0
30
90
60
120
150
GATE CHARGE CURRENT
vs. GATE VOLTAGE
MAX5930A toc05
VGATEX (V)
GATE CHARGE CURRENT (μA)
01051520
VONW = VINY = VINZ = 2.7V
VINX = 13.2V
VINX = 5V
VINX = 1V
0
40
120
80
160
200
GATE CHARGE CURRENT
vs. TEMPERATURE
MAX5930A toc06
TEMPERATURE (°C)
GATE CHARGE CURRENT (μA)
-40 3510-15 60 85
VONX = VINY = VINZ = 2.7V
VGATEX = 0V
VINX = 13.2V
VINX = 5V
VINX = 1V
0
2
1
4
3
5
6
020
STRONG GATE DISCHARGE CURRENT
vs. GATE VOLTAGE
MAX5930A toc07
VGATEX (V)
GATE DISCHARGE CURRENT (mA)
841216
VINX = 13.2V
VINX = 1V
VINX = 5V
VINX = 3.3V
VONX = 0V
VINY = VINZ = 2.7V
0
2
1
4
3
5
6
-40 85
STRONG GATE DISCHARGE CURRENT
vs. TEMPERATURE
MAX5930A toc08
TEMPERATURE (°C)
GATE DISCHARGE CURRENT (mA)
10-15 35 60
VINX = 13.2V
VINX = 5V
VINX = 3.3V
VINX = 1V
VONX = 0V
VINY = VINZ = 2.7V
10
0 25 50 75 100 125
1
0.1
0.01
0.001
0.0001
TURN-OFF TIME
vs. SENSE VOLTAGE
MAX5930A toc09
VINX - VSENSEX (mV)
TURN-OFF TIME (ms)
RLIMX = 100Ω
SLOW-COMPARATOR
THRESHOLD
FAST-COMPARATOR
THRESHOLD
TURN-OFF TIME vs. SENSE VOLTAGE
(EXPANDED SCALE)
MAX5930A toc10
VINX - VSENSEX (mV)
TURN-OFF TIME (ms)
10
0.1
1
20 25 30 35 40 45 50
RLIMX = 100Ω
SLOW-COMPARATOR THRESHOLD
0
40
20
60
100
80
120
SLOW-COMPARATOR THRESHOLD
vs. RLIMX
MAX5930A toc11
RLIMX (kΩ)
VSC,TH (mV)
02648
10
0
20
40
60
STARTUP PERIOD
vs. RTIM
MAX5930A toc12
RTIM (kΩ)
tSTART (ms)
0 100 200 400300 500
Typical Operating Characteristics (continued)
(
Typical Operating Circuit
, Q1 = Q2 = Q3 = Fairchild FDB7030L, VIN1 = +12.0V, VIN2 = +5.0V, VIN3 = +1V, TA= +25°C, unless oth-
erwise noted. Channels 1 through 3 are identical in performance. Where characteristics are interchangeable, channels 1 through 3
are referred to as X, Y, and Z.)
MAX5930A/MAX5931A/MAX5931B
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
6 _______________________________________________________________________________________
TURN-OFF TIME
SLOW-COMPARATOR FAULT
MAX5930A toc13
VSTATX
2V/div
VGATEX
5V/div
VINX - VSENSEX
25mV/div
AC-COUPLED
0V
0V
1ms/div
TURN-OFF TIME
FAST-COMPARATOR FAULT
MAX5930A toc14
VSTATX
2V/div
VGATEX
5V/div
VINX - VSENSEX
100mV/div
0V
0V
0V
100ns/div
STARTUP WAVEFORMS FAST TURN-ON
(CGATE = 0nF, CBOARD = 1000μF)
MAX5930A toc15
VONX
5V/div
VGATEX
10V/div
VSTATX
5V/div
IOUTX
2A/div
VOUTX
5V/div
2ms/div
STARTUP WAVEFORMS SLOW TURN-ON
(CGATE = 0.22μF, CBOARD = 1000μF)
MAX5930A toc16
VON
5V/div
VGATEX
10V/div
VSTATX
5V/div
IOUTX
2A/div
VOUTX
5V/div
2ms/div
AUTORETRY DELAY
MAX5930A toc17
VGATEX
2V/div
0V
0V
0V
VOUTX
2V/div
IOUTX
500mA/div
100ms/div
TURN-ON IN
VOLTAGE-TRACKING MODE
MAX5930A toc18
VINX
2V/div
0V
0V
VONX
2V/div
5V/div
4ms/div
VPWRRDY
VGATEY
VGATEX
Typical Operating Characteristics (continued)
(
Typical Operating Circuit
, Q1 = Q2 = Q3 = Fairchild FDB7030L, VIN1 = +12.0V, VIN2 = +5.0V, VIN3 = +1V, TA= +25°C, unless oth-
erwise noted. Channels 1 through 3 are identical in performance. Where characteristics are interchangeable, channels 1 through 3
are referred to as X, Y, and Z.)
XXXX
MAX5930A toc19
VINX
2V/div
0V
VONX
2V/div
5V/div
0V
4ms/div
VGATEY
VGATEX
VPWRRDY
TURN-OFF IN
VOLTAGE-TRACKING MODE
XXXX
MAX5930A toc20
VINX
2V/div
VONX
2V/div
0V
5V/div
4ms/div
VGATEY
VGATEX
TURN-ON IN
POWER-SEQUENCING MODE
VPWRRDY
0V
0V
XXXX
MAX5930A toc21
VINX
2V/div
VONX
2V/div
5V/div
0V
0V
0V
4ms/div
VGATEY
VGATEX
TURN-OFF IN
POWER-SEQUENCING MODE
VPWRRDY
MAX5930A/MAX5931A/MAX5931B
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
_______________________________________________________________________________________
7
XXXX
MAX5930A toc22
VINX
2V/div
VONX
2V/div
5V/div
0V
4ms/div
TURN-ON IN
INDEPENDENT MODE
VGATEY
VGATEX
0V
XXXX
MAX5930A toc23
VINX
2V/div
0V
VONX
2V/div
5V/div
0V
4ms/div
TURN-OFF IN
INDEPENDENT MODE
VPWRRDY
VGATEY
VGATEX
0
20
10
30
40
50
20 50
STRONG GATE DISCHARGE CURRENT
vs. OVERDRIVE
MAX5930A toc24
VIN_ - VSENSE_ (mV)
GATE DISCHARGE CURRENT (mA)
3525 30 40 45
VINX = 5V
VINX = 2.7V
VONX = VIN
VGATE = 5V
AFTER STARTUP
LIM_ = GND VINX = 12V
Typical Operating Characteristics (continued)
(
Typical Operating Circuit
, Q1 = Q2 = Q3 = Fairchild FDB7030L, VIN1 = +12.0V, VIN2 = +5.0V, VIN3 = +1V, TA= +25°C, unless oth-
erwise noted. Channels 1 through 3 are identical in performance. Where characteristics are interchangeable, channels 1 through 3
are referred to as X, Y, and Z.)
MAX5930A/MAX5931A/MAX5931B
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
8 _______________________________________________________________________________________
Pin Description
PIN
MAX5930A MAX5931A/
MAX5931B
NAME FUNCTION
1 — POL STAT Output-Polarity Select. See Table 3 and the Status Outputs (STAT_) section.
2 1 ON2 On/Off Channel 2 Control Input. See the Mode section.
3 2 ON1 On/Off Channel 1 Control Input. See the Mode section.
4 — LIM1 Channel 1 Current-Limit Setting. Connect a resistor from LIM1 to GND to set current-trip
level. Connect to GND for the default 25mV threshold. Do not leave LIM1 unconnected.
5 3 IN1 Channel 1 Supply Input. Connect to a 1V to 15V supply voltage and to one end of RSENSE1.
Bypass with a 0.1µF capacitor to ground.
6 4 SENSE1 Channel 1 Current-Sense Input. Connect SENSE1 to the drain of an external MOSFET and
to one end of RSENSE1.
7 5 GATE1 Channel 1 Gate-Drive Output. Connect to the gate of the external n-channel MOSFET.
8 6 STAT1 Op en- D r ai n S tatus S i g nal for C hannel 1. S TAT1 asser ts w hen hot sw ap i s successful and tS T AR T
has el ap sed . S TAT1 d easser ts i f ON 1 i s l ow , or i f channel 1 i s tur ned off for any faul t cond i ti on.
9 7 STAT2 Op en- D r ai n S tatus S i g nal for C hannel 2. S TAT2 asser ts w hen hot sw ap i s successful and tS T AR T
has el ap sed . S TAT2 d easser ts i f ON 2 i s l ow , or i f channel 2 i s tur ned off for any faul t cond i ti on.
10 8 TIM
Startup Timer Setting. Connect a resistor from TIM to GND to set the startup period. Leave
TIM unconnected for the default startup period of 9ms. RTIM must be between 4kΩ and
500kΩ.
11 9 LATCH Latch/Autoretry Selection Input. Connect LATCH to GND for autoretry mode after a fault.
Leave LATCH unconnected for latch mode.
12 10 STAT3
Open-Drain Status Signal for Channel 3. STAT3 asserts when hot swap is successful and
tSTART has elapsed. STAT3 deasserts if ON3 is low, or if channel 3 is turned off for any fault
condition.
13 11 BIAS S up p l y Refer ence Outp ut. The hi g hest sup p l y i s avai l ab l e at BIAS for fi l ter i ng . C onnect a 1nF
to 10nF cer am i c cap aci tor fr om BIAS to GN D . N o other connecti ons ar e al l ow ed to BIAS .
14 12 GND Ground
15 13 GATE3 Channel 3 Gate-Drive Output. Connect to gate of external n-channel MOSFET.
16 14 SENSE3 Channel 3 Current-Sense Input. Connect SENSE3 to the drain of an external MOSFET and
to one end of RSENSE3.
17 15 IN3 Channel 3 Supply Input. Connect to a supply voltage from 1V to 15V and to one end of
RSENSE3. Bypass with a 0.1µF capacitor to ground.
18 — LIM3 Channel 3 Current-Limit Setting. Connect a resistor from LIM3 to GND to set current-trip
level. Connect to GND for the default 25mV threshold. Do not leave LIM3 unconnected.
19 16 GATE2 Channel 2 Gate-Drive Output. Connect to gate of external n-channel MOSFET.
20 17 SENSE2 Channel 2 Current-Sense Input. Connect SENSE2 to the drain of an external MOSFET and
to one end of RSENSE2.
21 18 IN2 Channel 2 Supply Input. Connect to a 1V to 15V supply voltage and to one end of RSENSE2.
Bypass with a 0.1µF capacitor to ground.
22 — LIM2 Channel 2 Current-Limit Setting. Connect a resistor from LIM2 to GND to set current-trip
level. Connect to GND for the default 25mV threshold. Do not leave LIM2 unconnected.
Detailed Description
The MAX5930A/MAX5931A/MAX5931B are circuit-
breaker ICs for hot-swap applications where a line card
is inserted into a live backplane. The MAX5931A/
MAX5931B operate down to 1V provided one of the
inputs is above 2.7V. Normally, when a line card is
plugged into a live backplane, the card’s discharged
filter capacitors provide low impedance that can
momentarily cause the main power supply to collapse.
The MAX5930A/MAX5931A/MAX5931B reside either on
the backplane or on the removable card to provide
inrush current limiting and short-circuit protection. This
is achieved by using external n-channel MOSFETs,
external current-sense resistors, and on-chip compara-
tors. The startup period and current-limit threshold of
the MAX5930A/MAX5931A/MAX5931B can be adjusted
with external resistors. Figure 1 shows the MAX5930A/
MAX5931A/MAX5931B functional diagram.
The MAX5930A offers three programmable current lim-
its, selectable fault-management mode, and selectable
STAT_ output polarity. The MAX5930A features fixed
current limits, selectable fault-management mode, and
fixed STAT_ output polarity.
Mode
The MAX5930A/MAX5931A/MAX5931B support three
modes of operation: voltage-tracking, power-sequenc-
ing, and independent mode. Select the appropriate
mode according to Table 1.
Voltage-Tracking Mode
Connect MODE high to enter voltage-tracking mode.
While in voltage-tracking mode, all channels turn on
and off together. To turn all channels on:
• At least one VIN_ must exceed VUVLO (2.45V) for the
UVLO to startup delay (37.5ms).
• All VIN_ must exceed VPWRRDY (0.95V).
• All VON_ must exceed VON,TH (0.875V).
• No faults may be present on any channel.
The MAX5930A/MAX5931A/MAX5931B turn off all
channels if any of the above conditions are not met.
After a fault-latched shutdown, cycle any of the ON_
pins to unlatch and restart all channels.
Power-Sequencing Mode
Leave MODE unconnected to enter power-sequencing
mode. While in power-sequencing mode, the
MAX5930A/MAX5931A/MAX5931B turn on and off each
channel depending on the state of the corresponding
VON_. To turn on a given channel:
• At least one VIN_ must exceed VUVLO (2.45V) for the
UVLO to startup delay (37.5ms).
• All VIN_ must exceed VPWRRDY (0.95V).
• The corresponding VON_ must exceed VON,TH
(0.875V).
• No faults may be present on any channel.
The MAX5930A/MAX5931A/MAX5931B turn off all chan-
nels if any of the above conditions are not met. After a
fault-latched shutdown, cycle any of the ON_ inputs to
unlatch and restart all channels, dependent on the corre-
sponding VON_ state.
Independent Mode
Connect MODE to GND to enter independent mode.
While in independent mode the MAX5930A/
MAX5931A/MAX5931B provide complete independent
control for each channel. To turn on a given channel:
• At least one VIN_ must exceed VUVLO (2.45V) for the
UVLO to startup delay (37.5ms).
• The corresponding VIN_ must exceed VPWRRDY
(0.95V).
• The corresponding VON_ must exceed VON,TH
(0.875V).
MAX5930A/MAX5931A/MAX5931B
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
_______________________________________________________________________________________ 9
MODE OPERATION
High (Connect to BIAS) Voltage Tracking
Unconnected Voltage Sequencing
GND Independent
Table 1. Operational Mode Selection
PIN
MAX5930A MAX5931A/
MAX5931B
NAME FUNCTION
23 19 ON3 On/Off Channel 3 Control Input. See the Mode section.
24 20 MODE Mode Configuration Input. Mode is configured according to Table 1 as soon as one of the
IN_ voltages exceeds UVLO and before turning on OUT_ (see the Mode section).
Pin Description (continued)
MAX5930A/MAX5931A/MAX5931B
The MAX5930A/MAX5931A/MAX5931B turn off the cor-
responding channel if any of the above conditions are
not met. During a fault condition on a given channel
only, the affected channel is disabled. After a fault-
latched shutdown, recycle the corresponding ON_
inputs to unlatch and restart only the corresponding
channel.
Startup Period
RTIM sets the duration of the startup period from 0.4ms
(RTIM = 4kΩ) to 51ms (RTIM = 500kΩ) (see the
Setting
the Startup Period, R
TIM
section). The default startup
period is fixed at 9ms when TIM is unconnected. The
startup period begins after the turn-on conditions are
met as described in the
Mode
section, and the device
is not latched or in its autoretry delay (see the
Latched
and Autoretry Fault Management
section).
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
10 ______________________________________________________________________________________
FAST
COMPARATOR
SLOW
COMPARATOR
FAST DISCHARGE
Q1
OUT1
2.45V
BIAS AND
REFERENCES
STARTUP
OSCILLATOR
TIMING
OSCILLATOR
CHARGE
PUMP DEVICE CONTROL
LOGIC
VSC, TH VFC, TH
RLIM1
SENSE1
IN1
GATE1
RSENSE1
LIM1*
RTIM
TIM
1nF
BIAS POL*
RLIM2
3mA
50mA 100μA
UVLO
UVLO
FAST
COMPARATOR
SLOW
COMPARATOR
FAST DISCHARGE
SLOW DISCHARGESLOW DISCHARGE
Q2
OUT2
CHARGE
PUMP
CURRENT CONTROL
AND
STARTUP LOGIC
CURRENT CONTROL
AND
STARTUP LOGIC
VSC, TH
VFC, TH
SENSE2
IN2
GATE2
RSENSE2
LIM2*
100μA
3mA
50mA
STAT2STAT1
LIM3*
FAST
COMPARATOR
SLOW
COMPARATOR
FAST DISCHARGE
Q3
OUT3
FAULT
MANAGEMENT
OPERATION
MODE
CHARGE
PUMP
ON
INPUT
COMPARATORS
VSC, TH VFC, TH
SENSE3
IN3
GATE3
RSENSE3
RLIM3
3mA
50mA 100μA
UVLO
SLOW DISCHARGE
CURRENT CONTROL
AND
STARTUP LOGIC
STAT3*MAX5930A ONLY. LATCH* MODEON1 ON2 ON3
MAX5930A
MAX5931A
MAX5931B
Figure 1. Functional Diagram
MAX5930A/MAX5931A/MAX5931B
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
______________________________________________________________________________________ 11
ON1
ON2
ON3
ANY
IN_
IN2
IN3
OUT1*
OUT3*
OUT2*
VUVLO (2.45V)
VPWRRDY (0.95V)
VPWRRDY (0.95V)
VPWRRDY (0.95V)
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY OF THE LOAD RESISTANCE AND CAPACITANCE.
Figure 2. Voltage-Tracking Timing Diagram (Provided tD, UVLO Requirement is Met)
MAX5930A/MAX5931A/MAX5931B
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
12 ______________________________________________________________________________________
ON1
ON2
ON3
ANY
IN_
IN2
IN3
OUT1
OUT2
OUT3
VUVLO (2.45V)
VPWRRDY (0.95V)
VPWRRDY (0.95V)
VPWRRDY (0.95V)
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY OF THE LOAD RESISTANCE AND CAPACITANCE.
*
*
*
Figure 3. Power-Sequencing Timing Diagram (Provided tD, UVLO Requirement is Met)
The MAX5930A/MAX5931A/MAX5931B limit the load
current if an overcurrent fault occurs during startup
instead of completely turning off the external MOSFETs.
The slow comparator is disabled during the startup
period and the load current can be limited in two ways:
1) Slowly enhancing the MOSFETs by limiting the
MOSFET gate-charging current.
2) Limiting the voltage across the external current-
sense resistor.
During the startup period, the gate-drive current is limit-
ed to 100µA and decreases with the increase of the gate
voltage (see the
Typical Operating Characteristics
sec-
tion). This allows the controller to slowly enhance the
MOSFETs. If the fast comparator detects an overcurrent,
the MAX5930A/MAX5931A/MAX5931B regulate the gate
voltage to ensure that the voltage across the sense resis-
tor does not exceed VSU,TH. This effectively regulates
the inrush current during startup.
Figure 6 shows the startup waveforms. STAT_ is assert-
ed immediately after the startup period if no fault condi-
tion is present.
VariableSpeed/BiLevel Fault Protection
VariableSpeed/BiLevel fault protection incorporates
comparators with different thresholds and response
times to monitor the load current (Figure 7). During the
startup period, protection is provided by limiting the
load current. Protection is provided in normal operation
(after the startup period has expired) by discharging
the MOSFET gates with a strong 3mA/50mA pulldown
current in response to a fault condition. After a fault,
STAT_ is deasserted. Use the LATCH input to control
whether the STAT_ outputs latch off or autoretry (see
the
Latched and Autoretry Fault Management
section).
Slow-Comparator Startup Period
The slow comparator is disabled during the startup
period while the external MOSFETs are turning on.
Disabling the slow comparator allows the device to
ignore the higher-than-normal inrush current charging
the board capacitors when a card is first plugged into a
live backplane.
Slow-Comparator Normal Operation
After the startup period is complete, the slow comparator
is enabled and the device enters normal operation. The
comparator threshold voltage (VSC,TH) is adjustable from
25mV to 100mV. The slow-comparator response time is
3ms for a 1mV overdrive. The response time decreases
to 100µs with a large overdrive. The variable-speed
response time allows the MAX5930A/MAX5931A/
MAX5931B to ignore low-amplitude momentary glitches,
thus increasing system noise immunity. After an extend-
ed overcurrent condition, a fault is generated, STAT_ out-
puts are deasserted and the MOSFET gates are
discharged with a 3mA pulldown current.
Fast-Comparator Startup Period
During the startup period, the fast comparator regu-
lates the gate voltages to ensure that the voltage
across the sense resistor does not exceed the startup
fast-comparator threshold voltage (VSU,TH), VSU,TH is
scaled to two times the slow-comparator threshold
(VSC,TH).
MAX5930A/MAX5931A/MAX5931B
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
______________________________________________________________________________________ 13
Figure 4. Power-Sequencing Fault Turn-Off
ON1 = ON2 = ON3
OVERCURRENT
FAULT
CONDITION
OUT1
OUT2
OUT3
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY
OF THE LOAD RESISTANCE AND CAPACITANCE.
*
*
*
MAX5930A/MAX5931A/MAX5931B
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
14 ______________________________________________________________________________________
ON1
ON2
ON3
IN1
IN2
IN3
OUT1
OUT2
OUT3
VUVLO (2.45V)
VPWRRDY (0.95V)
VPWRRDY (0.95V)
VPWRRDY (0.95V)
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY OF THE LOAD RESISTANCE AND CAPACITANCE.
tD,UVLO
*
*
*
Figure 5. Independent-Mode Timing Diagram
Fast-Comparator Normal Operation
In normal operation, if the load current reaches the fast-
comparator threshold, a fault is generated, STAT_ is
deasserted, and the MOSFET gates are discharged
with a strong 50mA pulldown current. This happens in
the event of a serious current overload or a dead short.
The fast-comparator threshold voltage (VFC,TH) is
scaled to two times the slow-comparator threshold
(VSC,TH). This comparator has a fast response time of
200ns (Figure 7).
Undervoltage Lockout (UVLO)
The UVLO prevents the MAX5930A/MAX5931A/
MAX5931B from turning on the external MOSFETs until
one input voltage exceeds the UVLO threshold (2.45V)
for tD,UVLO. The MAX5930A/MAX5931A/MAX5931B use
power from the highest input voltage rail for the charge
pumps. This allows for more efficient charge-pump oper-
ation. The highest VIN_ is provided as an output at BIAS.
The UVLO protects the external MOSFETs from an insuffi-
cient gate-drive voltage. tD,UVLO ensures that the board
is fully inserted into the backplane and that the input volt-
ages are stable. The MAX5930A/MAX5931A/MAX5931B
include a UVLO glitch filter (tD,GF) to reject all input volt-
age noise and transients. Bringing all input supplies
below the UVLO threshold for longer than tD,GF reinitiates
tD,UVLO and the startup period, tSTART. See Figure 8 for
an example of automatic turn-on function.
Latched and Autoretry Fault Management
The MAX5930A can be configured to latch the external
MOSFETs off or to autoretry (see Table 2). Toggling
ON_ below 0.875V for at least 100µs clears the
MAX5930A/MAX5931A/MAX5931B (LATCH = uncon-
nected) fault and reinitiates the startup period.
Similarly, the MAX5930A/MAX5931A/MAX5931B
(LATCH = GND) turn the external MOSFETs off when
an overcurrent fault is detected, then automatically
restart after the autoretry delay that is internally set to
64 times tSTART.
Status Outputs (STAT_)
The status (STAT_) outputs are open-drain outputs that
assert when hot swap is successful and tSTART has
elapsed. STAT_ deasserts if ON_ is low or if the chan-
nel is turned off for any fault condition.
The polarity of the STAT_ outputs is selected using POL
for the MAX5930A (see Table 3). Tables 4 and 5 con-
tain the MAX5930A/MAX5931A/MAX5931B truth tables.
MAX5930A/MAX5931A/MAX5931B
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
______________________________________________________________________________________ 15
Figure 6. Independent-Mode Startup Waveforms
tON
VDRIVE
VGATE_
VGATE_
ON_
STAT_
VTH
VOUT_
VOUT_
ILOAD_
tSTART
CBOARD_ = LARGE
CBOARD_ = 0
VFC,TH
RSENSE_
Figure 7. VariableSpeed/BiLevel Response
SENSE VOLTAGE (VIN - VSENSE)
TURN-OFF TIME
VSC,TH VFC,TH
(2 x VSC,TH)
3ms
130μs
200ns
SLOW
COMPARATOR
FAST
COMPARATOR
MAX5930A/MAX5931A/MAX5931B
Applications Information
Component Selection
n-Channel MOSFETs
Select the external MOSFETs according to the applica-
tion’s current levels. Table 6 lists recommended com-
ponents. The MOSFET’s on-resistance (RDS(ON))
should be chosen low enough to have a minimum volt-
age drop at full load to limit the MOSFET power dissi-
pation. High RDS(ON) causes output ripple if there is a
pulsating load. Determine the device power rating to
accommodate a short-circuit condition on the board at
startup and when the device is in autoretry mode (see
the
MOSFET Thermal Considerations
section).
Using these devices in latched mode allows the use of
MOSFETs with lower power ratings. A MOSFET typical-
ly withstands single-shot pulses with higher dissipation
than the specified package rating. Table 7 lists some
recommended MOSFET manufacturers.
Sense Resistor
The slow-comparator threshold voltage is adjustable
from 25mV to 100mV. Select a sense resistor that caus-
es a drop equal to the slow-comparator threshold volt-
age at a current level above the maximum normal
operating current. Typically, set the overload current at
1.2 to 1.5 times the full load current. The fast-compara-
tor threshold is two times the slow-comparator thresh-
old in normal operating mode. Choose the sense-
resistor power rating to be greater than or equal to 2 x
(IOVERLOAD) x VSC,TH. Table 7 lists some recommend-
ed sense-resistor manufacturers.
Slow-Comparator Threshold, R
LIM_
(MAX5930A)
The slow-comparator threshold voltage is adjustable
from 25mV to 100mV, allowing designers to fine-tune
the current-limit threshold for use with standard-value
sense resistors. Low slow-comparator thresholds allow
for increased efficiency by reducing the power dissi-
pated by the sense resistor. Furthermore, the low 25mV
slow-comparator threshold is beneficial when operating
with supply rails down to 1V because it allows a small
percentage of the overall output voltage to be used for
current sensing. The VariableSpeed/BiLevel fault pro-
tection feature offers inherent system immunity against
load transients and noise. This allows the slow-com-
parator threshold to be set close to the maximum nor-
mal operating level without experiencing nuisance
faults. To adjust the slow-comparator threshold, calcu-
late RLIM_ as follows:
where VTH is the desired slow-comparator threshold
voltage. Shorting LIM_ to GND sets VTH to 25mV. Do
not leave LIM_ unconnected.
RVmV
A
LIM TH
_.
=−
μ
25
75
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
16 ______________________________________________________________________________________
LATCH FAULT MANAGEMENT
Unconnected Fault condition latches MOSFETs off
Low Autoretry mode
Table 2. Selecting Fault-Management
Mode (MAX5930A)
POL STAT_
Low Asserts low
Unconnected Asserts high (open-drain)
Table 3. Selecting STAT_ Polarity
(MAX5930A)
Figure 8. Automatic Turn-On When Input Voltages are Above
their Respective Undervoltage Lockout Threshold (Provided
tD,UVLO Requirement is Met)
MAX5930A
MAX5931A
MAX5931B
V1
ON1
ON2
ON3
GND
GND
ON1
ON2
ON3
REMOVABLE CARDBACKPLANE
V2
V3
MAX5930A/MAX5931A/MAX5931B
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
______________________________________________________________________________________ 17
PART CHANNEL 1
FAULT
CHANNEL 2
FAULT
CHANNEL 3
FAULT
STAT1/
GATE1*
STAT2/
GATE2*
STAT3/
GATE3*
Yes X X L/OFF L/OFF L/OFF
X Yes X L/OFF L/OFF L/OFF
X X Yes L/OFF L/OFF L/OFF
X X X L/OFF L/OFF L/OFF
MAX5930A (POL = 1),
MAX5931B
No No No H/ON H/ON H/ON
Yes X X H/OFF H/OFF H/OFF
X Yes X H/OFF H/OFF H/OFF
X X Yes H/OFF H/OFF H/OFF
X X X H/OFF H/OFF H/OFF
MAX5930A (POL = 0),
MAX5931A
No No No L/ON L/ON L/ON
Table 4. Status Output Truth Table: Voltage-Tracking and Power-Sequencing Modes
Note: STAT_ is asserted when hot swap is successful and tON has elapsed. STAT_ is unasserted during a fault.
CHANNEL 1
FAULT
CHANNEL 2
FAULT
CHANNEL 3
FAULT
STAT1/
GATE1
STAT2/
GATE2
STAT3/
GATE3
Yes Yes Yes Unasserted/OFF Unasserted/OFF Unasserted/OFF
Yes Yes No Unasserted/OFF Unasserted/OFF Asserted/ON
Yes No Yes Unasserted/OFF Asserted/ON Unasserted/OFF
Yes No No Unasserted/OFF Asserted/ON Asserted/ON
No Yes Yes Asserted/ON Unasserted/OFF Unasserted/OFF
No Yes No Asserted/ON Unasserted/OFF Asserted/ON
No No Yes Asserted/ON Asserted/ON Unasserted/OFF
No No No Asserted/ON Asserted/ON Asserted/ON
Table 5. Status Output Truth Table: Independent Mode
*
L = Low, H = High.
PART NUMBER MANUFACTURER DESCRIPTION
FDB8030L 10mΩ, 8-pin SO, 30V
FDC653N 55mΩ, SuperSOT-6, 30V, 5A
FDS6670A 3.5mΩ, D2PAK, 30V
FDS6692A
Fairchild Semiconductor
14mΩ, 8-pin SO, 30V
IRF6635TRPBF 1.8mΩ, DirectFET MX, 30V
IRF7413 11mΩ, 8-pin SO, 30V
IRF7401 22mΩ, 8-pin SO, 20V
IRF7805ZPBF
International Rectifier
7mΩ, 8-pin SO, 30V
NTMS4N01R2G 40mΩ, 8-pin SO, 20V
NTB75N06L ON Semiconductor 11mΩ, D2PAK, 60V
HAT2099H Renesas Technology Corp. 5mΩ, 8-pin SO (thermal land), 30V
Table 6. Recommended n-Channel MOSFETs
MAX5930A/MAX5931A/MAX5931B
Setting the Startup Period, R
TIM
The startup period (tSTART) is adjustable from 0.4ms to
50ms. The adjustable startup period feature allows sys-
tems to be customized for MOSFET gate capacitance
and board capacitance (CBOARD). The startup period is
adjusted with a resistor connected from TIM to GND
(RTIM). RTIM must be between 4kΩand 500kΩ. The
startup period has a default value of 9ms when TIM is left
unconnected. Calculate RTIM with the following equation:
where tSTART is the desired startup period.
Startup Sequence
There are two ways of completing the startup
sequence. Case A describes a startup sequence that
slowly turns on the MOSFETs by limiting the gate
charge. Case B uses the current-limiting feature and
turns on the MOSFETs as fast as possible while still
preventing a high inrush current. The output voltage
ramp-up time (tON) is determined by the longer of the
two timings, case A and case B. Set the startup timer
(tSTART) to be longer than tON to guarantee enough
time for the output voltage to settle.
Case A: Slow Turn-On (Without Current Limit)
There are two ways to turn on the MOSFETs without
reaching the fast-comparator current limit:
• If the board capacitance (CBOARD) is small, the
inrush current is low.
• If the gate capacitance is high, the MOSFETs turn
on slowly.
In both cases, the turn-on time is determined only by
the charge required to enhance the MOSFET. The
small 100µA gate-charging current effectively limits
the output voltage dV/dt. Connecting an external
capacitor between GATE and GND extends the turn-
on time. The time required to charge/discharge a
MOSFET is as follows:
where:
CGATE is the external gate to ground capacitance
(Figure 9),
ΔVGATE is the change in gate charge,
QGATE is the MOSFET total gate charge,
IGATE is the gate-charging/discharging current.
In this case, the inrush current depends on the MOSFET
gate-to-drain capacitance (CRSS) plus any additional
capacitance from GATE to GND (CGATE), and on any
load current (ILOAD) present during the startup period.
Example: Charging and discharging times using the
Fairchild FDB7030L MOSFET
If VIN1 = 5V then GATE1 charges up to 10.4V (VIN1 +
VDRIVE), therefore ΔVGATE = 10.4V. The manufacturer’s
data sheet specifies that the FDB7030L has approxi-
mately 60nC of gate charge and CRSS = 600pF. The
MAX5930A/MAX5931A/MAX5931B have a 100µA gate
charging current and a 3mA/50mA normal/strong dis-
charging current. CBOARD = 6µF and the load does not
draw any current during the startup period. With no gate
capacitor, the inrush current, charge, and discharge
times are:
IF
pF AA
tVnC
Ams
tVnC
mA ms
tVnC
mA s
INRUSH
CHARGE
DISCHARGE NORMAL
DISCHARGE STRONG
=μ
+×+=
=×+
μ=
=×+ =
=×+ =
6
600 0 100 0 1
0104 60
100 06
0104 60
3002
0104 60
50 12
. .
. .
. .
()
()
μ
μ
IC
CC II
INRUSH BOARD
RSS GATE GATE LOAD
=+×+
tCVQ
I
GATE GATE GATE
GATE
=×+Δ
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
18 ______________________________________________________________________________________
COMPONENT MANUFACTURER PHONE WEBSITE
Vishay 402-563-6325 www.vishay.com
Sense Resistors IRC, Inc. 361-992-7900 www.irctt.com
Fairchild Semiconductor 888-522-5372 www.fairchildsemi.com
International Rectifier 310-322-3331 www.irf.com
MOSFETs
ON Semiconductor 602-244-6600 www.onsemi.com
Table 7. Component Manufacturers
With a 22nF gate capacitor, the inrush current, charge,
and discharge times are:
Case B: Fast Turn-On (With Current Limit)
In applications where the board capacitance (CBOARD)
is high, the inrush current causes a voltage drop across
RSENSE that exceeds the startup fast-comparator
threshold. The fast comparator regulates the voltage
across the sense resistor to VFC,TH. This effectively reg-
ulates the inrush current during startup. In this case,
the current charging CBOARD can be considered con-
stant and the turn-on time is:
The maximum inrush current in this case is:
Figure 6 shows the waveforms and timing diagrams for
a startup transient with current regulation (see the
Typical Operating Characteristics
section). When oper-
ating under this condition, an external gate capaci-
tor is not required.
ON Comparators
The ON comparators control the on/off function of the
MAX5930A/MAX5931A/MAX5931B. ON_ is also used to
reset the fault latch (latch mode). Pull VON_ low for
100µs, tUNLATCH, to reset the shutdown latch. ON_ also
programs the UVLO threshold (see Figure 10). A resis-
tive divider between VIN_, VON_, and GND sets the
user-programmable turn-on voltage. In power-sequenc-
ing mode, an RC circuit can be used at ON_ to set the
delay timing (see Figure 11).
Using the MAX5930A/MAX5931A/
MAX5931B on the Backplane
Using the MAX5930A/MAX5931A/MAX5931B on the
backplane allows multiple cards with different input
capacitance to be inserted into the same slot even if
the card does not have on-board hot-swap protection.
The startup period can be triggered if IN_ is connected
to ON_ through a trace on the card (Figure 12).
Input Transients
The voltage at IN1, IN2, or IN3 must be above VUVLO dur-
ing inrush and fault conditions. When a short-circuit con-
dition occurs on the board, the fast-comparator trips
cause the external MOSFET gates to be discharged at
50mA according to the mode of operation (see the
Mode
section). The main system power supply must be able to
sustain a temporary fault current, without dropping below
the UVLO threshold of 2.45V, until the external MOSFET is
completely off. If the main system power supply collapses
below UVLO, the MAX5930A/MAX5931A/MAX5931B
force the device to restart once the supply has recov-
ered. The MOSFET is turned off in a very short time result-
ing in a high di/dt. The backplane delivering the power to
the external card must have low inductance to minimize
voltage transients caused by this high di/dt.
IV
R
INRUSH FCTH
SENSE
=,
tCVR
V
ON BOARD IN SENSE
FCTH
=××
,
IF
pF nF AmA
tnF V nC
Ams
tnF V nC
mA ms
tnF V nC
mA s
INRUSH
CHARGE
DISCHARGE NORMAL
DISCHARGE STRONG
=μ
+×+=
=×+
μ=
=×+=
=×+
=
6
600 22 100 0 26 5
22 10 4 60
100 289
22 10 4 60
30 096
22 10 4 60
50 58
.
. .
..
. .
()
()
μ
μ
MAX5930A/MAX5931A/MAX5931B
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
______________________________________________________________________________________ 19
Figure 10. Adjustable Undervoltage Lockout
GATE_
SENSE_
VTURN-ON - (R2 x R1) VON, TH
R2
ON_
VIN
IN_
R1
R2
MAX5930A
MAX5931A
MAX5931B
Figure 9. Operating with an External Gate Capacitor
GATE_
SENSE_
GND
ON_
RSENSE_ VOUT_
CGATE
CBOARD
VIN_
IN_
RPULLUP
STAT_ MAX5930A
MAX5931A
MAX5931B
MAX5930A/MAX5931A/MAX5931B
MOSFET Thermal Considerations
During normal operation, the external MOSFETs dissi-
pate little power. The MOSFET RDS(ON) is low when the
MOSFET is fully enhanced. The power dissipated in nor-
mal operation is PD= ILOAD2x RDS(ON). The most
power dissipation occurs during the turn-on and turn-off
transients when the MOSFETs are in their linear regions.
By taking into consideration the worst-case scenario of a
continuous short-circuit fault, consider these two cases:
1) The single turn-on with the device latched after a
fault: MAX5930A/MAX5931A/MAX5931B (LATCH =
high or unconnected).
2) The continuous autoretry after a fault: MAX5930A/
MAX5931A/MAX5931B (LATCH = low).
MOSFET manufacturers typically include the package
thermal resistance from junction to ambient (RθJA) and
thermal resistance from junction to case (RθJC), which
determine the startup time and the retry duty cycle (d =
tSTART/(tSTART + tRETRY). Calculate the required tran-
sient thermal resistance with the following equation:
where ISTART = VSU,TH/RSENSE.
ZTT
VI
JA MAX JMAX A
IN START
θ()
≤−
×
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
20 ______________________________________________________________________________________
INY GATEY
INZ GATEZ
Q1
RSENSEY
SENSEY
RSENSEZ
SENSEZ
Q2 CBOARDZ
OUTY
CBOARDY
OUTZ
VY
C1
R1
VEN
VZ
ON
OFF
GND
ON
GND
VONY, TH
VONZ, TH
tDELAY
VEN
t1 = -R1C1 ln( )
VEN - VONY, TH
VEN
VON
VY
VZ
t0t1t2
t2 = -R1C1 ln( )
VEN - VONZ, TH
VEN
tDELAY = -R1C1 ln( )
VEN - VONY, TH
VEN - VONZ, TH
MAX5930A
MAX5931A
MAX5931B
Figure 11. Power Sequencing: Channel Z Turns On tDELAY After Channel Y
Layout Considerations
To take full tracking advantage of the switch response
time to an output fault condition, it is important to keep all
traces as short as possible and to maximize the high-cur-
rent trace dimensions to reduce the effect of undesirable
parasitic inductance. Place the MAX5930A/
MAX5931A/MAX5931B close to the card’s connector.
Use a ground plane to minimize impedance and induc-
tance. Minimize the current-sense resistor trace length
(<10mm), and ensure accurate current sensing with
Kelvin connections (Figure 13).
When the output is short circuited, the voltage drop
across the external MOSFET becomes large. Hence, the
power dissipation across the switch increases, as does
the die temperature. An efficient way to achieve good
power dissipation on a surface-mount package is to lay
out two copper pads directly under the MOSFET pack-
age on both sides of the board. Connect the two pads
to the ground plane through vias, and use enlarged
copper mounting pads on the topside of the board.
MAX5930A/MAX5931A/MAX5931B
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
______________________________________________________________________________________ 21
Figure 13. Kelvin Connection for the Current-Sense Resistors
SENSE RESISTOR
HIGH-CURRENT PATH
MAX5930A
MAX5931A
MAX5931B
Figure 12. Using the MAX5930A/MAX5931A/MAX5931B on a
Backplane
ON_
IN_ GATE_
VIN VOUT
SENSE_
MAX5930A
MAX5931A
MAX5931B
CBOARD
BACKPLANE
POWER
SUPPLY
REMOVABLE CARD
WITH NO HOT-INSERTION
PROTECTION
MAX5930A/MAX5931A/MAX5931B
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
22 ______________________________________________________________________________________
Selector Guide
PART CURRENT LIMIT FAULT MANAGEMENT STAT_ POLARITY
MAX5930AEEG+ Programmable Selectable Selectable
MAX5931AEEP+ Fixed Selectable Asserted Low
MAX5931BEEP+ Fixed Selectable Asserted High (Open-Drain)
MAX5930A
MAX5931A
MAX5931B
GND
Q3
Q2
Q1
V1
ON1
ON2
ON3
GND
ON1
OUT1
OUT2
*MAX5930A ONLY.
**OPTIONAL COMPONENT.
OUT3
1nF
16V
STAT1
STAT2
STAT3
BIAS
TIM
MODE
POL*
LATCH*
LIM3*
LIM2*
LIM1*
IN3
IN2
IN1
SENSE3
SENSE2
SENSE1
GATE1
GATE2
GATE3
ON2
ON3
REMOVABLE CARDBACKPLANE
V2
V3
RSENSE1
RSENSE2
RSENSE3
RLIM1** RLIM2** RLIM3** RTIM**
Typical Operating Circuit
MAX5930A/MAX5931A/MAX5931B
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________
23
© 2008 Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.
Chip Information
PROCESS: BiCMOS
20
19
18
17
16
15
14
13
1
2
3
4
5
6
7
8
MODE
ON3
IN2
SENSE2SENSE1
IN1
ON1
ON2
TOP VIEW
GATE2
IN3
SENSE3
GATE3TIM
STAT2
STAT1
GATE1
12
11
9
10
GND
BIASSTAT3
LATCH
MAX5931A
MAX5931B
QSOP
Pin Configurations (continued)
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
20 QSOP E20-1 21-0055
24 QSOP E24-1 21-0055